P3055LD NIKOSEM | Alldatasheet

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1 DEC-01-2001

N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LD TO-252 (DPAK) NIKO-SEM ABSOLUTE MAXIMUM RATINGS (T C = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Gate-Source Voltage V GS ±20 V TC = 25 °C 12 Continuous Drain Current TC = 100 °C ID Pulsed Drain Current1 I DM 45 A Avalanche Energy L = 0.1mH E AS 60 Repetitive Avalanche Energy2 L = 0.05mH E AR 3 mJ TC = 25 °C 48 Power Dissipation TC = 100 °C PD W Operating Junction & Storage Temperature Range T j, Tstg -55 to 150 Lead Temperature (1/16” from case for 10 sec.) T L 275 THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Case RθJC 3 Junction-to-Ambient RθJA 75 Case-to-Heatsink RθCS 1 °C / W 1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT STATIC Drain-Source Breakdown Voltage V (BR)DSS VGS = 0V, ID = 250µA 25 Gate Threshold Voltage V GS(th) VDS = VGS, ID = 250µA 0.8 1.2 2.5 V Gate-Body Leakage I GSS V DS = 0V, VGS = ±20V ±250 nA VDS = 20V, VGS = 0V 25 Zero Gate Voltage Drain Current I DSS VDS = 20V, VGS = 0V, TJ = 125 °C 250 µA 1. GATE 2. DRAIN 3. SOURCE PRODUCT SUMMARY V(BR)DSS R DS(ON) I D 25 50mΩ 12A G D S

2 DEC-01-2001

N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LD TO-252 (DPAK) NIKO-SEM On-State Drain Current1 I D(ON) V DS = 10V, VGS = 10V 12 A VGS = 5V, ID = 12A 70 120Drain-Source On-State Resistance1 RDS(ON) VGS = 10V, ID = 12A 50 90 mΩ Forward Transconductance1 g fs V DS = 15V, ID = 12A 16 S DYNAMIC Input Capacitance C iss 450 Output Capacitance C oss 200 Reverse Transfer Capacitance C rss VGS = 0V, VDS = 15V, f = 1MHz pF Total Gate Charge2 Q g 15 Gate-Source Charge2 Q gs 2.0 Gate-Drain Charge2 Q gd VDS = 0.5V(BR)DSS, VGS = 10V, ID = 6A 7.0 nC Turn-On Delay Time2 t d(on) 6.0 Rise Time2 t r VDS = 15V, RL = 1Ω 6.0 Turn-Off Delay Time2 t d(off) ID ≅ 12A, VGS = 10V, RGS = 2.5Ω 20 Fall Time2 t f 5.0 nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current I S 12 Pulsed Current3 I SM 20 A Forward Voltage1 V SD I F = IS, VGS = 0V 1.5 V Reverse Recovery Time t rr 30 nS Peak Reverse Recovery Current I RM(REC) IF = IS, dlF/dt = 100A / µS 15 A Reverse Recovery Charge Q rr 0.043 µC 1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. 2Independent of operating temperature. 3Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P3055LD”, DATE CODE or LOT #

3 DEC-01-2001

N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LD TO-252 (DPAK) NIKO-SEM

4 DEC-01-2001

N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LD TO-252 (DPAK) NIKO-SEM TO-252 (DPAK) MECHANICAL DATA mm mm Dimension Min. Typ. Max. Dimension Min. Typ. Max. A 9.35 10.10 H 0.80 B 2.20 2.40 I 6.40 6.60 C 0.48 0.85 J 5.00 5.50 D 0.89 1.50 K 0.55 1.10 E 0.45 0.60 L 0.60 1.00 F 0.03 0.23 M 4.40 4.60 G 5.20 6.20 N