P2003BDG

P2003BDG NIKOSEM | Alldatasheet

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1 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Gate-Source Voltage V GS ±20 V TC = 25 °C 35 Continuous Drain Current TC = 100 °C ID Pulsed Drain Current1 I DM 120 Avalanche Current I AR 15 A Avalanche Energy L = 0.133mH E AS 15 Repetitive Avalanche Energy2 L = 0.05mH E AR 5.6 mJ TC = 25 °C 50 Power Dissipation TC = 100 °C PD W Operating Junction & Storage Temperature Range T j, Tstg -55 to 150 Lead Temperature (1/16” from case for 10 sec.) T L 275 THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Case RθJC 2.5 Junction-to-Ambient RθJA 75 Case-to-Heatsink RθCS 0.7 °C / W 1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1Ĉ ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT STATIC Drain-Source Breakdown Voltage V (BR)DSS VGS = 0V, ID = 250µA 25 Gate Threshold Voltage V GS(th) VDS = VGS, ID = 250µA 1.0 1.5 3.0 V Gate-Body Leakage I GSS V DS = 0V, VGS = ±20V ±250 nA VDS = 20V, VGS = 0V 25 Zero Gate Voltage Drain Current I DSS VDS = 20V, VGS = 0V, TJ = 125 °C 250 µA 1. GATE 2. DRAIN 3. SOURCE PRODUCT SUMMARY V(BR)DSS R DS(ON) I D 25 20mƸ 35A G D S

2 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM On-State Drain Current1 I D(ON) V DS = 10V, VGS = 10V 35 A VGS = 4.5V, ID = 15A 23 31 Drain-Source On-State Resistance1 RDS(ON) VGS = 10V, ID = 15A 15.5 20 mƸ Forward Transconductance1 g fs V DS = 15V, ID = 30A 14 28 S DYNAMIC Input Capacitance C iss 530 700 Output Capacitance C oss 200 275 Reverse Transfer Capacitance C rss VGS = 0V, VDS = 25V, f = 1MHz 60 90 pF Total Gate Charge2 Q g 8.4 11 Gate-Source Charge2 Q gs 2.5 3.1 Gate-Drain Charge2 Q gd VDS = 0.5V(BR)DSS, VGS = 10V, ID = 15A 6.4 9.6 nC Turn-On Delay Time2 t d(on) 6.2 9.3 Rise Time2 t r V DD = 15V 11 17 Turn-Off Delay Time2 t d(off) ID ≅ 15A, VGS = 10V, RGS = 12.7Ƹ 23 34 Fall Time2 t f 18 27 nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current I S 35 Pulsed Current3 I SM 120 A Forward Voltage1 V SD I F = IS, VGS = 0V 1.1 1.4 V Reverse Recovery Time t rr 15 18 nS Reverse Recovery Charge Q rr 2 3 nC 1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2Ĉ. 2Independent of operating temperature. 3Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P2003BDG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

3 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM TYPICAL CHARACTERISTICS V ,DRAIN- SOURCE VOLTAGE ( V ) ON-REGION CHARACTERISTIC I ,DRAIN - SOURCE CURRENT( A )D DS 7.0V 6.0V 5.0V 4.5V 4.0V 3.5V 10.0V GSV =3.0V ON- RESISTANCE VARIATION WITH DRAIN CURRENT AND GATE VOLTAGE I ,DRAIN CURRENT( A ) R ,NORMALIZED DRAIN - SOURCE ON - RESISTANCE DS(ON) D 0.5 1.0 1.5 2.0 2.5 3.0 0 1 02 0 3 04 0 5 06 0 GSV = 4.0V 4.5V 7.0V 6.0V 5.0V 10V ON- RESISTANCE VARIATION WITH TEMPERATURE R ,NORMALIZED DRAIN - SOURCE ON - RESISTANCE 0.6-50 DS(ON) 0.8 1.0 j -25 0 25 I = 15A V = 10V 1.4 1.2 1.6 1.8 GS D 15010075 125 175 T ,JUNCTION TEMPERATURE( ° C ) ON-RESISTANCE VARIATION WITH GATE-TO-SOURCE VOLTAGE R ,ON-RESISTANCE(OHM)DS(ON) 0.01 0.02 0.03 0.04 0.05 0.06 D 8 10 A A V ,GATE TO SOURCE VOLTAGEGS I = 15A T = 25°C T = 125°C V ,GATE TO SOURCE VOLTAGE TRANSFER CHARACTERISTICS I ,DRAIN CURRENT( A ) D GS DS 34 5 A V =10V T = -55°C 25°C 125°C SOURCE CURRENT AND TEMPERATURE BODY DIODE FORWARD VOLTAGE VARIATION WITH V ,BODY DIODE FORWARD VOLTAGE( V ) 0.8 I ,REVERSE DRAIN CURRENT( A ) 0.0001S 0.001 0.01 0.2 SD 0.4 0.6 V = 0V 0.1 GS 1.41.0 1.2 T = 125°CA 25°C -55°C

4 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM I = 15AD Q ,GATE CHARGE ( nC ) V ,GATE - SOURCE VOLTAGE ( V ) GS g 10V 15V DSV = 5V 0 4 81 2 16 GATE CHARGE CHARACTERISTICS V ,DRAIN TO SOURCE VOLTAGE ( V ) CAPACITANCE CHARACTERISTICS CAPACITANCE( pF ) f = 1MHZ GSV = 0V10 1 100 DS 51 0 1000 10000 Crss 15 20 30 Coss Ciss SINGLEPULSE MAXIMUM POWER DISSIPATION SINGLE PULSE TIME( SEC ) POWER( W ) 0.01 400 800 0.1 1 2000 1200 1600 2400 10010 SINGLE PULSE 1000 C ǀJCR = 2 .5°C/W T = 25°C MAXIMUM SAFE OPERATING AREA I ,DRAIN CURRENT( A ) SINGLE PULSE V = 10V D JCǀ GS DS ds(on) R Limit V ,DRAIN - SOURCE VOLTAGE -1 0 35.0µS Tc = 25 °C R = 2.5 °C/W DC 10ms 1ms 100µS t1 , TIME( ms ) TRANSIENT THERMAL RESPONSE CURVE r ,NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ( t ) -7 -6 Single pulse 0.01 0.02 0.05 0.10 0.20 D=0.5 P(pk) 1.R (t)=r(t)*R 2.R = 2.5°C/W 3.T + T = P * R (t)j C t24.Duty Cycle,D = ǀJC ǀJC ǀJC

5 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM TO-252 (DPAK) MECHANICAL DATA mm mm Dimension Min. Typ. Max. Dimension Min. Typ. Max. A 9.35 10.4 H 0.89 2.03 B 2.2 2.4 I 6.35 6.80 C 0.45 0.6 J 5.2 5.5 D 0.89 1.5 K 0.6 1 E 0.45 0.69 L 0.5 0.9 G 5.2 6.2 N G A H J I B C M L K D E F 13 2