MKG40RK600LB IXYS | Alldatasheet
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© 2013 IXYS All rights reserved 1 - 4 20131121 MKG 40RK600LB IXYS reserves the right to change limits, test conditions and dimensions. Data according ot IEC 60747 and per semiconductor unless otherwise specified t e n t a t i v e Buck / Boost Tpology CoolMOS™ 1) with fast SONIC Diode ISOPLUS™ - electrically isolated surface to heatsink Surface Mount Power Device Part number MKG40RK600LB Features / Advantages:
- Fast CoolMOS™ 1) C6 MOSFET - very low on-resistance - low gate charge - avalanche rated for unclamped inductive switching (UIS) Package: SMPD
- isolated surface to heatsink
- low coupling capacity between pins and heatsink
- PCB space saving
- enlarged creepage towards heatsink
- application friendly pinout
- low inductive current path
- high reliability Applications:
- Buck / boost chopper
- PFC stage
- Forward converter ID25 = 54 A VDSS = 600 V RDS(on) max = 41 mW 1) CoolMOS™ is a trademark of Infineon Technologies AG. D G 2x S D A 3x K Isolated surface to heatsink E72873 2x D 2x S G T 3x K A D
© 2013 IXYS All rights reserved 2 - 4 20131121 MKG 40RK600LB IXYS reserves the right to change limits, test conditions and dimensions. Data according ot IEC 60747 and per semiconductor unless otherwise specified t e n t a t i v e MOSFET T Ratings Symbol Definitions Conditions min. typ. max. VDSS drain source breakdown voltage up to TVJ = 150°C 600 V VGS gate source voltage continuous TVJ = 25°C transient ±20 ±30 V V I D25 ID80 ID100 drain current TC = 25°C TC = 80°C TC = 100°C A A A E AS IA non-repetetive avalanche energy single pulse TVJ = 25°C 1.95 13.4 J A dV /dt rate of rise of voltage IS > IDM; VDD < 400 V TVJ = 25°C 15 V/ns RDSon static drain source on resistance ID = 44 A; VGS = 10 V (Chip) TVJ = 25°C 37 41 mΩ VGS(th) gate threshold voltage ID = 3 mA; VDS = VGS TVJ = 25°C 2.5 3 3.5 V IDSS drain source leakage current VDS = VDSS; VGS = 0 V TVJ = 25°C TVJ = 150°C 50 5 µA µA I GSS gate source leakage current VDS = 0 V; VGS = ±20 V ±100 nA Ciss Coss input capacitance output capacitance VGS = 0 V; VDS = 100 V; f = 1 MHz TVJ = 25°C TVJ = 125°C 6.5 360 nF pF Qg Qgs Qgd total gate charge gate source charge gate drain (Miller) charge VDS = 480 V; ID = 44 A TVJ = 25°C VGS = 10 V; RG = 1.6 Ω 290 150 190 nC nC nC t d(on) tr td(off) tf Eon Eoff Erec(off) turn-on delay time current rise time turn-off delay time current fall time turn-on energy per pulse turn-off energy per pulse reverse recovery losses at turn-off Inductive switching boost mode with diode D V DS = 380 V; ID = 44 A TVJ = 25°C VGS = 13 V; RG = 1.6 Ω tbd tbd tbd tbd tbd tbd tbd ns ns ns ns mJ mJ mJ R thJC RthJH thermal resistance junction to case thermal resistance junction to heatsink with heatsink compound; IXYS test setup 0.6
0.4 K/W
Source-Drain Diode of MOSFET T Ratings Symbol Definitions Conditions min. typ. max. IS25 IS80 continuous source current TC = 25°C TC = 80°C tbd A A V SD forward voltage drop IF = 44 A; VGS = 0 V TVJ = 25°C 0.9 1.1 V trr QRM IRM reverse recovery time reverse recovery charge (intrinsic diode) max. reverse recovery current IF = 44 A; VR = 400 V TVJ = 25°C -diF /dt = 100 A/µs 32 950 ns µC A Diode D Ratings Symbol Definitions Conditions min. typ. max. VRRM max. repetitive reverse voltage TVJ = 25°C 600 V IF25 IF80 continuous source current DC TC = 25°C DC TC = 80°C A A V F forward voltage IF = 44 A (Chip) TVJ = 25°C TVJ = 125°C 1.70 1.65 2.0 V V I R reverse current VR = VRRM TVJ = 25°C TVJ = 125°C 100 µA mA IRM max. reverse recovery current IF = 30 A; VR = 350 V TVJ = 100°C -di/dt = 240 A/µs tbd A trr reverse recovery time IF = 1 A; VR = 30 V; -di/dt = 100 A/µs TVJ = 100°C tbd ns RthJC RthJH thermal resistance junction to case thermal resistance junction to heatsink with heatsink compound; IXYS test setup 0.85
0.6 K/W
© 2013 IXYS All rights reserved 3 - 4 20131121 MKG 40RK600LB IXYS reserves the right to change limits, test conditions and dimensions. Data according ot IEC 60747 and per semiconductor unless otherwise specified t e n t a t i v e XXXXXXXXXX yywwA Part number Date code Backside DCB Pin 1 identifier UL Logo Data Matrix Code Digits 1 to 19: Part # 20 to 23: Date Code 24 to 25: Assembly line 26 to 31: Lot # 32: Split Lot 33 to 36: Individual # ~ ~ ~ Assembly line Package SMPD Ratings Symbol Definitions Conditions min. typ. max. Tstg TVJ storage temperature virtual junction temperature -55 -55 125 150 Weight 8 g F C mounting force with clip 40 130 N d Spp/App d Spb/Apb creepage distance on surface / striking distance through air terminal to terminal 1.65 mm terminal to backside 4.0 mm VISOL isolation voltage t = 1 second t = 1 minute 50/60 Hz; RMS; IISOL < 1 mA 3000 2500 V V C P coupling capacity between shorted terminals and backside metal 90 pF CTI 400 Rpin-chip resistance pin to chip V = (RDSon + 2·R)·ID resp. V = VF + 2·R·IF 1 mΩ Part number M = MOSFET K = CoolMOS™ 1) G = C6 40 = Current Rating [A] RK = Boost/Brake Chopper 600 = Reverse Voltage [V] LB = SMPD-B Ordering Part Name Marking on Product Delivering Mode Base Qty Ordering Code Standard MKG40RK600LB-TRR MKG40RK600LB Tape&Reel 200 514630 Equivalent Circuits for Simulation *on die level V0 max R0 max threshold voltage slope resistance * V mW I V0 R0
© 2013 IXYS All rights reserved 4 - 4 20131121 MKG 40RK600LB IXYS reserves the right to change limits, test conditions and dimensions. Data according ot IEC 60747 and per semiconductor unless otherwise specified t e n t a t i v e 1236 5 4 987 32,7 0,5 20,05(3x) 180,1 2,750,1 5,50,1 13,50,1 16,250,1 190,1 250,2 0,50,1 90,1 0,2 10,05(6x) 5,5 0,12) A 0,550,1 40,05 4,85 0,2 0,2 0,05 A ( 8 : 1 ) 0,15+ 0,1 seating plane Pin number Notes: 1) potrusion may add 0.2 mm max. on each side 2) additional max. 0.05 mm per side by punching misalignement or overlap of dam bar or bending compression 3) DCB area 10 to 50 µm convex; position of DCB area in relation to plastic rim: ±25 µm (measured 2 mm from Cu rim) 4) terminal plating: 0.2 - 1 µm Ni + 10 - 25 µm Sn (galv.) cutting edges may be partially free of plating Outlines SMPD Dimensions in mm (1 mm = 0.0394“) 7, 8 4, 5 T 1, 2, 3 D