MCO150-16IO1 IXYS | Alldatasheet
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Technical content
Backside: isolated TAV TVV 1.37 RRM 158 1600 V= V I= A Features / Advantages: Applications: Package:
- Thyristor for line frequency
- Planar passivated chip
- Long-term stability
- Line rectifying 50/60 Hz
- Softstart AC motor control
- DC Motor control
- Power converter
- AC power control
- Lighting and temperature control SOT-227B (minibloc)
- Industry standard outline
- RoHS compliant
- Epoxy meets UL 94V-0
- Base plate: Copper internally DCB isolated
- Advanced power cycling
- Isolation Voltage: V~3000 IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified © 2014 IXYS all rights reserved
V = V kA²s kA²s kA²s kA²s Symbol Definition Ratings typ. max. I V I A VT 1.37 R 0.2 K/W min. 158 V V 100T = 25°CVJ T = °CVJ mA10V = V T = 25°CVJI = AT V T = °CC 80 Ptot 620 WT = 25°CC 150 1600 forward voltage drop total power dissipation Conditions Unit 1.78 T = 25°CVJ 125 VT0 V0.84T = °CVJ 150 rT 3.5 mΩ V1.37T = °CVJI = AT V 150 1.89 I = A300 I = A300 threshold voltage slope resistance for power loss calculation only µA 125 V V1600T = 25°CVJ I A250 PGM Wt = 30 µs 10max. gate power dissipation P T = °CC 150 Wt = 5P PGAV W0.5average gate power dissipation CJ 119junction capacitance V = V400 T = 25°Cf = 1 MHzR VJ pF ITSM t = 10 ms; (50 Hz), sine T = 45°C VJmax. forward surge current T = °CVJ 150 I²t T = 45°Cvalue for fusing T = °C150 V = 0 VR V = 0 VR V = 0 V V = 0 V t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine VJ R VJ R thJC thermal resistance junction to case T = °CVJ 150 2.00 2.16 14.5 14.0 kA kA kA kA 1.70 1.84 20.0 19.4 1600 300 µs RMS forward currentT(RMS) TAV 180° sine average forward current (di/dt)cr A/µs150repetitive, I =TVJ = 150°C; f = 50 Hzcritical rate of rise of current VGT gate trigger voltage V= 6 V T = ° C 25 (dv/dt) T= 1 5 0 ° Ccritical rate of rise of voltage A/µs500 V/µs t = µs; IA ; V = ⅔ V R = ∞; method 1 (linear voltage rise) VJ D VJ 450 AT P G =0 . 4 5 di /dt A/µs;G =0 . 4 5 D DRM cr V = ⅔ VD DRM GK 1000 1.4 V T= ° C-40VJ IGT gate trigger current V= 6 V T = ° C 25D VJ 150 mA T= ° C-40VJ 1.6 V 200 mA VGD gate non-trigger voltage T= ° CVJ 0.2 V IGD gate non-trigger current 10 mA V = ⅔ VD DRM 150 latching current T= ° CVJ 450 mAIL 25tµ sp =1 0 IA ;G = 0.45 di /dt A/µsG =0 . 4 5 holding current T= ° CVJ 200 mAIH 25V= 6 VD R = ∞GK gate controlled delay time T= ° CVJ 2µ st gd 25 IA ;G = 0.45 di /dt A/µsG =0 . 4 5 V = ½ VD DRM turn-off time T= ° CVJ 150 µst q di/dt = A/µs;10 dv/dt = V/µs; 15 V =R 100 V; I A;T = 150 V = ⅔ VD DRM t µsp = 200 non-repet., I = 150 AT 150 RthCH thermal resistance case to heatsink K/W Thyristor 1700 RRM/DRM RSM/DSM max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage R/D reverse current, drain current T T R/D R/D 200 0.10 IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified © 2014 IXYS all rights reserved
1) IRMS is typically limited by the pin-to-chip resistance (1); or by the current capability of the chip (2). In case of (1) and a product with multiple pins for one chip-potential, the current capability can be increased by connecting the pins as one contact. Ratings abcdZyyww XXXXX Product Marking Logo Part No. DateCode Assembly Code Assembly Line Package Top °C MD Nm1.5mounting torque 1.1 TVJ °C150virtual junction temperature -40 Weight g30 Symbol Definition typ. max.min.Conditions operation temperature Unit MT Nm1.5terminal torque 1.1 V Vt = 1 second Vt = 1 minute isolation voltage mm mm 10.5 3.2 8.6 6.8 dSpp/App creepage distance on surface | striking distance through air dSpb/Apb terminal to backside I RMS RMS current 150 Aper terminal 125-40 terminal to terminal SOT-227B (minibloc) Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering 50/60 Hz, RMS; I ≤ 1 mAISOL MCO150-16io1 498629Tube 10MCO150-16io1Standard 3000ISOL Tstg °C150storage temperature -40 2500 threshold voltage V0.84 mΩ V0 max R0 max slope resistance * 1.6 Equivalent Circuits for Simulation T =VJ I V0 R0 Thyristor 150 °C* on die level IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified © 2014 IXYS all rights reserved
Outlines SOT-227B (minibloc) IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified © 2014 IXYS all rights reserved
0.01 0.1 1 600 800 1000 1200 1400 1600 1800 100 150 200 250 300 100 101 102 103 104 0.00 0.05 0.10 0.15 0.20 ITSM [A] IT [A] VT [V] t[ m s ] ZthJC [K/W] 23 4 5 6 7 8 9 0 11 5000 10000 15000 20000 25000 I2t [A2s] t[ m s ] IT(AV)M [A] TC [°C] 02 5 5 0 7 5 1 0 0 1 2 5 1 5 0 100 150 200 250 300 Fig. 1 Forward characteristics Fig. 3 I 2t versus time (1-10 ms) t[ s ] Fig. 6 Max. forward current at case temperature Fig. 2 Surge overload current Fig. 8 Transient thermal impedance TVJ = 25°C TVJ = 125°C TVJ =4 5 ° C
50 Hz, 80% VRRM
TVJ =1 2 5 ° C TVJ = 45°C VR =0 V 125°C 150°C 0 40 80 120 160 200 100 150 200 250 300 350 IF(AV) [A] P(AV) [W] Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient tem perature 05 0 1 0 0 1 5 0 Tamb [°C] dc = 0.5 0.4 0.33 0.17 0.08 10 100 1000 100 1000 1 10 100 1000 10000 0.1 IG [mA] VG [V] tgd [μs] IG [mA] typ. Limit TVJ =1 2 5 ° C Fig. 4 Gate trigger characteristics Fig. 5 Gate controlled delay time dc = 0.5 0.4 0.33 0.17 0.08 4: PGAV=0 . 5W 5: PGM =5 W 6: PGM =1 0 W 1: IGD,T VJ =1 2 5 ° C 2: IGT,T VJ =2 5 ° C 3: IGT,T VJ =- 4 0 ° C IGD,T VJ =1 2 5 ° C RthHA 0.1 0.2 0.4 0.6 0.8 1.0 Rthi [K/W] t i [s] 0.020 0.030 0.023 0.003 0.032 0.050 0.043 0.250 0.082 0.170 Thyristor IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified © 2014 IXYS all rights reserved