MCD200-18IO1 IXYS | Alldatasheet

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Technical content

Backside: isolated TAV TVV 1.1 RRM 216 1800 V= V I= A Features / Advantages: Applications: Package:

  • Thyristor for line frequency
  • Planar passivated chip
  • Long-term stability
  • Direct Copper Bonded Al2O3-ceramic
  • Line rectifying 50/60 Hz
  • Softstart AC motor control
  • DC Motor control
  • Power converter
  • AC power control
  • Lighting and temperature control
  • Industry standard outline
  • RoHS compliant
  • Soldering pins for PCB mounting
  • Base plate: DCB ceramic
  • Reduced weight
  • Advanced power cycling
  • Isolation Voltage: V~3600 IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved

V = V kA²s kA²s kA²s kA²s Symbol Definition Ratings typ. max. I V I A VT 1.20 R 0.13 K/W min. 216 V V 400T = 25°CVJ T = °CVJ mA15V = V T = 25°CVJI = AT V T = °CC 85 Ptot 770 WT = 25°CC 200 1800 forward voltage drop total power dissipation Conditions Unit 1.52 T = 25°CVJ 125 VT0 V0.80T = °CVJ 125 rT 1.4 mΩ V1.10T = °CVJI = AT V 200 1.50 I = A400 I = A400 threshold voltage slope resistance for power loss calculation only µA 125 V V1800T = 25°CVJ I A340 PGM Wt = 30 µs 120max. gate power dissipation P T = °CC 125 Wt = 60P PGAV W20average gate power dissipation CJ 366junction capacitance V = V400 T = 25°Cf = 1 MHzR VJ pF ITSM t = 10 ms; (50 Hz), sine T = 45°C VJmax. forward surge current T = °CVJ 125 I²t T = 45°Cvalue for fusing T = °C125 V = 0 VR V = 0 VR V = 0 V V = 0 V t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine VJ R VJ R thJC thermal resistance junction to case T = °CVJ 125 8.00 8.64 231.2 224.4 kA kA kA kA 6.80 7.35 320.0 310.5 1800 500 µs RMS forward currentT(RMS) TAV 180° sine average forward current (di/dt)cr A/µs100repetitive, I =TVJ = 125°C; f = 50 Hzcritical rate of rise of current VGT gate trigger voltage V= 6 V T = ° C 25 (dv/dt) T= 1 2 5 ° Ccritical rate of rise of voltage A/µs500 V/µs t = µs; IA ; V = ⅔ V R = ∞; method 1 (linear voltage rise) VJ D VJ 600 AT P G =0 . 5 di /dt A/µs;G =0 . 5 D DRM cr V = ⅔ VD DRM GK 1000 T= ° C-40VJ IGT gate trigger current V= 6 V T = ° C 25D VJ 150 mA T= ° C-40VJ 220 mA VGD gate non-trigger voltage T= ° CVJ 0.25 V IGD gate non-trigger current 10 mA V = ⅔ VD DRM 125 latching current T= ° CVJ 200 mAIL 25tµ sp =3 0 IA ;G = 0.5 di /dt A/µsG =0 . 5 holding current T= ° CVJ 150 mAIH 25V= 6 VD R = ∞GK gate controlled delay time T= ° CVJ 2µ st gd 25 IA ;G = 0.5 di /dt A/µsG =0 . 5 V = ½ VD DRM turn-off time T= ° CVJ 200 µst q di/dt = A/µs;10 dv/dt = V/µs; 50 V =R 100 V; I A;T = 300 V = ⅔ VD DRM t µsp = 200 non-repet., I = 200 AT 125 RthCH 0.05thermal resistance case to heatsink K/W Rectifier 1900 RRM/DRM RSM/DSM max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage R/D reverse current, drain current T T R/D R/D 200 IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved

2D MatrixPart No. Assembly Line Date Code Package Top °C MD Nm2.75mounting torque 2.25 TVJ °C125virtual junction temperature -40 Weight g150 Symbol Definition typ. max.min.Conditions operation temperature Unit MT Nm5.5terminal torque 4.5 V Vt = 1 second Vt = 1 minute isolation voltage mm mm 14.0 10.0 16.0 16.0 dSpp/App creepage distance on surface | striking distance through air dSpb/Apb terminal to backside I RMS RMS current 300 Aper terminal 100-40 terminal to terminal Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering 50/60 Hz, RMS; I ≤ 1 mAISOL MCD200-18io1 498297Box 6MCD200-18io1Standard 3600ISOL Tstg °C125storage temperature -40 3000 threshold voltage V0.8 mΩ V0 max R0 max slope resistance * 0.7 Equivalent Circuits for Simulation T =VJ I V0 R0 Thyristor 125 °C* on die level IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved

0.25 30 Ø 6.6 2.8 / 0.8M6 x 16 2.2 1 2 3 12.4 80 7 Optional accessories for modules Keyed gate/cathode twin plugs with wire length = 350 mm, gate = white, cathode = red Type ZY 180L (L = Left for pin pair 4/5) Type ZY 180R (R = Right for pin pair 6/7) UL 758, style 3751 11 10 3 1 25 4 Outlines Y4 IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved

Ta [°C] TC [°C]t[ m s ]t[ s ] 0.001 0.01 0.1 1 2000 4000 6000 8000 011 104 105 106 0 25 50 75 100 125 150 100 200 300 400 ITSM [A] ITAVM [A] 0 100 200 300 100 200 300 400 Ptot [W] ITAVM [A] 0 25 50 75 100 125 1500 200 400 600 400 800 1200 1600 2000 I2dt [A2s] TVJ =4 5 ° C TVJ =1 2 5 ° C Ptot [W] IdAVM [A] T a [°C] Fig. 1 Surge overload current I TSM, IFSM: Crest value, t: duration Fig. 2 I 2t versus time (1-10 ms) Fig. 3 Max. forward current at case temperature Fig. 4 Power dissipation vs. on-sta te current & ambient temperature (per thyristor or diode) Fig. 5 Gate trigger characteristics Fig. 6 Three phase rectifier bridge: Power dissipation versus direct output current and ambient temperature Fig. 7 Gate trigger delay time 180° sin 120° 60° 30° DC 0.01 0.1 1 10 100 10-3 10-2 10-1 100 101 102 0.1 IG [A] VG [V] IG [A] TVJ =2 5 ° C tgd [ s] limit typ. 50 Hz 80% VRRM TVJ =4 5 ° C TVJ =1 2 5 ° C DC 30° 60° 120° 180° sin RthKA K/W 0.30 0.10 0.15 0.20 0.04 0.06 0.02 RthKA K/W 0.1 0.2 0.3 0.4 0.6 0.8 1.0 1: IGT,T VJ =1 2 5 ° C 2: IGT,T VJ =2 5 ° C 3: IGT,T VJ = -40°C IGD,T VJ =1 3 0 ° C 4: PGM =2 0W 5: PGM =6 0W 6: PGM =1 2 0W Thyristor IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved

t[ s ] 10-3 10-2 10-1 100 101 102 0.0 0.1 0.2 0.3 0.4 ZthJC [K/W] VT/F [V] IT/F [A] 10-3 10-2 10-1 100 101 102 0.0 0.1 0.2 0.3 ZthJK [K/W] t[ s ] Fig. 8 Forward current versus voltage drop Fig. 9 Transient thermal impedance junction to case at various conduction angles Fig. 10 Transient thermal im pedance junction to heatsink (per thyristor/diode) DC 180° 120° 60° 30° DC 180° 120° 60° 30° Constants for ZthJC calculation: i R thi [K/W] t i [s] 1 0.0100 0.00014 2 0.0065 0.019 3 0.0250 0.180 4 0.0615 0.520 5 0.0270 1.600 Rectifier IXYS reserves the right to change limits, conditions and dimensions. 20131121aData according to IEC 60747and per semiconductor unless otherwise specified © 2013 IXYS all rights reserved