M2764A INTEL | Alldatasheet
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reliability and producibility. efficient programming method. without increasing access time. ‘or choosing between non-volatile memory alternatives. *HMOS is a patented process of intel Corporation. WRlcan be Visor Vu. 2. Vy = 120V £084. Figure 1. Block Diagram woes tec Figure 2. Pin Configurations 210926-8
714 Order Number 210326-004
intel M2764A . ABSOLUTE MAXIMUM RATINGS* NOTICE: This is a production data sheet. The specifi- 1 j cto +1250 Leations are subject to change without notice. Case Temperature Under Bias... 55°C to +125: * WARNING: the device beyond the “Absolute Alin ‘Maximum Ratings” may cause permanent damage. put or Output Voltages with These are stone a tings only. Operation beyond the Voltage on Pin 24 with tended exposure beyond the “Operating Conditions” Vp Supply Voltage with Respect to D.C. AND A.C. OPERATING CONDITIONS DURING READ [Parameter Twin Max units | Caso Temperature instanton) [| 85 | tta5 | | Digtai Suppiy voltage eso sso | READ OPERATION D.C. CHARACTERISTICS (Over Specified Operating Conditions) ee eee | | irputtoadcurent | TT twa sev | | uo | Outputteakagecurent [| | [to Tw | Vour= sev | | eer | VepGurentess [TT mm | sv | | ocr [Voc Gurentstandty | | Pao mm | | toca | VocGurentacive [| as [00 | ma EE | | vu | tmouttowvonage [or [| oe Pv | vu | tmeutrignvotage [20 TT voces | ov [| | vo. | uiputtowvottage fT ons Tv ttm | L_vou | cutputtignvottge | 24 Tf A.C. CHARACTERISTICS | tcc | AddresstoOuputDetey | | 250 | | 360 | ns | CE=OE=W | | te | CEtooutpudey || aso || a0 | ms | OE=M | toe | OEHightooupureiot | o [ 65 | o | tos | ms | ce-w | tonl®) ‘Output Hold from CE = OF = Vu ‘Addresses CE or OF Whichever Occurred First NOTES: 4. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 2. Vpp may be connected directly to Voc except during programming, The supply current would then be the sum of loc and lee 3. Typical values are for to = +25°C and nominal supply voltages. 4. Output Float is defined as the point where data is no longer driven—see timing diagram on page 3. . 7-15
CAPACITANCE Tc = 25°C, f = 1MHz ['Symbot [Parameter | typt®) | Max | unite | Conaitions | InpurCapacitancs | 4 | 6 | oF | Vm=ov_| OuiputCapaciance | | 12 | oF | Vour= ov | A.C. TESTING INPUT, OUTPUT WAVEFORM A.C, TESTING LOAD CIRCUIT Input/Output wy " Rinne 7 > z 7 rest vomrs aan oe Chae An-$——0 ovr 210326-3 weer Tr 100 pF A.C. Testing Inputs are Driven at 2.4V for a Logic “1” and 0.48V ~ 210828-4 for @ Logic 0". Timing Measurements are made at 2.0V for a & = 100 pF Logic “1” and 0.8V for a Logic “0”. Cr includes vig Capacttance A.C. WAVEFORMS ver sees ‘ADDRESSES oe Ya wees Ya ce va tees tee vin oe Ye vere tog!3) toe2] tace ton va HIGH Z os ‘HIGH Z OUTPUT VALID OUTPUT Vi see 210326-5 NOTES: 1 eo values are for Tc = +25°C and nominal supply yorages. 2. OE may be delayed up to tacc-tog after the falling edge of CE without impact on tacc. 3, Output float is defined as the point where data is no longer driven. 7-16
The seven modes of operation of the M2764A are . Table 1. Mode Selection array and connected to the READ line from the sys- (27) -19)} data is desired from a particular memory device. ery fifi tf Lier es EPROM require careful decoupling of the devices. ‘The M2764A has standby mode which reduces the ently damage the MZ764A. independent of the OF input. both ''1s” and “Os” can be present in the data word. ry arrays, Intel has provided 2 control lines which __inputis at 12.5V and CE and PGM are both TTL low. 2) the lowest possible memory power dissipation, _20ress and data inputs are TTL.
idly programs Intel M2764A EPROMs using an effi- program the selected M2764A. chart of the M2764A inteligent Programming Algo- at Vir, PGM at Vijq and Vpp at 12.5V. The entire sequence of program puises and byte . -. Program Inhibit tifier Mode. (07) defined as the parity bit. Table 2. M2764A inteligent Identifier™ Bytes
- Ay—Ag, Aro-Arg, CE, OE = Vir “
Figure 3. M2764A Inteligent Programming™ Flowchart
ERASURE CHARACTERISTICS which has a wavelength of 2537 Angstroms (A). The integrated dose {i.e., UV intensity x exposure time) The erasure characteristics of the M2764A are such _for erasure should be a minimum of 15 Wsec/cm2. that erasure begins to occur upon exposure to light The erasure time with this dosage is approximately with avelonate shorter than approximately 4000 18 to 20 minutes using an ultraviolet lamp with a ‘Angstroms (A). It should be noted that sunlight and 12000 4W/cm? power rating. The M2764A should certain types of fluorescent lamps have wavelengths be placed within 1 inch of the lamp tubes during era- in the 3000-4000A range. Data show that constant sure. The maximum integrated dose a M2764A can exposure to room level fluorescent lighting could be exposed to without damage is 7258 Wsec/cm? erase that typical M2764A in approximately 3 years, © (1 week @ 12000 mW/cmé). Exposure of the while it would take approximately 1 week to cause © M2764A. to high intensity UV light for long periods erasure when exposed to direct sunlight. If the may cause permanent damage. M2764A is to be exposed to these types of lighting conditions for extended periods of time, opaque la- bels should be placed over the M2764A window to RELEVANT INTEL LITERATURE prevent unintentional erasure. AR-265 Versatile Algorithm, Equipment Cut The ded proved for the Programming Time recommen erasure lure rr eT M2764A is exposure to shortwave ultraviolet light "F*95B EPROM Reliability Data Summary Intgligent Programming™ Algorithm D.C. PROGRAMMING CHARACTERISTICS To = 25 £5°C, Vog = 6.0V +0.25V, Vpp = 12.5V +0.3V [ems | Paamar | mers | min [max | min | input Corer (inputs) [0 ok n= van | Input Low Level (Al Inputs) [-or [os [vj Input High Level [20 [voc+i | v | | Capt ow Vtage Dug very [| 04s _y | ig. = Bima Ouiput igh VotageOungverty | aa |__| _V_| ton= ~400xA | [toce | VocSuppiyCurent(Progamaveniy) | [75 [ma | | [ tere | Ver Supply Current (Program) [so maf e=m| Aairigheontientfervotage [ns [ws [|v [| NOTE: 1. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 7-20
A.C, PROGRAMMING CHARACTERISTICS To = 25 +5°C, Voc = 6.0V +0.25V, Vpp = 12.5V +0.3V rm | Te fm Por “aa | bol sett | rome a a Toa | ws | Addresssetptime | 2 TT os | | toes | CEsomptine | 2 | Ts | | tos | Datasowptime | 2 | Ts PO [wi | AddessHowtime ——-[o | | [=| | [ow | oatarowtine [2 || [= |_| | tore | OutputEnableto Output Float Delay | 0 | | 130 | ns | | wes | VepSetuptime | 2 TT PO | wes | VocSeuptime | 2 fT ws TO [ew | Pointe PregramPusewan | 095 | 10 | 105 | me | Woied) | | tow | FGMOverprogamPusewian | 285 | | 7075 | ms | (Note2) | Ltoc | Datavaistromoe | TT ts0 fs P| ‘AC. CONDITIONS OF TEST em sb op lt stant or bt Vp and fonger driven—see timing diagram on page 9. 721
intgligent Programming™ WAVEFORMS PROGRAM VERIFY Ya i a D Ma tas tAH (2) (0) Ma High Z va {| ‘orp (0.13) MAX 1asv Yep 50v Ves ov Voc S.0v ‘ves Vin : — Pau vu tw (95 me} toe ve (0.5) oe topw MAX vue [2.85 ms} 210326-7 NOTES: 1. All times show in [ ] are minimum and in ps unless otherwise specified. 2. The input timing reference level is 0.8V for Vj, and 2V for a Vin. 3. toe and tprp are characteristics of the device but must be accommodated by the programmer. 4, When programming the M2764A, @ 0.1 4F capacitor is required across Vpp and ground to suppress spurious voltage transients which can damage the device. 7-22