EPC2001C EPC-CO | Alldatasheet

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Technical content

eGaN® FET DATASHEET EPC2001C EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 1 EPC2001C eGaN® FETs are supplied only in passivated die form with solder bars

Applications

  • High-Frequency DC-DC Conversion
  • Industrial Automation
  • Synchronous Rectification
  • Class-D Audio
  • Low Inductance Motor Drives Benefits
  • Ultra High Efficiency
  • Ultra Low Switching and Conduction Losses
  • Zero QRR
  • Ultra Small Footprint EFFICIENT POWER CONVERSION HAL EPC2001C – Enhancement Mode Power Transistor VDS , 100 V RDS(on) , 7 mΩ ID , 36 A G D S Maximum Ratings PARAMETER VALUE UNIT VDS Drain-to-Source Voltage (Continuous) 100 V Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C) 120 ID Continuous (TA = 25°C, RθJA = 7.3) 36 A Pulsed (25°C, TPULSE = 300 µs) 150 VGS Gate-to-Source Voltage 6 V Gate-to-Source Voltage -4 TJ Operating Temperature -40 to 150 TSTG Storage Temperature -40 to 150 Thermal Characteristics PARAMETER TYP UNIT RθJC Thermal Resistance, Junction-to-Case 1 °C/W RθJB Thermal Resistance, Junction-to-Board 2 RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 54 Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. See https://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details. All measurements were done with substrate connected to source. Static Characteristics (TJ = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 300 μA 100 V IDSS Drain-Source Leakage VGS = 0 V, VDS = 80 V 100 250 µA IGSS Gate-to-Source Forward Leakage VGS = 5 V 1 5 mA Gate-to-Source Reverse Leakage VGS = -4 V 0.1 0.25 VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 5 mA 0.8 1.4 2.5 V RDS(on) Drain-Source On Resistance VGS = 5 V, ID = 25 A 5.6 7 mΩ VSD Source-Drain Forward Voltage IS = 0.5 A, VGS = 0 V 1.7 V Gallium Nitride’s exceptionally high electron mobility and low temperature coefficient allows very low RDS(on), while its lateral device structure and majority carrier diode provide exceptionally low QG and zero QRR. The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate.

eGaN® FET DATASHEET EPC2001C EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 5 Figure 12: Safe Operating Area 0.1 100 0.1 1 10 100 I D- Drain Current (A) VDS - Drain-Source Voltage (V) TJ = Max Rated, TC = +25°C, Single Pulse Pulse Width 100 ms 10 ms 1 ms 100 us limited by RDS(on) DIE MARKINGS TAPE AND REEL CONFIGURATION 4 mm pitch, 12 mm wide tape on 7” reel YYYY 2001 ZZZZ 7” reel a d e f g c b Die orientation dot Gate solder bar is under this corner Die is placed into pocket solder bar side down (face side down) Loaded Tape Feed Direction DIM Dimension (mm) EPC2001 (Note 1) Target MIN MAX a 12.00 11.90 12.30 b 1.75 1.65 1.85 c (Note 2) 5.50 5.45 5.55 d 4.00 3.90 4.10 e 4.00 3.90 4.10 f (Note 2) 2.00 1.95 2.05 g 1.50 1.50 1.60 Note 1: MSL 1 (moisture sensitivity level 1) classified according to IPC/ JEDEC industry standard. Note 2: Pocket position is relative to the sprocket hole measured as true position of the pocket, not the pocket hole. Part Number Laser Markings Part # Marking Line 1 Lot_Date Code Marking Line 2 Lot_Date Code Marking Line 3 EPC2001C 2001 YYYY ZZZZ 2001 YYYY ZZZZ Die orientation dot Gate Pad solder bar is under this corner

eGaN® FET DATASHEET EPC2001C EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 6 RECOMMENDED LAND PATTERN (measurements in µm) Pad no. 1 is Gate; Pads no. 3, 5, 7, 9, 11 are Drain; Pads no. 4, 6, 8, 10 are Source; Pad no. 2 is Substrate.* *Substrate pin should be connected to Source The land pattern is solder mask defined. RECOMMENDED STENCIL DRAWING (units in µm) Recommended stencil should be 4 mil (100 μm) thick, must be laser cut , opening per drawing. The corner has a radius of R60. Intended for use with SAC305 Type 3 solder, reference 88.5% metals content. Additional assembly resources available at https://www.epc-co.com/epc/DesignSupport/ AssemblyBasics.aspx 1362 1635 802 560 400 4105 400 180 180 Information subject to change without notice. Revised June, 2020 Efficient Power Conversion Corporation (EPC) reserves the right to make changes without further notice to any products herein to improve reliability, function or design. EPC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. eGaN® is a registered trademark of Efficient Power Conversion Corporation. EPC Patent Listing: epc-co.com/epc/AboutEPC/Patents.aspx DIE OUTLINE Solder Bar View Side View Pad no. 1 is Gate; Pads no. 3, 5, 7 , 9, 11 are Drain; Pads no. 4, 6, 8, 10 are Source; Pad no. 2 is Substrate.* *Substrate pin should be connected to Source DIM MICROMETERS MIN Nominal MAX A 4075 4105 4135 B 1602 1635 1662 c 1379 1382 1385 d 577 580 583 e 235 250 265 f 195 200 205 g 400 400 400 B A d c e g g f f

815 Max

(685) 4 5 1362 1635 560 400 4105 400 180 180 R60