DEI1030

DEI1030 DEIAZ | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 6

Technical content

Features

• Reduced part count
• True RMS Conversion
• Small foot print (8L-SOIC-NB)
• Wiring harness programmable
• Reduces multiple bus interfaces
• Stable over temperature
• DO 160C/D Category A3 Lightning Protection
• Works with 5VAC, 5VDC, 14VDC and 28VDC busses General Description The DEI1030 is designed to improve lighting bus tracking from unit to unit. Bus voltage is converted to a 0-5VDC signal level output that can be used to control analog drive of incandescent bulbs. It can provide the conditioned input to an ADC/microprocessor for pulse-width modulation, or to the control input of a DEI1090 LED Driver to emulate incandescent lamps using LED’s. The need for different bus interface devices for each bus voltage is eliminated. Bus voltage is selected via two open/ground discrete inputs permitting automatic unit adaptation to the system bus voltage. Lighting bus, common, and gain selection inputs are protected against lightning surges to DO-160C/D category A3 (waveforms 3, 4, and 5). See figures 5, 6, and 7. 50K 50K GAIN CONTROL GN0 GN1 GN0 GN1 REFERENCE GENERATOR RMS CONVERTER IN OUT OUT CAP INPUT AMPLIFIER UNITY GAIN BUFFER OUT CAP VDD BUS COM GN0 GN1 GND Device Engineering Incorporated

385 East Alamo Drive

Chandler, AZ 85225 Phone: (480) 303-0822 Fax: (480) 303-0824 E-mail: admin@deiaz.com DEI 1030 Lighting Bus Mapping Circuit Figure 2: DEI1030 Pinout 1GN0 GN1 CAP GND VDD BUS COM OUT Figure 1: DEI1030 Block Diagram

© 2017 Device Engineering Incorporated Page 2 of 6 DS-MW-01030-01 Rev. C 07/05/2017 Table 1: Pin Definitions PIN # NAME SYMBOL DEFINITION

1 Gain Select 0 GN0 Lightning protected* gain select input

2 Gain Select 1 GN1 Lightning protected* gain select input

3 Capacitor CAP Capacitor connection to VDD for 5VRMS to DC conversion.

4 Ground GND Circuit ground reference

5 Output OUT Circuit output to lamp driver. 6 Common COM Lightning protected* reference input from lighting bus. 7 Bus Input BUS Lightning protected* circuit input from lighting bus. 8 Supply Voltage VDD Circuit input voltage. *Protected from lightning surges to DO160C/D category A3. See figures 5, 6, and 7. The DEI 1030 input stage is a differential to single-ended converter with variable gain. The GN0 and GN1 inputs control the gain of this circuit. Following the differential input stage is an RMS-to-DC converter, which provides a DC output voltage proportional to the RMS value of its input. The circuit is intended to interface various lighting systems to a 0 ~ 5 volt internal standard. Three gain settings are provided. If both gain pins are grounded (GN0 = GN1 = 0), the circuit will output a DC voltage that is equal to the RMS value of the input. Because of the RMS conversion, either polarity of input DC voltage results in the same output. A true sine waveform will give a DC output that is equal to the RMS value of the input. A distorted sine, or any other waveform (at low enough frequency) will give a DC output voltage that is approximately equal to the RMS value of the input. Thus in this gain mode, either a zero-to- 5 V DC or 400Hz sinusoidal input will result in a zero-to-5 V DC output. A filter capacitor is used in the RMS-to-DC conversion. A value of at least 0.22 µF is recommended. A larger value will reduce the ripple (at 2x the input frequency) at the output. FUNCTION TABLE GN1 GN0 INPUT FORMAT DC GAIN 0 (Gnd) 0 (Gnd) 5V 5V 0 (Gnd) 1 (Open) 14V 0.357 1 (Open) 0 (Gnd) 19V (not used) 0.263 1 (Open) 1 (Open) 28V 0.179 Table 2: ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNITS Supply Voltage V DD 16.5 V Input Voltage (Pins BUS, COM, GN0, GN1) Vin VSS -10 to VDD +40 V Lightning Protection (BUS, COM, GN0, GN1; DO160C/D, Waveforms 3, 4* and 5*; Level 3) VLTG ± 600 ± 300* V Output Current (Pin OUT) I out 50 mA Peak Body Temperature -G Package 260 Storage Temperature T STG -65 to 125 °C Note: The DEI1030 contains circuitry to protect inputs against damage due to high voltage static discharge. Normal precautions must be used in handling these devices.

© 2017 Device Engineering Incorporated Page 3 of 6 DS-MW-01030-01 Rev. C 07/05/2017 Table 3: Operating Range PARAMETER SYMBOL MIN TYP MAX UNITS Supply Voltage VDD 10.8 12 13.2 V Supply Current (VDD = 13.2V, VBUS – VCOM = 0) IDD 9 mA Operating Temperature TO -55 85 °C Table 4: Electrical Characteristics Unless noted, operating connections: VDD = 12V ± 10%, VCOM = 0V, T = -55°C to +85°C, GN0 = “low”, GN1 = “low” PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT CHARACTERISTICS DC Output voltage VO1 VBUS - VCOM = 0 GN0 = GN1 = “low“ T = -55°C mV DC Output voltage VO2 VBUS - VCOM = 2.5 V DC GN0 = GN1 = “low“ T = -55°C 2.4 2.33 2.6 2.6 V DC Output voltage VO3 VBUS - VCOM = 5.0 V DC GN0 = GN1 = “low“ T = -55°C 4.8 4.75 5.2 5.2 V DC Output voltage VO4 VBUS - VCOM = 5.0Vrms, 400Hz GN0 = GN1 = “low“ 4.8 5.2 V DC Output voltage VO5 VBUS - VCOM = 14.0 V DC GN0 = “high “, GN1 = “low “ 4.8 5.2 V DC Output voltage VO6 VBUS - VCOM = 28.0 V DC GN0 = “high “, GN1 = “high“ T = -55°C 4.8 4.75 5.2 5.2 V INPUT CHARACTERISTICS Signal input resistance RI Single-ended input resistance: BUS or COM (1) 30 80 kW Common-mode input range VCOM Voltage on COM pin for less than 1% change in output voltage (1) -2 2 V GAIN CONTROL INPUT CHARACTERISTICS Gain select low level voltage VIL GN0, GN1 input voltage to guarantee “low” input 3.0 V Gain select high level voltage VIH GN0, GN1 input voltage to guarantee “high” input 3.5 V Gain select low level resistance (GND) RIL GN0, GN1 input resistor to ground to guarantee “low” input 100 W Gain select high level resistance (OPEN) RIH GN0, GN1 input resistor to ground to guarantee “high” input 100k W Gain select source current IG Input voltage = 0 -100 mA Notes: 1. Guaranteed by design and not production tested.

© 2017 Device Engineering Incorporated Page 5 of 6 DS-MW-01030-01 Rev. C 07/05/2017

Ordering Information

Package Information

Table 6: Package Characteristics PACKAGE TYPE

8 Lead SOIC

Narrow Body, Green REFERENCE 8L NB SOIC G THERMAL RESISTANCE: qJA (4 layer PCB with Power Planes) qJC 135 °C/W 40 °C/W JEDEC MOISTURE SENSITIVITY LEVEL (MSL) MSL 1 / 260°C LEAD FINISH MATERIAL / JEDEC Pb-free CODE NiPdAu Pb-Free DESIGNATION RoHS Compliant JEDEC REFERENCE MS-012-AC Table 5: Ordering Information DEI PART NUMBER MARKING PACKAGE TEMP RANGE DEI1030-G DEI1030 E4 8L NB SOIC G -55 / +85 °C DEI reserves the right to make changes to any products or specifications herein. DEI makes no warranty, representation, or guarantee regarding suitability of its products for any particular purpose.

© 2017 Device Engineering Incorporated Page 6 of 6 DS-MW-01030-01 Rev. C 07/05/2017 Figure 8: Mechanical Outline 8 Lead NB SOIC – G Package