CLE20E1200PC IXYS | Alldatasheet

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Backside: anode TAV TV V 1.54 RRM 1200 V = V I = A H3B ESD Level: Features / Advantages: Applications: Package:

  • Thyristor for line and moderate frequencies
  • Short turn-off time
  • Planar passivated chip
  • Long-term stability
  • Line rectifying 50/60 Hz
  • Softstart AC motor control
  • DC Motor control
  • Power converter
  • AC power control
  • Lighting and temperature control TO-263 (D2Pak)
  • Industry standard outline
  • RoHS compliant
  • Epoxy meets UL 94V-0 The data contained in this product data sheet is ex clusively intended for technically trained staff. T he user will have to evaluate the suitability of th e product for the intended application and the completeness of the product data with respect to his application. The specifications of our compon ents may not be considered as an assurance of component characteristics. The information in the valid application- and assembly notes must be considered. Should you require produc t information in excess of the data given in this p roduct data sheet or which concerns the specific application of your product, please co ntact the sales office, which is responsible for yo u. Due to technical requirements our product may conta in dangerous substances. For information on the typ es in question please contact the sales office, whi ch is responsible for you. Should you intend to use the product in aviation, i n health or live endangering or life support applic ations, please notify. For any such application we urgently recommend - to perform joint risk and quality assessments; - the conclusion of quality agreements; - to establish joint measures of an ongoing product survey, and that we may make delivery dependent on the realization of any such measures. Terms Conditions of usage: IXYS reserves the right to change limits, condition s and dimensions. 20160718b Data according to IEC 60747and per semiconductor un less otherwise specified © 2016 IXYS all rights reserved

V = V A²s A²s A²s A²s Symbol Definition Ratings typ. max. I V I A VT 1.54 R 1 K/W min. V V

100 T = 25°C VJ

T = °C VJ mA 2V = V T = 25°C VJ I = A T V T = °C C 95 Ptot 125 WT = 25°C C 1200 forward voltage drop total power dissipation Conditions Unit 2.03 T = 25°C VJ 125 VT0 V0.87 T = °C VJ 150 rT 34 mΩ V1.54 T = °C VJ I = A T V 2.17 I = A 40 I = A 40 threshold voltage slope resistance for power loss calculation only µA 125 V V1200 T = 25°C VJ PGM Wt = 30 µs 5max. gate power dissipation P T = °C C 150 Wt = 2.5 P PGAV W0.5 average gate power dissipation CJ 7junction capacitance V = V 400 T = 25°C f = 1 MHz R VJ pF ITSM t = 10 ms; (50 Hz), sine T = 45°C VJ max. forward surge current T = °C VJ 150 I²t T = 45°C value for fusing T = °C 150 V = 0 V R V = 0 V R V = 0 V V = 0 V t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine t = 10 ms; (50 Hz), sine t = 8,3 ms; (60 Hz), sine VJ R VJ R thJC thermal resistance junction to case T = °C VJ 150 160 175 A A A A 135 145 130 125 1200 300 µs TAV 180° sine average forward current (di/dt) cr A/µs 100 repetitive, I = TVJ = 125°C; f = 50 Hz critical rate of rise of current VGT gate trigger voltage V = 6 V T = °C 25 (dv/dt) T = 125°C critical rate of rise of voltage A/µs 500 V/µs t = µs; I A; V = ⅔ V R = ∞; method 1 (linear voltage rise) VJ D VJ 60 AT P G = 0.15 di /dt A/µs; G =0.15 DRM cr V = ⅔ V DRM GK 500 1.5 V T = °C -40 VJ IGT gate trigger current V = 6 V T = °C 25 D VJ 40 mA T = °C -40 VJ 2.5 V 70 mA VGD gate non-trigger voltage T = °C VJ 0.2 V IGD gate non-trigger current 3 mA V = ⅔ V D DRM 125 latching current T = °C VJ 60 mA IL 25 t µs p = 10 I A; G = 0.1 di /dt A/µs G = 0.1 holding current T = °C VJ 50 mA IH 25 V = 6 V D R = ∞GK gate controlled delay time T = °C VJ 2 µs tgd 25 I A; G = 0.1 di /dt A/µs G = 0.1 V = ½ V D DRM turn-off time T = °C VJ 100 µs tq di/dt = A/µs 10 dv/dt = V/µs 1000 V = R 20 V; I A; T = 20 V = ⅔ V DRM t µs p = 200 non-repet., I = 20 AT 125 RthCH thermal resistance case to heatsink K/W Thyristor 1300 RRM/DRM RSM/DSM max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage R/D reverse current, drain current T T R/D R/D 200 0.25 IXYS reserves the right to change limits, condition s and dimensions. 20160718b Data according to IEC 60747and per semiconductor un less otherwise specified © 2016 IXYS all rights reserved

Part No. Logo Assembly Code XXXXXXXXX IXYS Zyyww 000000 Assembly Line C L E E 1200 PC Part description Thyristor (SCR) High Efficiency Thyristor Semifast (up to 1200V) Single Thyristor TO-263AB (D2Pak) (2) Current Rating [A] Reverse Voltage [V] Package Top °C TVJ °C 150 virtual junction temperature -40 Weight g2 Symbol Definition typ. max. min. Conditions operation temperature Unit FC N60 mounting force with clip 20 IRMS RMS current 35 Aper terminal 125 -40 TO-263 (D2Pak) Delivery Mode Quantity Code No. Ordering Number Marking on Product Ordering CLE20E1200PC 512774 Tape & Reel 800 CLE20E1200PC Standard Tstg °C 150 storage temperature -40 threshold voltage V0.87 mΩ V0 max R0 max slope resistance * 36 Equivalent Circuits for Simulation T = VJ I V0 R0 Thyristor 150 °C * on die level IXYS reserves the right to change limits, condition s and dimensions. 20160718b Data according to IEC 60747and per semiconductor un less otherwise specified © 2016 IXYS all rights reserved

W A c L E 2x e L1 D 321 3.81 (0.150) 1.78 (0.07) 2.54 (0.100) 3.05 (0.120) 10.92 (0.430) 9.02 (0.355) mm (Inches) Recommended min. foot print 3x b2 2x b H Supplier Option min max min max A 4.06 4.83 0.160 0.190 b 0.51 0.99 0.020 0.039 b2 1.14 1.40 0.045 0.055 c 0.40 0.74 0.016 0.029 c2 1.14 1.40 0.045 0.055 D 8.38 9.40 0.330 0.370 D1 8.00 8.89 0.315 0.350 E 9.65 10.41 0.380 0.410 E1 6.22 8.50 0.245 0.335 e H 14.61 15.88 0.575 0.625 L 1.78 2.79 0.070 0.110 L1 1.02 1.68 0.040 0.066 W typ. 0.02 0.040 typ. 0.0008 0.002 Dim. Millimeter Inches typ. 0.10 typ. 0.004 2.41 0.095 0.098 4.28 0.169 All dimensions conform with and/or within JEDEC standard. 2,54 BSC 0,100 BSC 2.5 4 1 Outlines TO-263 (D2Pak) IXYS reserves the right to change limits, condition s and dimensions. 20160718b Data according to IEC 60747and per semiconductor un less otherwise specified © 2016 IXYS all rights reserved

0.01 0.1 1 100 120 140 10 0 10 1 10 2 103 10 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 ITSM [A] IT [A] VT [V] t [ms] ZthJC [K/W] 2 3 4 5 6 7 8 9 0 11 100 1000 I2t [A2s] t [ms] IT(AV)M [A] TC [°C] 0 25 50 75 100 125 150 175 Fig. 1 Forward characteristics Fig. 3 I 2t versus time (1-10 ms) t [s] Fig. 6 Max. forward current at case temperature Fig. 2 Surge overload current Fig. 8 Transient thermal impedance junction to case TVJ = 25°C TVJ = 125°C TVJ = 45°C

50 Hz, 80% VRRM

TVJ = 125°C TVJ = 45°C VR = 0 V125°C 150°C 0 10 20 IT(AV) [A] P(AV) [W] Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient temperature Tamb [°C] dc = 0.5 0.4 0.33 0.17 0.08 10 100 1000 100 1000 1 10 100 1000 0.1 100 IG [mA] VG [V] tgd [µs] IG [mA] typ. Limit TVJ = 125°C Fig. 4 Gate trigger characteristics Fig. 5 Gate controlled delay time IGD, TVJ = 125°C 4: PGAV = 0.5 W 5: PGM = 2.5 W 6: PGM = 5 W 1: IGD, TVJ = 125°C 2: IGT, TVJ = 25°C 3: IGT, TVJ = -40°C 0 50 100 150 dc = 0.5 0.4 0.33 0.17 0.08 Rthi [K/W] t i [s] 0.13 0.01 0.11 0.0011 0.26 0.025 0.25 0.32 0.25 0.09 RthHA 0.6 0.8 1.0 2.0 4.0 8.0 Thyristor IXYS reserves the right to change limits, condition s and dimensions. 20160718b Data according to IEC 60747and per semiconductor un less otherwise specified © 2016 IXYS all rights reserved