M8257 INTEL | Alldatasheet

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ABSOLUTE MAXIMUM RATINGS* NOTICE: This is a production data sheet. The specifi- 1: un cations are subject to change without notice. Case Temperature , 7 Maximum Ratings” may cause permanent damage. Voltage on Any Pin teoa eps pitied fe “Operating Conhtons” i - ure 8 OPERATING CONDITIONS [| Symbor [Parameter] Min [Max [Units Case Tonperate(raaniOn) | -85_| +18 [0 | [Ves [ita SopyVatage [480] 80 v | D.C. CHARACTERISTICS (Over Specified Operating Conditions) [symbol | Paranwier | Win | Max | Unt’ |Comments] Ci __[tettowvotage [08 | 08 vp [ini rmutighVotoge [22 | Vous 08 | VP] [eu put tow vatags | [048 | -v_[ teak Vou Output High Voltage Voc V_| ton = — 180 pA for AB, DB and AEN lon = —80 yA for Others HRQOutputHigh Voltage | 33 | Voc [Vv | lon=-80uA | [es | Ves GureniGran [80 [a | toutvesiage | | 310 | a | Was Stn ote loFL Output Leakage During Float 10 HA | Veg + 0.45 < Vout < Voc CAPACITANCE Tc = 25°C, Voc = GND = OV [Symbol [Parameter | win | Typ [Wax [Unt [Comments [en | pu Capectace [| [0 oF | ee Cvo 170 Capacitance Unmeasured Pins Returned to GND A.C, CHARACTERISTICS—DMA (MASTER) MODE (Over Specified Operating Conditions) TIMING REQUIREMENTS Sante pe [aac [4 fe Clock Active (High) | 120 | oatoy [ns | DaOT Seupioe 1 Si,89 | to [| re HAT or LSeupioe 161.89 | 09 [ro READY Seip Tino 107 183,80) [80 [ |e | READY Hol Tere tom 7 (63,8w) | 99 [| =] 17-16

intel 8257 , ON A.C. CHARACTERISTICS—DMA (MASTER) MODE (Over Specified Operating Conditions) TIMING RESPONSES Toa HRQT or | Delay from 8 T (SI, $4) (Measured at 2.0V)(1) Toor HROT or | Delay from 6 T (SI, $4) 270 (Measured at 3.3V)(3) AEN T Delay from @ 1 (S1)() [300 ns | AEN | Delay from @ T (Si) [200 | ns AB Acve) Dleyrom ENTS | |__| re | Adr(AB)(Active) Delay from @ T (S1)) es Adr(AB)(Float) Delay from 6 T (SN@ [200s Adr(AB)(Stable) Delay from 6 T ($1) ee ee Adr(AB)(Stable) Hold from @ T (S1)@) | tasm— 50 [| ns ‘Adr(AB)(Valid) Hold from Fd T (S1, S14 ee ee | Adr(AB)(Valid) Hold from Wr T (1. SY) [300] os Adr(OB\\Active) Delay from 6 T(S1)@) [300 ns | At OByFload Oeay rom 07 ($22 [tera | 250 [ne “Adr(DB) Setup to AdrStb | (S1-S2)(4) [too Ts ‘Adr(DB)(Valid) Hold from AdrStb | ($2) a ee ee AdrStb T Delay from 6 T (S1)(”) fo 20 ns AdrStb | Delay from 6 T (S2)() [i t60 ns AdrStb Width (S1-S2)(4) [Toy 100 | ns FAL orWiiG) | Delay tromaasw Lisa | 7 || ns | Toac Fd 1 or Wr(Ext) |. Delay from Adr(DB) (Float)(S2)(4) TaK DACKT or | Delay from @ | (S2, $1) and 270 TC/Mark T Delay from 6 T ($3) and TC/Mark | Delay from 8 T (S4)(1X8) Toot Rd J or Wi(Ext) | Delay from @ T (S2) and |= | Wr | Delay from 6 T (S3)(2X6) Tpct Rd T Delay frome | ($1, SI) and Wr T Delay from @ T (S4)(2)(7) 1 7 Fid or WriActive) trom 8 T (S1)2) [300 ns | Fd or Wr(Float) from @ T (SN) [ t70 |e | Ra Width (S2-S1 or S)(4) | 2toy+Te-s0 [| ns | Wr width (S3-S4)(®) [toy-so {| | ns | Wr(Ext) Width (S2-S4)6) [atcv-so | ts NOTES: 1. Load = 1 TTL. 5. ATak < 50 ns. 4. Tracking Parameter. 17-17

A.C. CHARACTERISTICS—PERIPHERAL (SLAVE) MODE (Over Specified Operating Conditions) M8080A BUS PARAMETERS READ CYCLE Aero Seupol [0 || | nicer HoWdtomeT | |_| mw» | +d Data Access from RD | [0 | 30 | ns | moto |

06 Float DeaytomAOT [20 [160 [m= |_|

a WRITE CYCLE [_ Symbor_| Parameter [min [max [unit | Comments | RasoupwWAL [0 [|= | havlstonWaT [os [| = | DaaseuproWAt [200 | | —*d Wawa [se OTHER TIMING Reset ase We es Power SupplyT (Voc)SetuptoReset! | soo | | us | | [tase | eestor OWA it | dt | i? NOTES: 1. All timing measurements are made at the following reference voltages unless specified otherwise: Input “1” af 2.0V, “0” at 0.8V. Output “1” at 2.0V, “0” at 0.8V. : 2. M8257: C, = 100 pF. TRACKING PARAMETERS Suppose the following timing equation is being eval- uated, Signals labeled as Tracking Parameters (footnotes 4-7 under A.C. Specifications) are signals that fol- Tain) + Teemaxy = 160 ns. low similar paths through the silicon die. The propa- gation speed of these signals varies in the manufac- and only minimum specifications exist for Ta and Tg. turing process but the relationship between all these 'f Tain) is used, and if Ta and Tg are tracking pa- parameters is constant. The variation is less than or rameters, Tgyqax) can be taken as Tayqin) + 50 ns. equal to 50 ns. Taqwin) + (Taqainy® + 50 ns) < 150 ns. “HT, and Tg are tracking parameters. 17-18

A.C. TESTING INPUT, OUTPUT WAVEFORM A.C, TESTING LOAD CIRCUIT wonourt a ‘UNOER SS arr Z deme sa a . 1 ooa0es-3 coases-4 ‘AC. Testing: Inputs are Driven at 2.4V for @ Logie "1" and 0.45V Oy = 150 pF for a Logie"0" Timing Measurements are Made at 2.0V for a Cy Includes Jig Capacitance Cio nd ov tre topo" WAVEFORMS NOT READY SEQUENCE re ee ‘cLocK . onoss N oe = ones | waa wurpon ea eT > ---- veuntsoun =a CRETE ET a Tas" Tas aos --- 7 003965-5 CONTROL OVERRIDE ye pepepepepepe aad i wo Tas, Nes aoe Tae wo cosees- 17-19

WAVEFORMS—DMA MODE CONSECUTIVE CYCLES AND BURST MODE SEQUENCE eleterw i hrereteperere;uqeye moos Be wl | Sime - a fom9 Pema ae es --- le ote —t _-- A t — " Wd [xno = --- tt | ew 2D EE tL oI wleledadlelolalslololaledad.s oosees-7 NOTE: The clock waveform is duplicated for clarity. The M8257 requires only one clock input. 17-20

WAVEFORMS—PERIPHERAL MODE WRITE Tow Ta cwrmeuter sooness aut Vase oarawur Tow Two vown RESET rare i Tow never F Vast * 003965-8 READ CHF ELECT Tan Tea aooness us San Tha To

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