2764A INTEL | Alldatasheet
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Technical content
2764A is also directly compatible with the 12 MHz 8051 family. or choosing between non-volatile memory alternatives. *HMOS is a patented process of Intel Corporation. Figure 1. Block Diagram
Intel “Universal Site’-Compatible EPROM pin configurations are shown in the blocks adjacent to the 2764A pins. Figure 2. Cerdip Pin Configuration
a EXTENDED TEMPERATURE available with 168 +8 hour, 125°C dynamic burn-in (EXPRESS) EPROMs using Intel's standard bias configuration. This pro- cess exceeds or meets most industry specifications The Intel EXPRESS EPROM family is a series of of burn-in. The standard EXPRESS EPROM operat- electrically programmable read only memories which _ing temperature range is 0°C to 70°C. Extended op- have received additional processing to enhance _—efating temperature range (— 40°C to +85°C) EX- product characteristics. EXPRESS processing is PRESS products are available. Like all Intel available for several densities of EPROM, allowing EPROMs, the EXPRESS EPROM family is inspected the choice of appropriate memory size to match sys to 0.1% electrical AQL. This may allow the user to tem applications. EXPRESS EPROM products are reduce or eliminate incoming inspection testing. EXPRESS EPROM PRODUCT FAMILY EXPRESS OPTIONS PRODUCT DEFINITIONS 2764A VERSIONS Operating Temperature | Burn-in 125°C (hr) Packaging Options [a | ocwrmo [eee | Speed Versions Cerdip [1 [=avcw rec [None | [eo att READ OPERATION D.C. CHARACTERISTICS Electrical parameters of EXPRESS EPROM products are identical to standard EPROM parameters except for: TD2764A Parameter LD2764A Test Conditions [iso | Voc Stanabyurentimay | | 40 | CE = Vin OE = Vin loo VecAetiveCurrentima) | —s«|_-100-«| ~=<OE=CE= Vy Vec Active Current 75 OE - CE=ViL at High Temperature (mA) Vep = Voc: Tampient = 85°C NOTE: 1. The maximum current value is with outputs Op to O7 unloaded. ar Veet 2819 Voc ay Q2 27 prow as opine 30 ys Ags 25. As lal asqs za Ay ads 23D An Ao J | J j sq" 27644 22 PoE as 21D Avo Ads 2D PY Ay J | j Yooq Ao 10 19P 0, 0) bed ae : og Uveed is Heed 0, - 230864~10 Vest] 1a ‘5 os Binary Sequence from Ag to Ara 230864-9 OE = +5V R= 1K Vog = +5V Vpp — +8V Vs ~ GND GE = GND PGM = +5V Burn-in Bias and Timing Diagrams 5-20
ABSOLUTE MAXIMUM RATINGS* Voc Supply Voltage with Respect Operating Temperature During Read . . cece esses. O°C to +70°C NOTICE: This Is a " . Production data sheet. The specifi- All Inputs or Output Voltages with ARABNING: Stressing the device beyond the “Absolute Voltage on Pin 24 with These are stress ratings only. Operation beyond the Respect to Ground -0.6Vto +13.5v Operating Conditions” is not recommended and ex. Vpp Supply Voltage with may affact device reliability. Respect to Ground READ OPERATION D.C. CHARACTERISTICS 0°C < Ta < +70°C _ [min max [ “io [ouput atage Curent [0a [—e@ [Von GurentRens 8 i ere = [sp [Vos urent taney [asa VooGurentacie |_| 7%» | ma 8 0E=y, iouttowVotage | at v0a |v [vn | inp igh Vote 20 |e [Vox | Outouttow vote [os atm id [Vou | ouputhignvonage | aa [| tou = 000 |
38 Wes
A.C. CHARACTERISTICS 0°C < Ta < +70°C | Veo=s% [ areaay [ 27eaaz[aesa Test [ Vectto» [7 | areaaz0 | 276en.zs | unt Conditions | __Symbot [Parameter [win [Max |" win [Max [win [Max | Address to CE=OE=VYyy Output Delay [= fom |e ee ee Delay a Delay OE High to CE=Vi Output Float ton) Output Hold CE=OE-Vi_ from Address, CE or OF Whichever Occurred First NOTES: 1. Veg must be appliod simultaneously or before Vpp and removed simultaneously or after Vpp. 2. Vpp may be connected directly to Voc except during programming. The supply currant would then be the sum of Ig and Ipp. The maximum current value is with outputs Oo to O7 unloaded. 3. This parameter is only sampled and Is not 100% tested. Output Data Float is defined as the point where data is no longer driven—see timing diagram on the following page. 4, Model Number Prefixes: No prefix = CERDIP. 5-21
CAPACITANCE(2) (T, = 25°C, f = 1 MHz) A.C. TESTING INPUT/OUTPUT WAVEFORM A.C. TESTING LOAD CIRCUIT sav 24 20 20 A wove aad 20 ee rest poms <2 )X © ourrur sa “ ad Nese C > 100 pF AC. Testing; Inputs are Driven at 2.4V for a Logic "1" and 0.45V L for a Logic “0”. Timing Measurements are made at 2.0V for a 7 Logic “1” and 0.8V for a Logic “0”. 230864-4 Cy. = 100 pF © Includes Jig Capacitance A.C. WAVEFORMS aoness aoonesses VAUD Wwe x | leer | vu oe lt toe” | ouTPUT: mont VALID OUTPUT mont 230864-5 NOTES: 1. Typical values are for T, = 25°C and nominal supply voltages. 2. This parameter is only sampled and is not 100% tested. 3. OE may be delayed up to tce-toe after the falling edge of CE without impact on tce. 5-22
Table 1. A single 5V power supply is required in the mon connection to all devices in the array and con- Table 1. Mode Selection output pins are active only when data is desired from [Cina] @ particular memory device.
- X can be Viq or Vip. sociated transient voltage peaks can be suppressed
- See Table 2 for Voc and Vpp voltages. mended that a 0.1 4F ceramic capacitor be used on
vice selection. Assuming that addresses are stable, effect of PC board-traces. . Initially, all bits of the EPROM are in the “1” state. a) the lowest possible memory power dissipation, data inputs are TTL.
Program Inhibit dress line AO from Vi, to Vjy. All other address lines must be held at Vi_ during intgligent Identifier Mode. Programming of multiple EPROMs in parallel with different data is easily accomplished by using the Byte 0 (AO = Vj.) represents the manufacturer code Program Inhibit mode. A high-level CE or PGM input and byte 1(A0 = Viy) the device identifier code. inhibits the other devices from being programmed. These two identifier bytes are given in Table 1. Except for CE, all like inputs (including OE) of the parallel EPROMs may be common. A TTL low-level ERASURE CHARACTERISTICS pulse applied to the CE input with Vpp at its pro- . gramming voltage (see Table 2) will program the se- The erasure characteristics are such that erasure lected device. begins to occur upon exposure to light with wave- lengths shorter than approximately 4000 Angstroms (A). tt should be noted that sunlight and certain i types of fluorescent lamps have wavelengths in the Program Verify 3000-4000 A range. Data shows that constant ex- A verify should be performed on the programmed posure to room level fluorescent lighting could erase bits to determine that they have been correctly pro- the EPROM in approximately three years, while it grammed. The verify is performed with OE at Vit, would take approximately one week to cause era- PGM at Viy and Vpp and Vcc at their programming sure when exposed to direct sunlight. If the EPROM voltages. is to be exposed to these types of lighting conditions for extended periods of time, opaque labels should be placed over the window to prevent unintentional inteligent Identifier™ Mode erasure. The intgligent Identifier Mode allows the reading out The recommended erasure procedure is exposure of a binary code from an EPROM that will identify its to shortwave ultraviolet light which has a wavelength manufacturer and type. This mode is intended for of 2537 Angstroms (A). The integrated dose (i.e., UV use by programming equipment for the purpose of intensity < exposure time) for erasure should be a automatically matching the device to be pro- minimum of fifteen (15) Wsec/cm?. The erasure grammed with its corresponding programming algo- time with this dosage is approximately 15 to 20 min- rithm. This mode is functional in the 25°C +5°C am- utes using an ultraviolet lamp with a 12,000 pW/cm2 bient temperature range that is required when pro- power rating. The EPROM should be placed within gramming the device. one inch of the lamp tubes during erasure. The maxi- mum integrated dose an EPROM can be exposed to To activiate this mode, the programming equipment without damage is 7258 Wsec/cm2 (1 week @ must force 11.5V to 12.5V on address line AQ of the 12000 »W/cme2), Exposure of the EPROM to high EPROM. Two identifier bytes may then be se- intensity UV light for longer periods may cause per- quenced from the device outputs by toggling ad- manent damage. 5-24
Figure 3. Intelligent Programming™ Flowchart Of intel’s 12.5V CERDIP EPROMS. Plastic EPROMS —_ond pulses per byte are provided for before the over. may also be programmed using this method. A flow- program pulse is applied. duration of the initial PGM pulse(s) is one millisec- pared to the original data with Voc = Vpp = 5.0V.
D.C. PROGRAMMING CHARACTERISTICS T, ~ 25°C +5°C [i [input Current (aitinputsy | Tt] | v= Yori | [vic input cow Level @iiinpusy | or fos [vf [Vin | tnputHightevel | 20 | Moo | vv | | orf Quputiow Yotage Dung erty ___}___} 048 fio. = 2m Output High Voltage During Verity | 24 | | VT to = -400pA | [coat | Voc Supply Current (Program avery) | [75 [ ma [ [ppt | Vep Supply Current (Program) || 80 | ma | CE= Mu [Vio | Avintgligentidentiier Voltage | 15 | 126 | v [| Voc | intgligent Programming Algorithm | 6.75 | 625 [ v [ | A.C. PROGRAMMING CHARACTERISTICS Ta = 25°C 15°C (see table 2 for Voc and Vpp voltages) Test Conditions" | symvot| | Min | typ [| Max | unit | (see Note 1) [tas | Address SoupTime | 2 TT Ts PO [ot os PO [tai | AdaressHoiatime | oo TTT ws [ton | DataHoistime To | TT os | Pees ee | Float Delay [ tyes | VepSetuptime | 2 [TP os | [ives | VocSetuptime | 2 TT os PO [ices | CEsetuptime fe Ts TO [tow | PGMinitial Program Pulse with | 0.05 | 10 | 1.05 | ms [| Data Valid from OF a “A.C. CONDITIONS OF TEST 1 Vee must be applied simultaneously or before Vpp and msec to 78.75 msec as a function of the iteration counter 4. The maximum current value is with Outputs Oo to O7 unloaded. 5-26
us | ta ; ALS - wasv Ver ov vrs sov Yoo ov Nes Yu Me ° 5 | Mu Vo P= E torw Ww 2308648 NOTES: 1. The input timing reference level is 0.8V for Vi, and 2V for a Vi. 2. tog and tprp are characteristics of the device but must be accommodated by the programmer. 3. When programming the 2764A, a 0.1 uF capacitor is required across Vpp and ground to suppress spurious voltage transients which can damage the device.
REVISION HISTORY
06 Deleted Plastic DIP package. Deleted QuickPulse sections. Revised Pin Configuration. Revised Express options. Deleted ~3, —30, —4 and — 45 speed bins. D.C. Characteristics - |_| Conditions are Vij = OV to Vec O.C. Characteristics - |_@ Conditions are Vout = OV to Veco 5-27