UFB25SC12E1BC3N QORVO | Alldatasheet

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w ESD protected: HBM class 2 and CDM class C3 w Low intrinsic capacitance w Induction heating 1200V-25A SiC Full-Bridge Module This SiC FET device is based on a unique ‘cascode’ circuit configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The device’s silicon-like gate-drive characteristics allows the use of unipolar gate drives, compatible with Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction devices. Available in the E1B module package, this device exhibits ultra-low gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads, and any application requiring standard gate drive. Advanced Ag sintering die attach technology gives the module superior thermal performance. Part Number Marking UFB25SC12E1BC3N UFB25SC12E1BC3N w On-resistance: RDS(on) = 35mW (typ) w Operating temperature: 150°C (max) w Excellent reverse recovery: Qrr = 244nC w Low body diode voltage: VFSD= 1.4V w Low gate charge: QG = 42.5nC w EV charging w PV inverters w Switch mode power supplies w Power factor correction modules w Threshold voltage VG(th): 5V (typ) allowing 0 to 15V drive w Motor drives DATASHEET UFB25SC12E1BC3N Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 1

-20 to +20 V -25 to +25 V 36 A 25 A IDM 175 A Ptot 114 W TJ,max 150 °C TJ, TSTG -55 to 150 °C 1. Limited by TJ,max 2. Pulse width tp limited by TJ,max Thermal Characteristics Min Typ Max RqJC 0.85 1.1 °C/W NTC Thermistor Characteristics Min Typ Max R25 5 kW DR/R -5 5 % P25 20 mW B25/50 3375 K Module Symbol Value Units VISOL 3 kV Al2O3 11.5 6.3 LsCE 11 nH Test Conditions Isolation voltage RMS, f = 50 Hz, t = 1 min Internal isolation Terminal to terminal mm mm Stray inductance module TC = 25°C Units Rated resistance TNTC = 25°C TNTC = 25°CResistance value tolerance Parameter Units Value TC = 25°C Power dissipation per switch TC = 25°C Maximum junction temperature Continuous drain current 1 ID Operating and storage temperature TC =90°C Test Conditions Pulsed drain current 2 Symbol Parameter Symbol Clearance distance Power dissipation TNTC = 25°C B constant Terminal to heatsink Terminal to terminal Creepage distance R2 = R25 exp [B25/50 (1/T2 - 1/(298.15 K))] Value Thermal resistance, junction-to-case per switch Test Conditions Parameter Terminal to heatsink Gate-source voltage VGS DC AC (f > 1Hz) Parameter Test Conditions Drain-source voltage Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 2

SiC FET Electrical Characteristics (TJ = +25°C unless otherwise specified) Typical Performance - Static Min Typ Max BVDS 1200 V 8 150 IGSS 6 20 mA 35 45 VG(th) 4 5 6 V RG 4.5 W Typical Performance - Reverse Diode Min Typ Max IS 36 A IS,pulse 175 A 1.4 2 1.8 Qrr 244 nC trr 29 ns Qrr 227 nC trr 28 ns Value Units mATotal drain leakage current IDSS Units Forward voltage VFSD VGS=0V, IS=20A, TJ=25°C Reverse recovery charge Parameter Gate threshold voltage VDS=5V, ID=10mA Gate resistance f=1MHz, open drain Drain-source breakdown voltage VGS=0V, ID=4mA VDS=1200V, VGS=0V, TJ=25°C VDS=1200V, VGS=0V, TJ=150°C VVGS=0V, IS=20A, TJ=150°C Diode continuous forward current 1 TC =25 °C Diode pulse current 2 TC = 25°C Drain-source on-resistance RDS(on) mW Parameter Symbol Test Conditions Value Test ConditionsSymbol Reverse recovery charge VDS=800V, IS=25A, VGS=0V, RG=33W, di/dt=2200A/ms, TJ=150°CReverse recovery time Total gate leakage current VGS=12V, ID=25A, TJ=125°C VDS=0V, TJ=25°C, VGS=-20V / +20V VGS=12V, ID=25A, TJ=25°C VGS=12V, ID=25A, TJ=150°C Reverse recovery time VDS=800V, IS=25A, VGS=0V, RG=33W, di/dt=2200A/ms, TJ=25°C Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 3

Typical Performance - Dynamic Min Typ Max Ciss 1450 Coss 94 Crss 1.7 Coss(er) 120 pF Coss(tr) 265 pF Eoss 38 mJ QG 42.5 QGD 9.5 QGS 15.5 td(on) 53 tr 15 td(off) 54 tf 11 EON 557 EOFF 44 ETOTAL 601 td(on) 50 tr 12 td(off) 55 tf 11 EON 516 EOFF 44 ETOTAL 560 3. Measured with the half-bridge mode switching test circuit in Figure 23. 4. A bus RC snubber (RBS = 2.5W, CBS=200nF) must be applied to reduce the power loop high frequency oscillations. Test Conditions Input capacitance Output capacitance VDS=800V, VGS=0V f=100kHz Gate-source charge Gate-drain charge VDS=800V, ID=25A, VGS = -5V to 15V VDS=0V to 800V, VGS=0V Effective output capacitance, time related nC Turn-on delay time Notes 3 and 4 VDS=800V, ID=25A, Gate Driver =-5V to +15V, RG_ON=22W, RG_OFF=22W, inductive Load, FWD: same device with VGS = 0V and RG =22W, TJ=150°C ns Rise time Turn-off delay time Fall time Turn-on energy mJTurn-off energy Total switching energy pF Value Units Reverse transfer capacitance Effective output capacitance, energy related VDS=0V to 800V, VGS=0V Parameter Symbol Turn-on delay time Rise time COSS stored energy VDS=800V, VGS=0V mJ ns Turn-off energy Fall time Turn-on energy Notes 3 and 4 VDS=800V, ID=25A, Gate Driver =-5V to +15V, RG_ON=22W, RG_OFF=22W, inductive Load, FWD: same device with VGS = 0V and RG =22W, TJ=25°C Total gate charge Total switching energy Turn-off delay time Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 4

Typical Performance - Dynamic (continued) Min Typ Max td(on) 52.8 tr 22.4 td(off) 70 tf 16.8 EON 511 EOFF 127 ETOTAL 638 ERS_ON 3 ERS_OFF 3 td(on) 47.2 tr 26.4 td(off) 73 tf 17 EON 484 EOFF 126 ETOTAL 610 ERS_ON 2.8 ERS_OFF 3.2 5. Measured with the chopper mode switching test circuit in Figure 24. Value Units Snubber RS energy during turn-off Turn-on delay time Parameter Symbol Test Conditions 6. In this table, the switching energies (turn-on energy, turn-off energy and total energy) presented include the device RC snubber energy losses. Turn-on delay time Notes 5 and 6, VDS=800V, ID=25A, Gate Driver =-5V to +15V, Turn-on RG,EXT = 15W, Turn-off RG,EXT=10W, inductive Load, FWD: same device with VGS = 0V and RG = 10W, RC snubber: RS=10W and CS=100pF, TJ=150°C ns Rise time Turn-off delay time Fall time Turn-on energy including RS energy mJ Turn-off energy including RS energy Total switching energy Snubber RS energy during turn-on Fall time Turn-on energy including RS energy mJ Turn-off energy including RS energy Total switching energy Snubber RS energy during turn-on Snubber RS energy during turn-off Notes 5 and 6, VDS=800V, ID=25A, Gate Driver =-5V to +15V, Turn-on RG,EXT = 15W, Turn-off RG,EXT=10W, inductive Load, FWD: same device with VGS = 0V and RG = 10W, RC snubber: RS=10W and CS=100pF, TJ=25°C ns Rise time Turn-off delay time Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 5

Circuit Diagram and Pin Definitions DC + DC - NTC AC1 AC2 SK1 SK2 SK3 SK4 Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 12

Important Mounting Information Applications Information Important notice This product is recommended for use with solder pin attach and phase change thermal interface materials, and not recommended for implementations using press fit and application of thermal grease. Please refer to mounting guidelines and user guide documents associated with this product for detailed information. The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. SiC FETs are enhancement-mode power switches formed by a high-voltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (RDS(on)), output capacitance (Coss), gate charge (QG), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC FETs also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the FET is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on SiC FET operation, see https://www.qorvo.com/design-hub. A snubber circuit with a small R(G), or gate resistor, provides better EMI suppression with higher efficiency compared to using a high R(G) value. There is no extra gate delay time when using the snubber circuitry, and a small R(G) will better control both the turn-off V(DS) peak spike and ringing duration, while a high R(G) will damp the peak spike but result in a longer delay time. In addition, the total switching loss when using a snubber circuit is less than using high R(G), while greatly reducing E(OFF) from mid-to-full load range with only a small increase in E(ON). Efficiency will therefore improve with higher load current. For more information on how a snubber circuit will improve overall system performance, visit the Qorvo website at https://www.qorvo.com/design-hub. Datasheet: UFB25SC12E1BC3N Rev. B, February 2024 13