QM75041 QORVO | Alldatasheet
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D QM75041 Data Sheet - Rev F | Subject to change without notice 1 of 25 www.qorvo.com ADVANCED ADVANCED Product Description The Qorvo® QM75041 is a highly integrated Sub-6GHz PAMiD compliant to 5G-NR standards focused on Best-in- class 5G performance and ease-of-use (EOU) for platforms targeting advanced RF, including flagship/premium smartphones and data devices. The module consists of a High Band PA, Filter, Directional Coupler and TxRx Switch for TDD operation. The QM75041 supports Average Power Tracking (APT) PC2 power targets as well as Envelope Tracking (ET) up to 5.2 Vdc. The QM75041 is packaged in a RoHS-compliant,30 pin, 3mm x 5mm x 0.70mm lead less package. Functional Block Diagram Top View 30 Pin, 3.0 mm x 5.0 mm x 0.70 mm Feature Overview
- 5G-NR supporting full n41 (2.496-2.690 GHz) Band
- Integrated filtering
- Integrated Vcc Bypass Cap Switch
- Bi-Directional Coupler
- Advanced Smartphones, Tablets and Cellular Devices
- Datacards
- Machine-to-Machine
- MIPI RFFE 2.1 Applications
Ordering Information
13” reel, Qty to order (5k units) QM75041DK01 Design Kit QM75041EVB01 Evaluation board
QM75041 Data Sheet - Rev F | Subject to change without notice 2 of 25 www.qorvo.com ADVANCED Absolute Maximum Ratings Parameter Symbol, Conditions Rating Units Battery voltage VBATT 6.0 V Max Supply Voltage VCC1, VCC2 6.0 V RFFE Control Interface Bus VIO, SDATA, SCLK 2.0 V Input RF Power TX input, CW 50 Ohm,T=25 °C +10.0 dBm Input RF Power ANT port, Rx mode, in band frequencies 25 dBm Storage Temperature Tstorage -40 to 150 °C Operating Case Temperature Tcase -20 to 85 °C No Damage Pout (5G) All Temps, All Operating Voltage, VSWR<10:1 all phases Prated + 2 dBm Notes: Exceeding any one or combination of the Absolute Maximum Rating conditions may cause damage to the device. Extended applicati on of the Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical operation of the devic e under Absolute Maximum Rating conditions is not implied. Recommended Operating Conditions Parameter Conditions Min. Typ. Max. Units Supply Voltage VBATT 3 3.8 4.8 V APT VCC1, VCC2 0.5 3.7 5.2 ET VCC1, VCC2 0.5 3.7 5.2 RFFE Control Interface Bus VIO, SDATA, SCLK 1.65 1.8 1.95 V VIO Power On Reset Voltage VIO_Reset - - 0.45 V Logic Low 0 0 0.3*VIO V Logic High 0.7*VIO VIO V Leakage at VBatt 20 uA Leakage at VCC1/ VCC2 20 uA Operating Case Temperature -20 - 85 °C Input and Output Impedance - 50 - Ω Electrical Specifications are measured at specified test conditions. Specifications are not guaranteed over all operating con ditions.
QM75041 Data Sheet - Rev F | Subject to change without notice 3 of 25 www.qorvo.com ADVANCED Timing Diagram The QM75041 recommended control timing for Tx mode operation is shown below. The falling edge of SCLK during Bus Park (BP) is the master timing reference for all hardware events such as the application of RF input to the Tx input port of the module. Failure to comply with the specification below may result in RF output distortion or module damage. For applications where MIPI RFEE VIO is turned ON/OFF in accordance with MIPI RFEE bus activity, please refer to the VIO Timing specifications. RF input power at module Tx port Time Delay application of RF power to Tx input by at least T1 µs after switching to Tx mode (TRX_SW_Control Bus Park BP). Do not exit Tx mode until T2 µs after RF power at the Tx input has been removed. 2µs are recommended typically. Target Power Minimum Power MIPI RFEE Command Data Frames P = parity bit Internal Control Logic Module states change at the falling edge of SCLK during Buss Park BP Module Internal Control Logic Module State Change T1 min Sleep TX 5 µs SDATA BPD1 D0 P SCLK BPD1 D0 P T2 min 0 µs
QM75041 Data Sheet - Rev F | Subject to change without notice 4 of 25 www.qorvo.com ADVANCED 5G NR Test Signal Configurations All test signals are 3GPP TS38.101 compliant WF TYPE Modulation MPR for all BW and SCS OUTER INNER DFT-s-OFDM Pi/2-BPSK ≤ 0.5 0 QPSK ≤ 1 0 16QAM ≤ 2 ≤ 1 64QAM ≤ 2.5 256QAM ≤ 4.5 CP-OFDM QPSK ≤ 3 ≤ 1.5 16QAM ≤ 3 ≤ 2 64QAM ≤ 3.5 256QAM ≤ 6.5 5G NR n41 Tx Characteristics, PC2 Test conditions unless otherwise specified: VCC1 = VCC2 = +5.2 V, VBATT = +3.8 V, Temp. = 25 °C. Characterized Operating Bandwidth: APT = 100MHz. Performance referenced to module pin location. Parameter Conditions Power Mode Product Spec. Units Min. Typ. Max. Frequency 2496 - 2690 MHz Output Power Linear Output Power n41 Pout = +29.5 dBm, DFT-S-OFDM QPSK 100 MHz Inner RB APT, HPM, MPR = 0 29.5 29.7 - dBm Gain Gain (G) n41 Pout = +29.5 dBm, DFT-S-OFDM QPSK 100 MHz Inner RB APT, HPM, MPR = 0 30 dB Linearity Adjacent Channel Leakage Power Ratio (ACLR) n41 EUTRAACLR, Pout = +26.5dBm, CP-OFDM QPSK,100 MHz FRB APT, HPM, MPR = 3 -38 dBc EVM EVM n41 EVM, Pout = +23.0dBm, CP-OFDM 256 QAM,
100 MHz FRB
APT, HPM, MPR = 6.5 1.85 2.0 % Current Current n41 Current, Pout = +29.5 dBm, DFT-S-OFDM QPSK 100 MHz Inner RB APT, HPM, MPR = 0 1000 mA Output Power Linear Output Power n41 Pout = +3.0 dBm, DFT-S-OFDM QPSK 100 MHz FRB APT LPM 3.0 - - dBm Gain Gain (G) n41 Pout = +3.0 dBm, DFT-S-OFDM QPSK 100 MHz FRB APT LPM 23 dB
QM75041 Data Sheet - Rev F | Subject to change without notice 5 of 25 www.qorvo.com ADVANCED Parameter Conditions Power Mode Product Spec. Units Min. Typ. Max. Frequency 2496 - 2690 MHz Linearity Adjacent Channel Leakage Power Ratio (ACLR) n41 EUTRAACLR, Pout = +3.0 dBm, DFT-S-OFDM QPSK, 100 MHz FRB APT LPM -38 dBc Adjacent Channel Leakage Power Ratio (ACLR) n41 EUTRAACLR, Pout = +3.0 dBm, CP-OFDM QPSK,100 MHz FRB APT LPM -38 dBc Current Current n41 Current, Pout = +3.0 dBm APT LPM 115 mA Rx Band Noise Rx BN at n41 Tx output, 600 - 960MHz, (LB) MPR=1, Pout = +28.5 dBm, QPSK, MPR=3, Pout = +26.5 dBm, QPSK APT HPM -170 dBm/ Hz Rx BN at n41 Tx output, 1574 -1577MHz, (GPS, GLONASS) MPR=1, Pout = +28.5 dBm, QPSK, MPR=3, Pout = +26.5 dBm, QPSK APT HPM -171 dBm/ Hz Rx BN at n41 Tx output, 1805 - 1880MHz, (MB) MPR=1, Pout = +28.5 dBm, QPSK, MPR=3, Pout = +26.5 dBm, QPSK APT HPM -171 dBm/ Hz Rx BN at n41 Tx output, 2475 - 2495MHz (2.4GHz WiFi) MPR=1, Pout = +28.5 dBm, QPSK, MPR=3, Pout = +26.5 dBm, QPSK APT HPM -128 dBm/ Hz Rx BN at n41 Tx output, 3300 - 5000MHz, (UHB) MPR=1, Pout = +28.5 dBm, QPSK, MPR=3, Pout = +26.5 dBm, QPSK APT HPM -137 dBm/ Hz HARMONICS 2nd Harmonic n41 Pout ≤ max power, measured with 100MHz DFTS-OFDM-QPSK 1 RB 1 SRB,136 SRB, 1 RB 2702SRB MPR=0 waveform, Pout=+29.5 dBm APT HPM -40.0 dBm/ MHz 3rd Harmonic n41 Pout ≤ max power, measured with 100MHz DFTS-OFDM-QPSK 1 RB 1 SRB,136 SRB, 1 RB 2702SRB MPR=0 waveform, Pout=+29.5 dBm APT HPM -40.0 dBm/ MHz 4th Harmonic n41 Pout ≤ max power, measured with 100MHz DFTS-OFDM-QPSK 1 RB 136 SRB MPR=0 waveform, Pout=+29.5 dBm APT HPM -40.0 dBm/ MHz Spurious Levels All Loads ≤ 6:1 All Modes -70.0 dBc
QM75041 Data Sheet - Rev F | Subject to change without notice 6 of 25 www.qorvo.com ADVANCED 5G NR n41 Rx Characteristics Test conditions unless otherwise specified: VBATT = +3.8 V, Temp. = 25 °C, PA disabled. Performance referenced to module pin location. Parameter Conditions Product Spec. Units Min. Typ. Max. Frequency 2496 - 2690 MHz Insertion Loss I.L. n41 VCC1 = VCC2 = +5.2V - 2.6 - dB Return Loss I.R.L. n41 VCC1 = VCC2 = +5.2V - -14 - dB O.R.L. n41 VCC1 = VCC2 = +5.2V - -14 - dB Rx Rejection LB Tx,699 – 915 MHz VCC1 = VCC2 = +5.2V - 43 - dB B3 Tx,1710-1785 MHz VCC1 = VCC2 = +5.2V - 43 - dB ISM Tx,2400 MHz VCC1 = VCC2 = +5.2V - 47 - dB Tx,3300-5000 MHz VCC1 = VCC2 = +5.2V - 43 - dB ISM 5G Tx,5000-5925 MHz VCC1 = VCC2 = +5.2V - 36 - dB 5G NR n41 Coupler Characteristics Test conditions unless otherwise specified: VBATT = +3.8 V, Temp. = 25 °C, PA disabled. Performance referenced to module pin location. Parameter Conditions Product Spec. Units Min. Typ. Max. Frequency 2496 - 2690 MHz Coupling Factor Coupling Factor - 20 - dB Coupler Variation over Output VSWR Coupler Variation 2.5:1 at Ant Port -0.5 - 0.5 dB
QM75041 Data Sheet - Rev F | Subject to change without notice 7 of 25 www.qorvo.com ADVANCED Recommended Register Settings for PA Section (RFFE1) MIPI RFEE Description The RFFE interface implemented in theQM75041 is in compliance with the MIPI Alliance Specification for RF Front-End Control Interface Version 2.1 - April 2018 TX FFE Registers (RFFE1) Register address Data Bits Register Name Qorvo Bit Field Name Default [msb:lsb] Qorvo Description Read/ Write Trigger support Mask Write Support 0x00 Reg00[7:4] PA_CTRL0 Reserved 4b0000 Reserved R/W T0 Yes 0x00 Reg00[3] PA_CTRL0 PA_EN 1b0 PA Enable 0: PA OFF 1: PA ON R/W T0 Yes 0x00 Reg00[2] PA_CTRL0 VCC_CAP_BYP 1b0 VCC Capacitor control 0: iso mode (VCC cap switched out) 1: bypass mode (VCC cap switched in) OR'ed with Reg05[0] VCC_CAP_SW R/W T0 Yes 0x00 Reg00[1:0] PA_CTRL0 PA_MODE[1:0] 2b00 PA Mode 00: ET HPM 01: APT HPM 10: APT LPM 11: Reserved (same as APT LPM) R/W T0 Yes 0x01 Reg01[7:0] PA_CTRL2 PA_BIAS2[7:0] 8b00000000 PA Bias - power stage R/W T0 No 0x02 Reg02[7:0] PA_CTRL1 PA_BIAS1[7:0] 8b00000000 PA Bias - driver stage R/W T0 No 0x03 Reg03[7:4] TR_CTRL Reserved 4b0000 Reserved R/W T1 Yes 0x03 Reg03[3:0] TR_CTRL ANT_SW[3:0] 4b0000 Transmit/Receive Switch Control. 0000: OFF 0001: reserved (same as 0000) 0010: TX (load switch open) 0011: PC3 TX (load switch closed) 0100: reserved (same as 0000) 0101: reserved (same as 0000) 0110: reserved (same as 0000) 0111: reserved (same as 0000) 1000: reserved (same as 0000) 1001: RX 1010: reserved (same as 0000) 1011: reserved (same as 0000) 1100: reserved (same as 0000) 1101: reserved (same as 0000) 1110: reserved (same as 0000) 1111: reserved (same as 0000) R/W T1 Yes 0x04 Reg04[7:2] CPL_CTRL Reserved 6b000000 Reserved R/W T2 Yes 0x04 Reg04[1:0] CPL_CTRL CPL_OUT[1:0] 2b00 Coupler Output 00: High Isolation 01: Forward Port 10: Reverse Port 11: Coupler In R/W T2 Yes 0x05 Reg05[7:1] PA_CTRL2 Reserved 7b0000000 Reserved R/W T0 Yes 0x05 Reg05[0] PA_CTRL2 VCC_CAP_SW 1b0 VCC Capacitor control 0: iso mode (VCC cap switched out) 1: bypass mode (VCC cap switched in) OR'ed with Reg00[2] VCC_CAP_BYP R/W T0 Yes
QM75041 Data Sheet - Rev F | Subject to change without notice 8 of 25 www.qorvo.com ADVANCED TX FFE Registers (RFFE1) Register address Data Bits Register Name Qorvo Bit Field Name Default [msb:lsb] Qorvo Description Read/ Write Trigger support Mask Write Support 0x1C Reg28[7] PM_TRIG PWR_MODE 1b1 0: Normal operation (ACTIVE) 1: Secondary mode (LOW POWER) R/W No No 0x1C Reg28[6] PM_TRIG PWR_STATE 1b0 0: Normal operation 1: initialization state note - this bit always reads 0. Writing a 1 to this bit forces a reset. R/W No No 0x1C Reg28[5:3] PM_TRIG TriggerMask[2:0] 3b000 Setting these bits to '1' will cause the corresponding triggers to be masked (disabled), and RFFE writes to corresponding registers will change configuration immediately (no trigger command necessary). TriggerMask[2] = TriggerMask_2, TriggerMask[1] = TriggerMask_1, & TriggerMask[0] = TriggerMask_0 R/W No No 0x1C Reg28[2:0] PM_TRIG Trigger[2:0] 3b000 Setting these bits to '1' will cause the registers associated with that trigger to be loaded with the contents of its corresponding shadow register. Trigger[2] = Trigger_2, Trigger[1] = Trigger_1, and Trigger[0] = Trigger_0 R/W No No 0x1D Reg29[7:0] PRODUCT_ID PRODUCT_ID[7:0] 8b00101100 This is a read-only register. However, during the programming of the USID a write command sequence is performed on this register, even though the write does not change its value. RM No No 0x1E Reg30[7:0] MAN_ID MANUFACTURER_ID_LSB [7:0] 8b11000110 This is a read-only register. However, during the programming of the USID, a write command sequence is performed on this register, even though the write does not change its value. Note: This is the lower 8 least significant bits of the RFFE's MANUFACTURER_ID (i.e. MANUFACTURER_ID[7:0] = MANUFACTURER_ID_LSB[7:0] RM No No 0x1F Reg31[7:4] MAN_US_ID MANUFACTURER_ID_MSB [3:0] 4b0011 These bits are read-only. However, during the programming of the USID, a write command sequence is performed on this register even though the write does not change its value. Note: This is the 4 most significant bits of the RFFE's MANUFACTURER_ID (i.e. MANUFACTURER_ID[11:8] = MANUFACTURER_ID_MSB[3:0] RM No No 0x1F Reg31[3:0] MAN_US_ID USID[3:0] 4b1111 Programmable USID. Performing a write to this register using the described programming sequences will program the USID in devices supporting this feature. These bits store the USID of the device. RM No No 0x20 Reg32[7:0] EXT_PRODUCT_ID EXT_PRODUCT_ID[7:0] 8b00000000 This is a read-only register. However, during the programming of the USID a write command sequence is performed on this register, even though the write does not change its value. RM No No 0x21 Reg33[7:0] REVISION_ID REVISION_ID[7:0] 8b00000000 This is an RFFE2 register to contain information about the revision of this module. The intent here is to use this as a type of scratch register -- to contain various information or serialization. RM No No 0x22 Reg34[7:4] GROUP_ID2 GSID0_2[3:0] 4b0000 Group slave ID 0 R/W No No 0x22 Reg34[3:0] GROUP_ID2 GSID1_2[3:0] 4b0000 Group slave ID 1 R/W No No 0x23 Reg35[7] UDR_RST (RFFE_STATUS2) SW_RESET_2 1b0 0: Normal operation 1: Software reset (reset of all configurable registers to default values, except for USID) R/W No No 0x23 Reg35[6] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b6 1b0 Reserved R/W No No 0x23 Reg35[5] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b5 1b0 Reserved R/W No No 0x23 Reg35[4] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b4 1b0 Reserved R/W No No 0x23 Reg35[3] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b3 1b0 Reserved R/W No No 0x23 Reg35[2] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b2 1b0 Reserved R/W No No 0x23 Reg35[1] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b1 1b0 Reserved R/W No No 0x23 Reg35[0] UDR_RST (RFFE_STATUS2) Reserved_Reg35_b0 1b0 Reserved R/W No No
QM75041 Data Sheet - Rev F | Subject to change without notice 9 of 25 www.qorvo.com ADVANCED TX FFE Registers (RFFE1) Register address Data Bits Register Name Qorvo Bit Field Name Default [msb:lsb] Qorvo Description Read/ Write Trigger support Mask Write Support 0x1C Reg28[7] PM_TRIG PWR_MODE 1b1 0: Normal operation (ACTIVE) 1: Secondary mode (LOW POWER) R/W No No 0x24 Reg36[7] ERR_SUM (RFFE_STATUS3) Reserved_Reg36_b7 1b0 Reserved R/W No No 0x24 Reg36[6] ERR_SUM (RFFE_STATUS3) CMD_FRAME_P_ERR_2 1b0 Command sequence received with parity error – discard command. R/W No No 0x24 Reg36[5] ERR_SUM (RFFE_STATUS3) CMD_LEN_ERR_2 1b0 Command length error R/W No No 0x24 Reg36[4] ERR_SUM (RFFE_STATUS3) ADDR_FRAME_P_ERR_2 1b0 Address frame parity error = 1 R/W No No 0x24 Reg36[3] ERR_SUM (RFFE_STATUS3) DATA_FRAME_P_ERR_2 1b0 Data frame with parity error R/W No No 0x24 Reg36[2] ERR_SUM (RFFE_STATUS3) READ_UNUSED_REG_2 1b0 Read command to an invalid address R/W No No 0x24 Reg36[1] ERR_SUM (RFFE_STATUS3) WRITE_UNUSED_REG_2 1b0 Write command to an invalid address R/W No No 0x24 Reg36[0] ERR_SUM (RFFE_STATUS3) BID_GID_ERR_2 1b0 Read command with a Broadcast_ID or GROUP_ID R/W No No 0x2B Reg43[7:4] BUS_LOAD reserved_Reg_43 4b0000 Reserved R/W No No 0x2B Reg43[3:0] BUS_LOAD BUS_LOAD[3:0] 4b0100 SDATA Driver strength in Readback Mode 0x0: 10pf 0x1: 20pf 0x2: 30pf 0x3: 40pf 0x4: 50pf 0x5: 60pf 0x6: 80pf 0x7: 100pf 0x8: 120pf 0x9: 140pf 0xA: 160pf 0xB: 180pf 0xC: 200pf 0xD: 250pf 0xE-0xF: reserved R/W No No 0x2C Reg44[7:0] TEST_PATTERN Test_Pattern[7:0] 8b11010010 A read of this register returns the test pattern R No No
QM75041 Data Sheet - Rev F | Subject to change without notice 10 of 25 www.qorvo.com ADVANCED VIO Power On Reset (POR) Timing For applications where MIPI RFEE VIO is turned ON/OFF in accordance with MIPI RFEE bus activity, the timing recommendations below should be used to ensure error-free RFEE register writes following VIO power on reset (POR) Parameter Description MIN TYP MAX VIOH VIO High Voltage 1.65V 1.80V 1.95V VIO_RST VIO Reset Voltage 0V 0V 0.45V TVIO_RST VIO Reset Time 10µs - - TVIO_RST VIO Rise Time 1µs - 400µs T_SIGOL Minimum Wait Time after TVIO_R 190µs - -
QM75041 Data Sheet - Rev F | Subject to change without notice 11 of 25 www.qorvo.com ADVANCED Application Schematic
QM75041 Data Sheet - Rev F | Subject to change without notice 12 of 25 www.qorvo.com ADVANCED Evaluation Board Layout ADVANCED
QM75041 Data Sheet - Rev F | Subject to change without notice 13 of 25 www.qorvo.com ADVANCED Evaluation Board Layout (continued)
QM75041 Data Sheet - Rev F | Subject to change without notice 14 of 25 www.qorvo.com ADVANCED Evaluation Board Schematic
QM75041 Data Sheet - Rev F | Subject to change without notice 15 of 25 www.qorvo.com ADVANCED Evaluation Board Bill of Materials (BOM)
QM75041 Data Sheet - Rev F | Subject to change without notice 16 of 25 www.qorvo.com ADVANCED Pin Configuration and Description Top View (looking through device)
QM75041 Data Sheet - Rev F | Subject to change without notice 17 of 25 www.qorvo.com ADVANCED Pin Configuration and Description (continued) PIN NUMBER LABEL DESCRIPTION
1 GND Ground
2 GND Ground
3 RXout_n41 RX Output
4 GND Ground
5 GND Ground
6 GND Ground
7 GND Ground
8 VCC_CAP_SW Switchable Ground connection for large external SMD Bypass Capacitor
9 VCC2 Supply voltage for n41 2nd stage PA
10 GND Ground
11 VCC1 Supply voltage for n41 1st and stage PA
12 GND Ground
13 VBATT Battery supply voltage for controller
14 GND Ground
15 TX N41 PA RF Input
16 GND Ground
17 VIO Supply voltage for MIPI RFFE interface
18 SCLK Clock signal for MIPI RFFE interface
19 SDATA Data signal for MIPI RFFE interface
20 GND Ground
21 CPL_IN Coupler Input Port
22 GND Ground
23 CPL_OUT Coupler Output Port
24 GND Ground
25 Ant_n41 N41 Antenna Port
26 GND Ground
27 GND Ground
28 GND Ground
29 GND Ground
30 GND Ground
QM75041 Data Sheet - Rev F | Subject to change without notice 18 of 25 www.qorvo.com ADVANCED Mechanical Information – Dimensions Package Marking and Dimensions Marking: Part number –QM75041 Notes: 1. All dimensions are in mm. Angles are in degrees. 2. Dimension and tolerance formats conform to ASME Y14.4M -1994. 3. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012
QM75041 Data Sheet - Rev F | Subject to change without notice 19 of 25 www.qorvo.com ADVANCED Mechanical Information – Package Marking
QM75041 Data Sheet - Rev F | Subject to change without notice 20 of 25 www.qorvo.com ADVANCED Mechanical Information – Recommended Land Pattern and Mask
QM75041 Data Sheet - Rev F | Subject to change without notice 21 of 25 www.qorvo.com ADVANCED Tape and Reel Information – Carrier and Cover Tape Dimensions
QM75041 Data Sheet - Rev F | Subject to change without notice 22 of 25 www.qorvo.com ADVANCED Tape and Reel Information – Reel Dimensions Packaging reels are used to prevent damage to devices during shipping and storage. Loaded carrier tape is typically wound onto a plastic take-up reel. The reels are made from high-impact injection-molded polystyrene (HIPS), which offers mechanical and ESD protection to packaged devices. The reel size is either 7” or 13” in diameter based on the minimum number of samples. Standard T/R size = 5000 pieces on a 13” reel and 1000 pieces on a 7” reel. Packaging Reel for 12mm Wide Carrier Tape 7” Reel 13” Reel PART FEATURE SYMBOL SIZE (in) SIZE (mm) SIZE (in) SIZE (mm) FLANGE DIAMETER A 6.969 177.0 12.992 330 THICKNESS W2 0.717 18.2 0.717 18.2 SPACE BETWEEN FLANGE W1 0.504 12.8 0.504 12.8 HUB OUTER DIAMETER N 2.283 58.0 4.016 102.0 ARBOR HOLE DIAMETER C 0.512 13.0 0.512 13.0 KEY SLIT WIDTH B 0.079 2.0 0.079 2.0 KEY SLIT DIAMETER D 0.787 20.0 0.787 20.0
QM75041 Data Sheet - Rev F | Subject to change without notice 23 of 25 www.qorvo.com ADVANCED Tape and Reel Information – Tape length and label placement . Standard T/R size = 5000 pieces on a 13” reel and 1000 pieces on a 7” reel. Notes: 1. Empty part cavities at the trailing and leading ends are sealed with cover tape. See EIA 481. 2. Labels are placed on a flange opposite the sprockets in the carrier tape.
QM75041 Data Sheet - Rev F | Subject to change without notice 24 of 25 www.qorvo.com ADVANCED Handling Precautions Parameter Rating Standard Caution! ESD sensitive device ESD – Human Body Model (HBM) All pins other than pin 8 Class 1C, Pin
8 Class1B
ESD – Charged Device Model (CDM) Class C2A JEDEC JESD22-C101F MSL – Moisture Sensitivity Level MSL3 IPC/JEDEC J-STD-020 Solderability Compatible with both lead-free (260 °C max. reflow temperature) and tin/lead (245 °C max. reflow temperature) soldering processes. Package lead plating: Electrolytic plated Au over Ni RoHS Compliance This part is compliant with the 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment), as amended by Directive 2015/863/EU. This product also has the following attributes:
- Halogen Free (Chlorine, Bromine)
- Antimony Free
- TBBP-A (C15H12Br402) Free
- SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.qorvo.com Tel: 1-844-890-8163 Email: customer.support@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change w ithout notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual p roperty rights, whether with regard to such information itself or anyt hing described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or dea th. Copyright 2016 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc.
QM75041 Data Sheet - Rev F | Subject to change without notice 25 of 25 www.qorvo.com ADVANCED