PEX8613 PLX | Alldatasheet
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PEX 8613 General Features o 12-lane, 3-port PCIe Gen 2 switch - Integrated 5.0 GT/s SerDes o 19 x 19mm2, 324-pin PBGA package o Typical Power: 1.74 Watts PEX 8613 Key Features o Standards Compliant - PCI Express Base Specification, r2.0 (backwards compatible w/ PCIe r1.0a/1.1) - PCI Power Management Spec, r1.2 - Microsoft Vista Compliant - Supports Access Control Services - Dynamic link-width control - Dynamic SerDes speed control o High Performance - Non-blocking switch fabric - Full line rate on all ports - Packet Cut-Thru with 140ns max packet latency (x4 to x4) - 2KB Max Payload Size - Read Pacing (bandwidth throttling) - Dual cast o Flexible Configuration - Registers configurable with strapping pins, EEPROM, I 2C, or host software - Lane and polarity reversal - Compatible with PCIe 1.0a PM o Dual-Host & Fail-Over Support - Configurable Non-Transparent port - Moveable upstream port - Crosslink port capability o Dual-Clock Domain - SSC clock isolation o Quality of Service (QoS) - Two Virtual Channels - Eight traffic classes per port - Weighted round-robin source port arbitration o Reliability, Availability, Serviceability - All ports Hot-Plug capable thru I (Hot-Plug Controller on every port) - ECRC and Poison bit support - Data Path parity - Memory (RAM) Error Correction - INTA# and FATAL_ERR# signals - Advanced Error Reporting - Port Status bits and GPIO available - Per port error diagnostics - Performance Monitoring
- Per port payload & header counters - JTAG AC/DC boundary scan Version 1.1 2009 PEX 8613 PCIe Gen 2, 5.0GT/s 12-lane, 3-port Switch The ExpressLaneTM PEX 8613 device offers PCI Express switching capability enabling users to add scalable high bandwidth, non-blocking interconnection to a wide variety of applications including workstations, storage systems, communications platforms, embedded systems, and intelligent I/O modules. The PEX 8613 is well suited for fan-out, aggregation, and peer-to-peer applications. High Performance & Low Packet Latency The PEX 8613 architecture supports packet cut-thru with a maximum latency of 140ns (x4 to x4). This, combined with large packet memory and non-blocking internal switch architecture, provides full line rate on all ports for performance-hungry applications such as servers and switch fabrics. The low latency enables applications to achieve high throughput and performance. In addition to low latency, the device supports a max payload size of 2048 bytes, enabling the user to achieve even higher throughput. Data Integrity The PEX 8613 provides end-to-end CRC (ECRC) protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory (RAM) error correction as packets pass through the switch. Flexible Register & Port Configuration The PEX 8613’s 3 ports can achieve link up to lane widths of x1, x2, or x4. Flexible buffer allocation, along with the device's flexible packet flow control, maximizes throughput for applications where more traffic flows in the downstream, rather than upstream, direction. Any port can be designated as the upstream port, which can be changed dynamically. The PEX 8613 also provides several ways to configure its registers. The device can be configured through strapping pins, I interface, host software, or an optional serial EEPROM. This allows for easy debug during the development phase, performance monitoring during the operation phase, and driver or software upgrade. Figure 1 shows some of the PEX 8613’s common port configurations. PEX 8613PEX 8613 PEX 8613PEX 8613 x4 x4 PEX 8613PEX 8613 x4 x4 PEX 8613PEX 8613 NT NT
Figure 1. Common Port Configurations
for the adequate servicing of all downstream devices. enables efficient management of the entire system. Figure 2. Non-Transparent Port PEX 8613 is designed for Microsoft Vista compliance. testing at the PCI-SIG plug-fest. range of form factors and applications. upstream port and two downstream ports using x4 links. a Gen 1 native Chip Set in the same fashion.
Figure 3. Fan-in/out Usage applications such as Network Interface Cards (NICs). intervention or management by the host. Figure 4. 10GE NIC Fan-Out utilizing a PEX 8613 to fan-out to two ASICs/FPGAs. Figure 5. Embedded Systems processor and system performance is enhanced.
8 Disk Chassis
Figure 6. Dual Cast in Storage Systems
Software Usage Model Development Tools From a system model viewpoint, each PCI Express port is a virtual PCI to PCI bridge device and has its own set of PCI Express configuration registers. It is through the upstream port that the BIOS or host can configure the other ports using standard PCI enumeration. The virtual PCI to PCI bridges within the PEX 8613 are compliant to the PCI and PCI Express system models. The Configuration Space Registers (CSRs) in a virtual primary/secondary PCI to PCI bridge are accessible by type 0 configuration cycles through the virtual primary bus interface (matching bus number, device number, and function number). PLX offers hardware and software tools to enable rapid customer design activity. These tools consist of a hardware module (PEX 8613BA-AIC 4U4D RDK), hardware documentation, and a Software Development Kit (available at www.plxtech.com ExpressLane PEX 8613BA-AIC4U4D RDK The PEX 8613RDK is a hardware module containing the PEX 8613 which plugs right into your system. The PEX 8613RDK can be used to test and validate customer software, or used as an evaluation vehicle for PEX 8613 features and benefits. The PEX 8613RDK provides everything that a user needs to get their hardware and software development started. For more information, please refer to the PEX 8613RDK Product Brief. Interrupt Sources/Events The PEX 8613 switch supports the INTx interrupt message type (compatible with PCI 2.3 Interrupt signals) or Message Signaled Interrupts (MSI) when enabled. Interrupts/messages are generated by PEX 8613 for Hot- Plug events, doorbell interrupts, baseline error reporting, and advanced error reporting. Software Development Kit (SDK) PLX’s Software Development Kit is available for download at www.plxtech.com/sdk . The software development kit includes drivers, source code, and GUI interfaces to aid in configuring and debugging the PEX 8613. For more information, please refer to the PEX 8613RDK Product Brief. Product Ordering Information Part Number Description PEX8613-BA50BC PLX Technology, Inc. 12-Lane, 3-Port PCI Express Switch (19x19mm2) PEX8613-BA50BC G 12-Lane, 3-Port PCI Express Switch, Pb-Free (19x19mm2) PEX8613BA-AIC4U4D RDK PEX 8613 Rapid Development Kit Please visit the PLX Web site at http://www.plxtech.com for sampling. 870 Maude Ave. Sunnyvale, CA 94085 USA info@plxtech.com www.plxtech.com © 2009 PLX Technology, Inc. All rights reserved. PLX and the PLX logo are registered trademarks of PLX Technology, Inc. ExpressLane is a trademark of PLX Technology, Inc., which may be registered in some jurisdiction. All other product names that appear in this material are for identification purposes only and are acknowledged to be trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and reliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX Technology, Inc. reserves the right, without notice, to make changes in product design or specification. PEX8613-SIL-PB-1.1 5/09