LMU08 LODEV | Alldatasheet

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8 x 8-bit Parallel Multiplier Multipliers ❑❑❑❑❑ 20 ns Worst-Case Multiply Time ❑❑❑❑❑ Low Power CMOS Technology ❑❑❑❑❑ LMU08 Replaces TRW TMC208K ❑❑❑❑❑ LMU8U Replaces TRW TMC28KU ❑❑❑❑❑ Two’s Complement (LMU08), or Unsigned Operands (LMU8U) ❑❑❑❑❑ Three-State Outputs ❑❑❑❑❑ Package Styles Available:

  • 40-pin PDIP
  • 44-pin PLCC, J-Lead FEATURES DESCRIPTION LMU08/8U 8 x 8-bit Parallel MultiplierDEVICES INCORPORATED The LMU08 and LMU8U are high- speed, low power 8-bit parallel multipliers. They are pin-for-pin equivalents with TRW TMC208K and TMC28KU type multipliers. Full military ambient temperature range operation is attained by the use of advanced CMOS technology. Both the LMU08 and the LMU8U produce the 16-bit product of two 8-bit numbers. The LMU08 accepts operands in two’s complement format, and produces a two’s complement result. The product is provided in two halves with the sign bit replicated as the most significant bit of both halves. This facilitates use of the LMU08 product as a double precision operand in 8-bit systems. The LMU8U oper- ates on unsigned data, producing an unsigned magnitude result. Both the LMU08 and the LMU8U feature independently controlled registers for both inputs and the product, which along with three-state outputs allows easy interfacing with microprocessor busses. Provision is made in the LMU08 and LMU8U for proper rounding of the product to 8-bit precision. The round input is loaded at the rising edge of the logical OR of CLK A and CLK B for the LMU08. The LMU8U latches RND on the rising edge of CLK A only. In either case, a ‘1’ is added in the most significant position of the lower product byte when RND is asserted. Subsequent truncation of the least significant product byte results in a correctly rounded 8-bit result. LMU08/8U B LOCK DIAGRAM REGISTER CLK A CLK B RND CLK R LMU08 Only 8 8 OEM R 7-0 A 7-0 R 15-8 A REGISTER B REGISTER B 7-0 RESULT REGISTER OEL

8 x 8-bit Parallel Multiplier Multipliers M AXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) O PERATING CONDITIONS To meet specified electrical and switching characteristics ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Mode Temperature Range (Ambient) Supply Voltage Active Operation, Commercial 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25 V Active Operation, Military –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 V Symbol Parameter Test Condition Min Typ Max Unit VOH Output High Voltage VCC = Min., IOH = –2.0 mA 2.4 V VOL Output Low Voltage VCC = Min., IOL = 8.0 mA 0.5 V VIH Input High Voltage 2.0 VCC V VIL Input Low Voltage (Note 3) 0.0 0.8 V IIX Input Current Ground ≤ VIN ≤ VCC (Note 12) ±20 µA IOZ Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±20 µA ICC1 VCC Current, Dynamic (Notes 5, 6) 82 4 m A ICC2 VCC Current, Quiescent (Note 7) 1.0 mA

8 x 8-bit Parallel Multiplier Multipliers 123456789012 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 123456789012 123456789012 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 1 2345678901 2 123456789012 123456789012345678901234567890121234567890123 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 1 2345678901234567890123456789012123456789012 3 123456789012345678901234567890121234567890123 LMU08/8U– 90* 60* 45* 25* Symbol Parameter Min Max Min Max Min Max Min Max tMC Clocked Multiply Time 90 60 45 25 tPW Clock Pulse Width 25 20 15 10 tS Input Register Setup Time 20 15 15 15 tH Input Register Hold Time 5 2 2 2 tD Output Delay 35 22 22 20 tENA Three-State Output Enable Delay (Note 11) 35 24 24 20 tDIS Three-State Output Disable Delay (Note 11) 35 22 22 20 M ILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) SWITCHING CHARACTERISTICS LMU08/8U– 70* 50 35 20 * Symbol Parameter Min Max Min Max Min Max Min Max tMC Clocked Multiply Time 70 50 35 20 tPW Clock Pulse Width 20 20 10 8 tS Input Register Setup Time 14 14 14 10 tH Input Register Hold Time 4 0 0 0 tD Output Delay 25 20 20 18 tENA Three-State Output Enable Delay (Note 11) 24 22 22 15 tDIS Three-State Output Disable Delay (Note 11) 22 20 20 15 C OMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) 123456789012345678901234 1 2345678901234567890123 4 1 2345678901234567890123 4 123456789012345678901234 *DISCONTINUED SPEED GRADE SWITCHING WAVEFORMS HIGH IMPEDANCE INPUT tENAtDIS tD tPW tMC tPW tHtS CLK A CLK B CLK R OEL R 15-0 OEM

8 x 8-bit Parallel Multiplier Multipliers 1. Maximum Ratings indicate stress specifications only. Functional oper- ation of these products at values beyond those indicated in the Operating Condi- tions table is not implied. Exposure to maximum rating conditions for ex- tended periods may affect reliability. 2. The products described by this spec- ification include internal circuitry de- signed to protect the chip from damag- ing substrate injection currents and ac- cumulations of static charge. Neverthe- less, conventional precautions should be observed during storage, handling, and use of these circuits in order to avoid exposure to excessive electrical stress values. 3. This device provides hard clamping of transient undershoot and overshoot. In- put levels below ground or above V CC will be clamped beginning at –0.6 V and VCC + 0.6 V. The device can withstand indefinite operation with inputs in the range of –0.5 V to +7.0 V. Device opera- tion will not be adversely affected, how- ever, input current levels will be well in excess of 100 mA. 4. Actual test conditions may vary from those designated but operation is guar- anteed as specified. 5. Supply current for a given applica- tion can be accurately approximated by: where N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 6. Tested with all outputs changing ev- ery cycle and no load, at a 5 MHz clock rate. 7. Tested with all inputs within 0.1 V of V CC or Ground, no load. 8. These parameters are guaranteed but not 100% tested. NCV F NOTES 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except t DIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max respectively. Alternatively, a diode bridge with upper and lower current sources of IOH and IOL respectively, and a balancing voltage of 1.5 V may be used. Parasitic capacitance is 30 pF minimum, and may be distributed. This device has high-speed outputs ca- pable of large instantaneous current pulses and fast turn-on/turn-off times. As a result, care must be exercised in the testing of this device. The following measures are recommended: a. A 0.1 µF ceramic capacitor should be installed between V CC and Ground leads as close to the Device Under Test (DUT) as possible. Similar capacitors should be installed between device VCC and the tester common, and device ground and tester common. b. Ground and VCC supply planes must be brought directly to the DUT socket or contactor fingers. c. Input voltages should be adjusted to compensate for inductive ground and VCC noise to maintain required DUT input levels relative to the DUT ground pin. 10. Each parameter is shown as a min- imum or maximum value. Input re- quirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter- nal system must supply at least that much time to meet the worst-case re- quirements of all parts. Responses from the internal circuitry are specified from the point of view of the device. Output delay, for example, is specified as a maximum since worst-case operation of any device always provides data within that time. 11. For the t ENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing volt- age, V TH, is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Z- to-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. IOH IOL VTHC L DUT OE 0.2 V tDIStENA 0.2 V 1.5 V 1.5 V 3.5V Vth 1 Z 0 Z Z 1 Z 0 1.5 V 1.5 V 0V Vth VOL * VOH * VOL * VOH * Measured VOL with IOH = –10mA and IOL = 10mA Measured VOH with IOH = –10mA and IOL = 10mA FIGURE B. THRESHOLD LEVELS FIGURE A. OUTPUT LOADING CIRCUIT

8 x 8-bit Parallel Multiplier Multipliers Plastic DIP (P3) LMU08PC35 40-pin — 0.6" wide LMU08 — ORDERING INFORMATION 44-pin 0°C to +70°C — COMMERCIAL SCREENING Plastic J-Lead Chip Carrier (J1) LMU08JC50 LMU08JC35 Speed 50 ns 35 ns –55°C to +125°C — MIL-STD-883 COMPLIANT –55°C to +125°C — COMMERCIAL SCREENING R 10 R 9 R 8 CLK R OEM OEL (R7) RSL R 6 R 5 R 4 R 3 R 2 R 1 R 0 R 11 R 12 R 13 R 14 RSM (R 15) BS (B7) GND B VCC RND CLK B CLK A AS (A Top View 1 4243 18 23 24 25 26 27 406 253 4 19 20 21 22 NC BS (B7) GND B VCC OEL (R7) RSL R 6 R 5 R 4 R 3 R 2 R 1 R 0 NC NC OEM CLK R R R 9 R 10 R 11 R 12 R 13 R 14 RSM (R 15) (A7) AS CLK A CLK B RND NC

8 x 8-bit Parallel Multiplier Multipliers Plastic DIP (P3) LMU8UPC50 LMU8UPC35 40-pin — 0.6" wide LMU8U — ORDERING INFORMATION 44-pin 0°C to +70°C — COMMERCIAL SCREENING Plastic J-Lead Chip Carrier (J1) LMU8UJC50 LMU8UJC35 Speed 50 ns 35 ns –55°C to +125°C — MIL-STD-883 COMPLIANT –55°C to +125°C — COMMERCIAL SCREENING R 10 R 9 R 8 CLK R OEM OEL R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 R 11 R 12 R 13 R 14 R 15 GND B VCC RND CLK B CLK A A Top View 1 4243 18 23 24 25 26 27 406 253 4 19 20 21 22 NC GND B VCC OEL R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 NC NC OEM CLK R R R 9 R 10 R 11 R 12 R 13 R 14 R 15 CLK A CLK B RND NC