L2330

L2330 LODEV | Alldatasheet

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Special Arithmetic Functions L2330 Coordinate Transformer 09/27/2001–LDS.2330-E ❑❑❑❑❑ Rectangular-to-Polar or Polar-to- Rectangular at 50 MHz ❑❑❑❑❑ Performs Direct Digital Synthesis (DDS) functions along with PM and FM Modulation ❑❑❑❑❑ 24-Bit Polar Phase Angle Accuracy ❑❑❑❑❑ Replaces Fairchild TMC2330A FEATURES DESCRIPTION L2330 Coordinate TransformerDEVICES INCORPORATED L2330 BLOCK DIAGRAM The L2330 is a coordinate transformer that converts bidirectionally between Rectangular and Polar coordinates. When in Rectangular-to-Polar mode, the L2330 is able to retrieve phase and magnitude information or backward map from a rectangular raster display to a radial data set. When in Polar-to-Rectangular mode, the L2330 is able to execute direct digital waveform synthesis and modulation. Real-time image-space conversions are achieved from radi- ally-generated images, such as RADAR, SONAR, and ultrasound to raster display formats. Functional Description The L2330 converts bidirectionally between Rectangular (Cartesian) and Polar (Phase and Magnitude) coordi- nates. The user selects the numeric format. A valid transformed result is seen at the output after 22 clock cycles and will continue upon every clock cycle thereafter. When in Rectangular-to-Polar mode, the user inputs a 16-bit Rectangular coordinate and the output generates a Polar transformation with 16-bit magnitude and 16-bit phase. The user may select the data format to be either two’s complement or sign-and- magnitude Cartesian data format. Polar Magnitude data is always in magnitude format only. Polar Phase Angle data is modulo 2π so it may be regarded as either unsigned or two’s complement format. When in Polar-to-Rectangular mode, the user inputs 16-bit Polar Magnitude and 32-bit Phase data and the output generates a 16-bit Rectangular coordi- nate. The use may select the data format to be either two’s complement or sign-and-magnitude Cartesian data format. OVF CLK POLAR OERX PYOUT 15-0 ENXR XRIN 15-0 ENYP 1-0 YPIN 31-0 ACC 1-0 TCXY RTP RXOUT 15-0 OEPY RECTANGULAR

TABLE 2. ACCUMULATOR CONTROL TABLE 1. REGISTER OPERATION

Fract. Unsigned Mag./Two's Comp. and phase accumulator is modulo 232, this bit may be regarded as ±π. Table 1. ‘M’ is the Modulation Polar conversion mode is selected. gular conversion mode is selected. from Cartesian to Polar coordinates.

Special Arithmetic Functions 09/27/2001–LDS.2330-E FIGURE 1B .O UTPUT FORMATS 15 14 13 2 1 0 NS 2 14 213 22 21 20 15 14 13 2 1 0 NS 2 14 213 22 21 20 Integer Signed Magnitude (RTP = 0, TCXY = 0) 15 14 13 2 1 0 –215 214 213 22 21 20 15 14 13 2 1 0 –215 214 213 22 21 20 Integer Two's Complement (RTP = 0, TCXY = 1) 15 14 13 2 1 0 215 214 213 22 21 20 15 14 13 2 1 0 RXOUT PYOUT 15 14 13 2 1 0 NS 2 –1 2–2 2–13 2–14 2–15 15 14 13 2 1 0 NS 2 –1 2–2 2–13 2–14 2–15 Fractional Signed Magnitude (RTP = 0, TCXY = 0) 15 14 13 2 1 0 15 14 13 2 1 0 Fractional Two's Complement (RTP = 0, TCXY = 1) 15 14 13 2 1 0 20 2–1 2–2 2–13 2–14 2–15 15 14 13 2 1 0 *±20 denotes two's complement sign or highest magnitude bit. Since phase angles are modulo 2π and phase accumulator is modulo 232, this bit may be regarded as ±π. NS denotes negative sign. (i.e. '1' negates the number) Fract. Unsigned Mag./Two's Comp.Integer Unsigned Magnitude (RTP = 1) Fract. Unsigned Mag./Two's Comp.Fractional Unsigned Magnitude (RTP = 1) OVF — Overflow Flag OVF will go HIGH on the clock the magnitude of either of the current Cartesian coordinate outputs exceed the maximum range. OVF will return LOW on the clock that the Cartesian output value(s) return within range. An overflow condition can only occur when RTP is LOW. OERX — x-coordinate/Magnitude Data Output Enable When OERX is LOW, RXOUT 15-0 is enabled for output. When OERX is HIGH, RXOUT 15-0 is placed in a high-impedance state. OEPY — y-coordinate/Phase Angle Data Output Enable When OEPY is LOW, PYOUT15-0 is enabled for output. When OEPY is HIGH, PYOUT 15-0 is placed in a high-impedance state.

TABLE 3. DOUBLE CONVERSION ERROR

TABLE 4. RESULTANT DATA VALUES OF CIRCLE TEST NEAR 45°

Special Arithmetic Functions L2330 Coordinate Transformer 09/27/2001–LDS.2330-E M AXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) O PERATING CONDITIONS To meet specified electrical and switching characteristics Mode Temperature Range (Ambient) Supply Voltage Active Operation, Commercial 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25 V Active Operation, Military –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 V Symbol Parameter Test Condition Min Typ Max Unit VOH Output High Voltage VCC = Min., IOH = –2.0 mA 2.4 V VOL Output Low Voltage VCC = Min., IOL = 4.0 mA 0.4 V VIH Input High Voltage 2.0 VCC V VIL Input Low Voltage (Note 3) 0.0 0.8 V IIX Input Current Ground ≤ VIN ≤ VCC (Note 12) ±10 µA IOZ Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±10 µA ICC1 VCC Current, Dynamic (Notes 5, 6) 95 mA ICC2 VCC Current, Quiescent (Note 7) 5m A C IN Input Capacitance TA = 25°C, f = 1 MHz 10 pF C OUT Output Capacitance TA = 25°C, f = 1 MHz 10 pF ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)

Special Arithmetic Functions 09/27/2001–LDS.2330-E 1234567890123456789012345678901212345678901234 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1 23456789012345678901234567890121234567890123 4 1234567890123456789012345678901212345678901234 L2330– 50* 25* 20* Symbol Parameter Min Max Min Max Min Max tCYC Cycle Time 50 25 20 tPWL Clock Pulse Width Low 11 9 7 tPWH Clock Pulse Width High 8 7 6 tS Input Setup Time 13 7 6 tH Input Hold Time 2 2 1 tD Output Delay 25 20 18 tENA Three-State Output Enable Delay (Note 11) 15 14 13 tDIS Three-State Output Disable Delay (Note 11) 15 14 13 1234567890123456 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1 23456789012345 6 1234567890123456 L2330– 50* 25 20 Symbol Parameter Min Max Min Max Min Max tCYC Cycle Time 50 25 20 tPWL Clock Pulse Width Low 10 8 7 tPWH Clock Pulse Width High 8 7 6 tS Input Setup Time 12 7 6 tH Input Hold Time 1 0 0 tD Output Delay 22 18 16 tENA Three-State Output Enable Delay (Note 11) 13 13 13 tDIS Three-State Output Disable Delay (Note 11) 13 13 13 C OMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) SWITCHING CHARACTERISTICS M ILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) 123456789012345678901234 1 2345678901234567890123 4 1 2345678901234567890123 4 123456789012345678901234 *DISCONTINUED SPEED GRADE

Special Arithmetic Functions L2330 Coordinate Transformer 09/27/2001–LDS.2330-E SWITCHING WAVEFORMS :N O ACCUMULATION CLK YPIN31-0 ENYP 1-0 0123 2 2 2 3 RTP EN EN EN A B C ACC 1-0 RXOUT 15-0 PYOUT 15-0 f(A) f(B) tH tS 00 00 00 ENXR XRIN 15-0 tD TCXY tPWH tPWL tCYC SWITCHING WAVEFORMS :P HASE MODULATION CLK ACC 1-0 YPIN31-0 ENYP 1-0 01234 2 2 00 01 RTP, TCXY 01 01 C XRIN 15-0 R 01 01 01 I J K 24 25 ENXR RXOUT 15-0 PYOUT 15-0 C + I 2C + J 3C + K 4C + L L

Special Arithmetic Functions 09/27/2001–LDS.2330-E 1. Maximum Ratings indicate stress specifications only. Functional oper- ation of these products at values be- yond those indicated in the Operating Conditions table is not implied. Expo- sure to maximum rating conditions for extended periods may affect reliability. 2. The products described by this spec- ification include internal circuitry de- signed to protect the chip from damag- ing substrate injection currents and ac- cumulations of static charge. Never- theless, conventional precautions should be observed during storage, handling, and use of these circuits in order to avoid exposure to excessive electrical stress values. 3. This device provides hard clamping of transient undershoot and overshoot. Input levels below ground or above V CC will be clamped beginning at – 0.6 V and VCC + 0.6 V. The device can withstand indefinite operation with in- puts in the range of –0.5 V to +7.0 V. Device operation will not be adversely affected, however, input current levels will be well in excess of 100 mA. 4. Actual test conditions may vary from those designated but operation is guaranteed as specified. 5. Supply current for a given application can be accurately approximated by: where N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 6. Tested with all outputs changing ev- ery cycle and no load, at a 20 MHz clock rate. 7. Tested with all inputs within 0.1 V of V CC or Ground, no load. 8. These parameters are guaranteed but not 100% tested. NCV F NOTES 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except t DIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max respectively. Alternatively, a diode bridge with upper and lower current sources of IOH and IOL respectively, and a balancing voltage of 1.5 V may be used. Parasitic capacitance is 30 pF minimum, and may be distributed. This device has high-speed outputs ca- pable of large instantaneous current pulses and fast turn-on/turn-off times. As a result, care must be exercised in the testing of this device. The following measures are recommended: a. A 0.1 µF ceramic capacitor should be installed between V CC and Ground leads as close to the Device Under Test (DUT) as possible. Similar capacitors should be installed between device VCC and the tester common, and device ground and tester common. b. Ground and VCC supply planes must be brought directly to the DUT socket or contactor fingers. c. Input voltages should be adjusted to compensate for inductive ground and VCC noise to maintain required DUT input levels relative to the DUT ground pin. 10. Each parameter is shown as a min- imum or maximum value. Input re- quirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter- nal system must supply at least that much time to meet the worst-case re- quirements of all parts. Responses from the internal circuitry are specified from the point of view of the device. Output delay, for example, is specified as a maximum since worst-case operation of any device always provides data within that time. 11. For the t ENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing volt- age, V TH, is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Z- to-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. IOH IOL VTHC L DUT OE 0.2 V tDIStENA 0.2 V 1.5 V 1.5 V 3.5V Vth 1 Z 0 Z Z 1 Z 0 1.5 V 1.5 V 0V Vth VOL * VOH * VOL * VOH * Measured VOL with IOH = –10mA and IOL = 10mA Measured VOH with IOH = –10mA and IOL = 10mA FIGURE B. THRESHOLD LEVELS FIGURE A. OUTPUT LOADING CIRCUIT

Special Arithmetic Functions L2330 Coordinate Transformer 09/27/2001–LDS.2330-E

ORDERING INFORMATION

0°C to +70°C — COMMERCIAL SCREENING Speed 25 ns 20 ns Plastic Quad Flatpack (Q1) L2330QC25 L2330QC20 120-pin VCC PYOUT 4 PYOUT 3 GND PYOUT 2 PYOUT 1 PYOUT 0 VCC OEPY GND RTP CLK GND TCXY ENYP 0 GND ENYP 1 ACC 0 ACC 1 VCC YPIN0 YPIN1 YPIN2 YPIN3 YPIN4 YPIN5 YPIN6 GND YPIN7 YPIN8 PYOUT 5 PYOUT 6 GND PYOUT PYOUT 8 PYOUT 9 GND PYOUT PYOUT 11 PYOUT 12 VCC PYOUT 13 PYOUT 14 PYOUT 15 GND OVF RXOUT RXOUT 1 VCC RXOUT 2 RXOUT 3 RXOUT 4 GND RXOUT RXOUT 6 RXOUT 7 GND RXOUT RXOUT 9 VCC RXOUT 10 RXOUT 11 GND RXOUT RXOUT 13 RXOUT 14 VCC RXOUT 15 GND OERX V CC XRIN 15 XRIN 14 XRIN 13 GND XRIN XRIN 11 XRIN 10 XRIN 9 XRIN 8 XRIN 7 XRIN 6 GND XRIN XRIN 4 XRIN 3 GND XRIN XRIN 1 VCC GND YPIN9 YPIN10 VCC YPIN11 YPIN12 YPIN13 YPIN14 YPIN15 YPIN16 YPIN17 VCC YPIN18 YPIN19 YPIN20 GND YPIN21 YPIN22 YPIN23 VCC YPIN24 YPIN25 YPIN26 YPIN27 YPIN28 YPIN29 YPIN30 YPIN31 ENXR XRIN 0 Top View 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100

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to +70°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT –55°C to +125°C — COMMERCIAL SCREENING 120-pin A B C D E F G H J K L M N Top View Through Package (i.e., Component Side Pinout) 12345 6 7 8 9 10 11 PYO 7 PYO 4 PYO 2 PYO 0 GND GND ENYP 0 ACC 1 YPI1 YPI4 YPI7 YPI9 YPI10 PYO 8 PYO 6 VCC GND VCC CLK GND VCC YPI3 GND GND YPI YPI12 PYO 10 PYO 9 GND VCC YPI13 YPI15 PYO 12 PYO 11 GND YPI14 YPI16 YPI17 PYO 14 PYO 13 VCC VCC YPI18 YPI19 PYO 15 OVF GND GND YPI20 YPI21 RXO 0 RXO 1 VCC VCC YPI23 YPI22 RXO 2 RXO 3 GND YPI27 YPI25 YPI24 RXO 4 RXO 5 GND YPI31 YPI28 YPI26 12 13 PYO 5 PYO 3 PYO 1 OEPY RTP TCXY ENYP 1 ACC 0 YPI0 YPI2 YPI5 YPI6 YPI8 RXO 6 RXO 7 VCC GND VCC VCC GND XRI9 GND GND V CC ENXR YPI29 RXO 8 RXO 9 RXO 11 RXO 14 GND XRI15 XRI12 XRI10 XRI7 XRI5 XRI3 XRI1 YPI30 RXO 10 RXO 12 RXO 13 RXO 15 OERX XRI14 XRI13 XRI11 XRI8 XRI6 XRI4 XRI2 XRI0 KEY Speed Ceramic Pin Grid Array (G4) Discontinued Package