P0120002P EUDYNA | Alldatasheet
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250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan Phone: +81-45-853-7263 Fax: +81-45-853-1291 e-mail : GaAsIC-ml@ml.sei.co.jp ♦Features W eb Site: www.sei.co.jp/GaAsIC/
- Up to 2.7 GHz frequency band
- Beyond +22 dBm output power
- Up to +41dBm Output IP3
- High Drain Efficiency
- 15dB Gain at 2.1GHz
- SOT-89 SMT Package (Pb-free)
- Low Noise Figure ♦Applications
- Wireless communication system
- Cellular, PCS, PHS, W-CDMA, WLAN ♦Description P0120002P is a high performance GaAs MESFET housed in a low-cost S OT-89 p ackage. Our ori ginally de veloped "pulse-doped" channel structure has realized low distortion, which leads to high IP3. The channel structure also achieved an extremely low noise figure. The details about pulse-doped FET cha nnel are des cribed in our products ca talog. Utilization of AuSn die attach has realized a low and stable thermal resistance. The lead frame is plated with Sn-Bi to make the device Pb-free. SEI’s long h istory of manufacturing has cultivated h igh device reliability. The estimated MTTF of the FET is longer than 1 5years at Tj of 150°C. You can see the details in Reliability and Quality Assurance. ♦Functional Diagram 12 3 Pin No. Function
1 Input/Gate
2, 4 Ground
3 Output/Drain
♦Ordering Information Part No Description Number of devices Container P0120002P GaAs Power FET 1000 7” Reel KP022J 2.11-2.17GHz Application Circuit 1 Anti-static Bag ♦Absolute Maximum Ratings (@Tc=25°C) Parameter Symbol Value Units Drain-Source Voltage Vds 8 V Gate-Source Voltage Vgs - 4 V Drain Current Ids Idss --- RF Input Power (continuous) Pin 13 (*) dBm Power Dissipation Pt 1.7 W Junction Temperature Tj 125 °C Storage Temperature Tstg - 40 to +125 °C Tc: Case Temperature. Operating the device beyond any of these values may cause permanent damage. (*) Measured at 2.1GHz with our test fixture matched to IP3. ♦Electrical Specifications (@Tc=25°C) Values Parameter Symbol Test Conditions Min. Typ. Max. Units Saturated Drain Current Idss Vds=3V, Vg=0V --- --- 300 mA Transconductance gm Vds=6V, Ids=100mA 90 --- --- mS Pinchoff Voltage Vp Vds=6V, Ids=10mA - 3.0 --- - 1.7 V Gate-Source Breakdown Voltage |Vgs0| Igso= - 10µA 3.0 --- --- V DC Thermal Resistance Rth Channel-Case --- --- 60 °C/W Frequency f 2.7 GHz Output Power @ 1dB Gain Compression P1dB --- 24 --- dBm Small Signal Gain G --- 15 --- dB Output IP3 IP3 --- 41 --- dBm RF Power Added Efficiency ηadd Vds=6V Ids=80mA f=2.1GHz --- 50 --- % -1-
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦Typical Characteristics Power Derating Curve Transfer CurvePower Derating Curve Transfer Curve 0 50 100 150 200 Tc (°C) Drain Current (mA) 400 300 200 100 0 02 4 6 Vds (V) Vgs=0V -0.5V -1.0V -1.5V -2.0V Total Power Dispation (W) ♦S-parameters (Typical Data) Tc=25°C, Vds=6V, Ids=100mA, Common Source, Zo=50Ω (Calibrated to device leads) 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S11 S22 1.2GHz 1.2GHz 2.4GHz 2.4GHz 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S11 S22 1.2GHz 1.2GHz 2.4GHz 2.4GHz Scale for |S21| Scale for |S12| 1.2GHz S21 1.2GHz 2.4GHz 2.4GHz 0 135 -180 -135 -90 -45 S12 0.02 0.04 0.060 2.0 4.0 6.0Scale for |S21| Scale for |S12| 1.2GHz S21 1.2GHz 2.4GHz 2.4GHz 0 135 -180 -135 -90 -45 S12 0.02 0.04 0.060 2.0 4.0 6.0 Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan Phone: +81-45-853-7263 Fax: +81-45-853-1291 e-mail : GaAsIC-ml@ml.sei.co.jp -2- W eb Site: www.sei.co.jp/GaAsIC/
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC Tc=25°C, Vds=6V, Ids=80mA, Common Source, Zo=50Ω (Calibrated to device leads) 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S11 S22 1.2GHz 1.2GHz 2.4GHz 2.4GHz 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S11 S22 1.2GHz 1.2GHz 2.4GHz 2.4GHz 135 -180 -135 -90 -45 Scale for |S21| Scale for |S12| 1.2GHz S21 1.2GHz 2.4GHz 2.4GHz S12 0.02 0.04 0.060 2.0 4.0 6.0 0 0 135 -180 -135 -90 -45 Scale for |S21| Scale for |S12| 1.2GHz S21 1.2GHz 2.4GHz 2.4GHz S12 0.02 0.04 0.060 2.0 4.0 6.0 Ids=100mA Freq(GHz) S11 Mag S11 Ang S21 Mag S21 Ang S12 Mag S12 Ang S22 Mag S22 Ang Ids=80mA Freq(GHz) S11 Mag S11 Ang S21 Mag S21 Ang S12 Mag S12 Ang S22 Mag S22 Ang [Note] You can download the S-parameter list from our web site: www.sei.co.jp/GaAsIC/ Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan Phone: +81-45-853-7263 Fax: +81-45-853-1291 e-mail : GaAsIC-ml@ml.sei.co.jp -3- W eb Site: www.sei.co.jp/GaAsIC/
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC Ids=100mA Ids=80mA Device: P0120002P Frequency: f1=2.1GHz, f2=2.101GHz Bias: Vds=6V, Ids=100mA Source Matching: Mag 0.71 Ang 131.9° Load Matching: Mag 0.27 Ang 87.0° Device: P0120002P Frequency: f1=2.1GHz, f2=2.101GHz Bias: Vds=6V, Ids=80mA Source Matching: Mag 0.71 Ang 131.9° Load Matching: Mag 0.35 Ang 90.9° -100 -80 -60 -40 -20 -20 -15 -10- 5 0 5 101 5 20 Pout (dBm) Gain (dB) IM3 (dBm) IP3 (dBm) IM3/Pout (dBc) ηadd (%) Pin (dBm) Ga in IP3 ηadd IM3 IM3/Pout -100 -80 -60 -40 -20 -20 -15 -10- 5 0 5 101 5 20 Pout (dBm) Gain (dB) IM3 (dBm) IP3 (dBm) IM3/Pout (dBc) ηadd (%) Pin (dBm) Ga in IP3 ηadd IM3 IM3/Pout -100 -80 -60 -40 -20 -20 -15 -10- 5 0 5 101 5 20 Pout (dBm) Gain (dB) IM3 (dBm) IP3 (dBm) IM3/Pout (dBc) ηadd (%) Pin (dBm) Pout Ga in IP3 ηadd IM3 IM3/Pout -100 -80 -60 -40 -20 -20 -15 -10- 5 0 5 101 5 20 Pout (dBm) Gain (dB) IM3 (dBm) IP3 (dBm) IM3/Pout (dBc) ηadd (%) Pin (dBm) Pout Ga in IP3 ηadd IM3 IM3/Pout Pout Ga in IP3 ηadd IM3 IM3/Pout Pout Ga in IP3 ηadd IM3 IM3/Pout [Note] Pout and η add are measured by one signal. The data for the figures above were measured with the load impedance matched to IP3. Id=100mA Pin (dBm) Pout (dBm) Gain (dB) IM3 (dBm) IM3/Pout (dBc) IP3 (dBm) Id (mA) ηadd (%) Id=80mA Pin (dBm) Pout (dBm) Gain (dB) IM3 (dBm) IM3/Pout (dBc) IP3 (dBm) Id (mA) ηadd (%) Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan Phone: +81-45-853-7263 Fax: +81-45-853-1291 e-mail : GaAsIC-ml@ml.sei.co.jp -4- W eb Site: www.sei.co.jp/GaAsIC/
Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -5- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC Tc=25°C, Vds=6V, Ids=100mA, Pin=-5dBm [Pout-Lstate] f = 2.1GHz Γpout : 0.73∠ 85.8 Source : 0.79 ∠ 160.5 Pout max : 15.75dBm [IP3-Lstate] f1 = 2.1GHz f2 = 2.101GHz ΓIP3 : 0.27∠ 87.0 Source : 0.71∠ 131.9 IP3 max : 45.75dBm Tc= 25°C, Vds=6V, Ids=80mA, Pin=-5dBm [Pout-Lstate] f = 2.1GHz Γpout : 0.74∠ 89.0 Source : 0.79∠ 160.5 Pout max : 16.05dBm [IP3-Lstate] f1 = 2.1GHz f2 = 2.101GHz ΓIP3 : 0.35∠ 90.9 Source : 0.71∠ 131.9 IP3 max : 40.95dBm +j100 +j50 +j25 -j25 -j50 -j100 100Ω50Ω25Ω 45.75 44.7543.75 40.75 41.7542.75 38.45 39.45 38.95 40.95 39.95 40.45 +j25 +j50 +j100 -j100 -j50 -j25 25Ω 50Ω 100Ω 38.45 39.45 38.95 40.95 39.95 40.45 +j25 +j50 +j100 -j100 -j50 -j25 25Ω 50Ω 100Ω 14.5 15.0 14.75 15.75 15.25 15.5+j25 +j50 +j100 -j100 -j50 -j25 25Ω 50Ω 100Ω 14.8 15.315.05 16.05 15.55 15.8 +j25 +j50 +j100 -j100 -j50 -j25 25Ω 50Ω 100Ω 14.8 15.315.05 16.05 15.55 15.8 +j25 +j50 +j100 -j100 -j50 -j25 25Ω 50Ω 100Ω
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦NF Characteristics Ids=100mA Ids=80mA Ids=60mA 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 1.40 1.90 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 1.40 1.90 Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 1.60 2.10 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 1.48 1.98 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 1.48 1.98 [Note] The data for Smith charts were measured at frequency of 2GHz and Tc of 25°C. Vds=6V Ids=100mA Vds=6V Ids=60mA Mag Ang(deg) Mag Ang(deg) Vds=6V Ids=80mA Mag Ang(deg) Associated Gain(dB) Freq. (GHz) NFmin (dB) Γopt Rn/50 Rn/50 Associated Gain(dB) Freq. (GHz) NFmin (dB) Γopt Rn/50 Associated Gain(dB) Freq. (GHz) NFmin (dB) Γopt Frequency (GHz) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 NF (dB) Ids=100mA Ids=80mA Ids=60mA -6-
Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -7- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦Application Circuit: 2110-2170MHz D.D. RF in (Rs=50Ω) RF out (RL=50Ω) Vg Vd U.T Z1 Z2 Z4 RF in (Rs=50Ω) RF out (RL=50Ω) Vg Vd U.T Z1 Z2 Z4 Z5 Z7 B)B) rs (drs (d eteete ramram S-paS-pa RF in RF out R1 R2 Vg (-0.7∼-2V) Vd (+6V) KP022J RF in RF out R1 R2 Vg (-0.7∼-2V) Vd (+6V) KP022J Ref. Des. Value Part Number R1 82Ω R2 470Ω C1 0.5pF C2 0.75pF C3 0.1µF C4 0.5pF C5 2200pF C6 0.1µF C7 0.75pF L1 3.3nH L2 3.3nH L3 18nH L4 18nH SUSUMU RR0816 series MURATA GRM18 series TOKO LL1608 series 1.9 2 2.1 2.2 2.3 Frequency (GHz) -30 -20 -10 S11 S12 S22 S21 1.9 2 2.1 2.2 2.3 Frequency (GHz) -30 -20 -10 S11 S12 S22 S21 1.9 2 2.1 2.2 2.3 Frequency (GHz) -30 -20 -10 S11 S12 S22 S21 Ref. Designator Electrical length @ 2.1GHz (deg) Z1 6.8 Z2 11.34 Z3 4.08 Z4 13.61 Z5 8.62 Z6 6.38 Z7 38.56 All microstrip lines have a line impedance of 50Ω.
Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -8- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC [Typical Performance] Vds=6V, Ids=100mA, Tc=25°C Frequency characteristics were measured with Pout at 13dBm. 2100 2120 2140 2160 2180 IP3 vs Frequency IP3 (dBm) Frequency (MHz) Vds=6V Vds=5V Vds=4V 2100 2120 2140 2160 2180 IP3 vs Frequency IP3 (dBm) Frequency (MHz) Vds=6V Vds=5V Vds=4V 2100 2120 2140 2160 2180 IP3 vs Frequency IP3 (dBm) Frequency (MHz) Vds=6V Vds=5V Vds=4V 14.5 14.7 14.9 15.1 15.3 15.5 2100 2120 2140 2160 2180 Gain vs Frequency Gain (dB) Frequency (MHz) Vds=4V Vds=5V Vds=6V 14.5 14.7 14.9 15.1 15.3 15.5 2100 2120 2140 2160 2180 Gain vs Frequency Gain (dB) Frequency (MHz) Vds=4V Vds=5V Vds=6V 14.5 14.7 14.9 15.1 15.3 15.5 2100 2120 2140 2160 2180 Gain vs Frequency Gain (dB) Frequency (MHz) Ids=60mA Ids=80mA Ids=100mA 14.5 14.7 14.9 15.1 15.3 15.5 2100 2120 2140 2160 2180 Gain vs Frequency Gain (dB) Frequency (MHz) Ids=60mA Ids=80mA Ids=100mA Pout, Gain, IP3, Ids vs Pin IP3 (dBm) 100 105 110 Ids (mA) Pout (dBm) Gain (dB) 115 -10 -8 -6 -4 -2 0 2 4 Pin (dBm) IP3 Ids Gain Pout Pout, Gain, IP3, Ids vs Pin IP3 (dBm) 100 105 110 Ids (mA) Pout (dBm) Gain (dB) 115 -10 -8 -6 -4 -2 0 2 4 Pin (dBm) IP3 Ids Gain Pout 115 -10 -8 -6 -4 -2 0 2 4 Pin (dBm) IP3 Ids Gain Pout IM3, Im5 vs Pout -70 -60 -50 -40 -30 -20 8 101 2 14 161 8 20 IM3 (dBc) IM5 (dBc) Pout (dBm) IM3 IM5 IM3, Im5 vs Pout -70 -60 -50 -40 -30 -20 8 101 2 14 161 8 20 IM3 (dBc) IM5 (dBc) Pout (dBm) IM3 IM5 2100 2120 2140 2160 2180 IP3 vs Frequency IP3 (dBm) Frequency (MHz) Ids=100mA Ids=80mA Ids=60mA 2100 2120 2140 2160 2180 IP3 vs Frequency IP3 (dBm) Frequency (MHz) Ids=100mA Ids=80mA Ids=60mA
Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -9- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦Caution: Power Supply Sequence P0110002P Application Circuit Q1a GND Vgs +6V VdsR1 -5V Q1b GND For safe operation, electric p ower should b e supplied in following sequence. First, the negative voltage should be applied on the gate, and the voltage should be more negative than the pinch-off v oltage wh en y ou t urn o n the power supply. Then, drain bias can be applied. Finally, you can turn on the RF signal. When turning off the power supply, the sequence should be (1)RF signal (2)Drain (3)Gate. Gate Voltage Bias Voltage Drain Voltage On On More Than 1mS Off Bias Voltage More Than 1mS Off Gate Voltage Bias Voltage Drain Voltage On On More Than 1mS Off Bias Voltage More Than 1mS Off Gate Voltage Bias Voltage Drain Voltage On On More Than 1mS Off Bias Voltage More Than 1mS Off Vds +5.9V Ids 100mA Q1 UM T1N (Rohm) R1 33Ω 1/10W R2 1.8kΩ 1/10W R3 1Ω RL series (SUSUMU) R4 1kΩ 1/10W R5 1.3kΩ 1/10W ♦Bias Circuit [Passive Biasing] If you use a fixed bias circuit, you sometimes need to control the gate bias to get the same Ids, since the devices have some margin of pinch-off voltage (Vp) variation depending on the wafer lots. If you employ a fixe d Vgs b iasing for y our system, y ou sho uld closely monitor the drain c urrent, particularly when new wafer lots are introduced. If you used Ids other than 100mA, you can calculate the resistance values as follows: [Active Biasing] R4 set to be 1kΩ We recommend using an active bias circuit, which can eliminate the influence of Vp variation. An example of an active bias circuit called “current mirror ” is shown below. Here, two PNP transistors having the minimum variation of Ibe characteristics are used. These transistors adjust Vgs by changing Vds automatically. I t will re alize the c onstant current characteristics, regardless of the temperature. I1: Ic of Q1a I2:Ic of Q1b Vbe1: Vbe of Q1a Vbe2: Vbe of Q1b R1=(+6V-Vds+Vbe2-Vbe1)/I1=(+6V-Vds)/I1 R2=(Vds-Vbe2)/I1 R3=(+6V-Vds)/(Ids+I2) R5=|-5V-Vgs|/I2 The circuit should be connected directly in line with where the voltage supplies would be normally connected with the application circuit. Of course a matching circuit is required, but it is not shown in this figure. ♦Attention to Heat Radiation In the layout design of the printed circuit board (PCB) on which the power FETs are attached, the heat radiation to minimize the device junction temperature should be taken into account, since it significantly affects the MTTF and RF performance. In any environment, the junction temperature should be lower than the absolute maximum rating during the device operation and it is recommended that the thermal design has enough margin. [Note] In the measurements of RF performance (Pout vs Pin, etc) using the application circuit described before, the active bias circuit herein was not utilized. The application circuits were biased directly from two power supplies.
Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -10- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC The junction temperature can be calculated by the following formula. [Using Heat Sink] If you cannot get the junction temperature lower than the absolute maximum rating only with the plated thru holes, then you need to employ the heat sink. Attaching the heat sink directly under pin 4 of the device improves the thermal resistance between junction and ambient. Tjmax=(Vds*Ids-Pout)(Rth+Rboard+Rhs)+Ta Pout: Output power Rth: Thermal resistance between channel and case Rboard: Thermal resistance of PCB Rhs: Thermal resistance of heat sink Ta: Ambient temperature Tjmax: Maximum junction temperature Generally, there are two ways of heat radiation. One is the plated thru hole and the other is the heat sink. Key points will be il lustrated i n each case below. No te t hat no m easure against oscillation is adopted in the figures. In the design of circuit and layout, you should take stabilizing into account if necessary. [Using Thru Hole] □Multiple plated thru holes are required directly below the device. □Place more than 2 machine screws as close to the ground pin (p in 4) as p ossible. T he PCB is screwed on t he mounting plate or the h eat sink to lower the t hermal resistance of the PCB. □Lay out a large ground pad area with multiple plated thru holes around pin 4 of the device. □The required matching and feedback circuit described in the application circuit examples should be connected to the device, although it is not shown in the figure below. He 1.9 (4-R0.3) φ0.4 Plated Thru Holes φ3 Plated Thru Hole for 2.5 Machine Screws Package Outline 4-R0.3 atsink 2.95 0.6 ×2.85 φ5 Soldermask Keepout φ3 Plated Thru Hole for 2.5 Machine Screws φ5 Soldermask Keepout Grand Plane Grand Plane [Note] □Ground/thermal vias are cri tical f or t he p roper device performance. Drills of the recommended diameters should be used in the fabrication of vias. □Add as much copper a s possible to inner and outer layers near the part to ensure optimal thermal performance. φ0.4 Plated Thru Holes φ0.3 Plated Thru Holes φ3 Plated Thru Hole for 2.5 Machine Screws φ5 Soldermask Keepout Package Outline Keepout φ3 Plated Thru Hole for 2.5 Machine Screws Grand Plane φ5 Soldermask φ0.4 Plated Thru Holes φ0.3 Plated Thru Holes φ3 Plated Thru Hole for 2.5 Machine Screws φ5 Soldermask Keepout Package Outline Keepout φ3 Plated Thru Hole for 2.5 Machine Screws Grand Plane φ5 Soldermask □Mounting screws can be added near the part to fasten the board to heat sink. Ensure that the ground/thermal via region contacts the heat sink. □Do not put solder mask on the backside of the PCB in the region where the board contacts the heat sink. □RF trace wi dth de pends upon t he PCB material and construction. □Use 1 oz. Copper minimum.
Temperature (°C) Time (sec) Preheat:160°C 90 sec < 45 sec 260 ± 5°C 5sec max Time above 230°C 60 120 180 240 100 200 300 Temperature (°C) Time (sec) Preheat:160°C 90 sec < 45 sec 260 ± 5°C 5sec max Time above 230°C Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -11- Technical Note P0120002P 250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦Package Drawing [Note] The reflow profile is different from the o ne for Sn-Pb plating. 1 2 3 4.5 ± 0.1 1.6+0.15 φ 1.6 ± 0.3 2.5 ± 0.1 4.0 ± 0.25 1.1 ± 0.3 0.4+0.03 -0.02 0.1 ± 0.05 -0.2 If you use a s oldering iron t o a ttach the devices, please beware of the followings. (1) The tip of the iron should be grounded. Or you should use an iron that is electrostatic discharge proof. (2) The temperature of the iron tip should be l ower than 240°C and t he soldering should be c ompleted within 10 seconds. ♦Attention to ESD Generally, GaAs devices are very sensitive to electrostatic discharge (ESD). To reduce the ESD damage, please pay attention to the followings. The devices should be stored with the electrodes short-circuited by conductive materials. The workstation and tools sh ould be grounded for safe dissipation of the static c harges in the environment. The workpeople are to wear anti-static clothing and wrist straps. For safety reasons, resistance of 10MΩ or so should exist between workpeople and ground. ♦Laser Marking 1.3+0.1 1.65MAX B A (0.65) A: 0.67+0 -0.1 B: 0.45 1,2,3: Lot No. * * P: Product Type ♦Attention to Moisture The moisture sensitivity level (MSL) of P0120002P is 3, which means that the “floor life” is 168 hours below 30°C with relative humidity (Rh) of 60%. The de vices are usually shipped in moisture-resistant alumina-laminated packages. After breaking the packages, they are to be stored under normal temperature and humidity (5-35°C, 45-75%), with no corrosive gases or dust in the environment. Assemble the devices within 168 hours after breaking the package, or you have to bake them at 85°C for 24 hours before assembling. ♦Convection Reflow Profile (Recommended) ♦Reliability and Environmental Issues The detailed reliability information can be seen in Reliability and Quality Assurance, which you can download from our web site. SEI’s Yokohama Works, where the devices are manufactured, has been accredited ISO-14001 since 1999. We control the toxic materials in our products in a ccordance with PRTR regulation. ♦ Lead and Fluoride To realize Pb-free products, Sn-Bi is used for the lead frame plating. Any fluoride t hat h as bee n determined by th e Montreal agreement is not used in the products.
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC (3) In case you abandon the products, you should obey the related laws and regulations. ♦Caution GaAs FET chips are used in P0120002P. For safety reasons, you should attend to the following matters: ♦Technical Inquiries are Welcome (1) Do not put the products in your mouse. SEI welcomes technical questions from any customers. The e-mail is GaAsIC-ml@ml.sei.co.jp. You can also contact o ur regional offices as below. (2) Do not make the products into gases or powders, by burning, breaking or chemical treatments. ♦Worldwide Contacts Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan [Europe] Sumitomo Electric Europe Ltd.
220 Centennial Park, Centennial Avenue,
Elstree, Herts. WD6 3SL U.K. URL : http://www.sumielectric.com URL: http://www.sei.co.jp/GaAsIC/ [U.S.A.] Sumitomo Electric U.S.A., Inc.
3235 Kifer Road, Suite 150
Santa Clara, CA 95051-0815 USA Tel : +1-408-737-8517 Fax : +1-408-734-8881 [Asia/Pacific] Sumitomo Electric Industries, Ltd. Photo-Electron Device Division, Electron Devices Department 1, Taya-cho, Sakae-ku, Yokohama, Kanagawa, 244-8588 Japan E-mail: GaAsIC-ml@ml.sei.co.jp -12-
250mW GaAs Power FET (Pb-Free Type) SUMITOMO ELECTRIC ♦The i nformation i n this document is subject t o change wi thout noti ce. Ple ase refer for t he m ost up-to-date information before you start design using SEI’s devices. ♦Any part of this document may not be reproduced or copied. ♦SEI does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of SEI’s products described in this documents. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of SEI or others. ♦Descriptions of circuits and other related information in this document are for illustrative purpose in the examples of t he device operation and application. SEI does not assume any responsibility for any losses incurred by customers or third par ties arising from the use of the circuits and other related information in this document. ♦SEI’s sem i-conductor device pr oducts are desi gned a nd m anufactured f or use i n t he stan dard communication equipment. Customers that wish to use these products in applications not intended by SEI must contact SEI’ sales representatives in advance. ♦Generally, it is impossible to eliminate completely the defects in semi-conductor products, while SEI has been continually improving the quality and reliability of the products. SEI does not assume any responsibility for any losses i ncurred by c ustomers or thir d p arties by or arising from the use of SEI’s sem i-conductor products. Customers are to incorporat e sufficient safety measures in the des ign such as red undancy, fire-containment and anti-failure features. Specifications and information are subject to change without notice. 2003-1 1 Sumitomo Electric Industries, Ltd. 1,Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan -13-