F0321818M

F0321818M EUDYNA | Alldatasheet

Document overview

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• PDF pages: 10

Technical content

• +5 V single power supply
• 20 dB typical gain
• 2.0 GHz typical -3 dB cutoff frequency
• On-chip matching to 50 Ω
• 55 mA typical operating current
• Low-cost 18-lead MFP package
• Differential input and output
• Differential ECL compatible input

Applications

• Post-amplifier of an optical receiver circuit up to 2.5 Gb/s
• Logic gate buffer to interface between analog circuit and logic circuit Functional Description The F0321818M is a stable GaAs integrated limiting amplifier for use in a post-amplifier of an optical receiver circuit up to 2.5 Gb/s. The F0321818M typically specifies a small signal gain of 20 dB (Rs=RL=50 Ω) with a 3 dB-cutoff-frequency of 2.0 GHz. It features single +5 V supply operation, excellent VSWR’s of 1.1:1, and a typical dissipation current of 55 mA. The F0321818M can be also used as interface circuits in sensing systems and measure- ment instruments. Emitter coupled logic (ECL) or source coupled FET logic (SCFL) circuits are the most popular IC’s for high speed digital circuits; the F0321818M operating under a differential ECL compatible input condition is the best choice as the interface IC to join ana- log circuits to ECL circuits or conventional GaAs logic IC’s. Limiting Amplifier F0321818M

2 GHz Bandwidth

01.08.28

F0321818M2 GHz Limiting Amplifier ♦♦♦♦♦ Absolute Maximum Ratings Ta=25 °C, unless specified ♦♦♦♦♦ Recommended Operating Conditions VSS = GND ♦♦♦♦♦ Electrical Characteristics Ta = 25 °C, VDD = +5V, VSS = GND, unless specified retemaraPl obmyS eulaV stinU .niM. pyT. xaM egatloVylppuSV DD 57.45 6 4.5V daoLdelpuoCCAL R- 0 5- Ω erutarepmeTgnitarepOtneibmAT a 05 20 7C ° Parameter Symbol Test Conditions Value Units Min. Typ. Max. Supply Current Input Bias Point Output bias Point VSWR (IN, OUT) Gain -3dB High Frequency Cutoff Maximum Output Swing (single output) I DD VIN VOUT SWR GV Fc Vom Pin=-40dBm Pin=-40dBm f=1MHz Pin=-40dBm RL=50 Ω f=1MHz Pin=-40dBm RL=50 Ω RL=50 Ω 1.8 0.4 1.5 3.5 1.1 2.0 0.6 1.8 0.8 mA V V dB GHz V retemaraPl obmySe ulaVs tinU egatloVylppuSV DD V SS Vot5.0- SS 7+V tnerruCylppuSI DD 08A m )CA(gniwSegatloVtupnIV ,+NI V -NI 1V egatloVtuptuOV ,+TUO V -TUO V DD Vot5.2- DD V erutarepmeTgnitarepOtneibmAT a 07+ot0C ° erutarepmeTegarotST gts 521+ot55-C °

2 GHz Limiting Amplifier F0321818M

♦♦♦♦♦ Pin Assignments (Top View) ♦♦♦♦♦ Pin Descriptions VDD VSS VOUT- VOUT+VIN+ VIN- LPF- LPF+ Amp. Amp. Output Buffer 3 4 5 6 12131415 NOTE: Package bottom is Internally connected to VSS 1V SS Supply Voltage

2 VOUT- Output

7 LPF - AC Ground

10 VIN+ Input

11 LPF+ AC Ground

12 V SS Supply Voltage

13 VDD Supply Voltage

14 VDD Supply Voltage

16 V OUT+ Output

F0321818M2 GHz Limiting Amplifier 50 Ω 50 Ω 1) AC Characteristics F0321818M LPF- V SS VIN- VOUT- LPF+ V DD VDD VIN+ VOUT+ 0.1 µF 0.1µF 0.1µF Pin =-40 dBm 2200 pF Vector Network Analyzer 50 Ω50 Ω 2) Limiting Characteristics 50 Ω 50 Ω 50 Ω LPF- V SS VIN- VOUT- LPF+ V DD VDD VIN+ VOUT+ 0.1 µF 0.1µF 0.1µF 2200 pF Pulse Pattern Generator Attenuator Sampling OscilloscopeDATA CLOCK * DC BLOCK (PICOSECIND PULSE LABS, MODEL 5501) F0321818M

♦♦♦♦♦ Typical AC Characteristics (1) Gain Ta =25 °C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 Ω, 300 kHz-3 GHz (2) Dependance of Gain and High Frequency Cutoff on Power Supply Variations Ta =25 °C, VDD =-5 V, VSS =GND, Pin =-40 dBm, RL =50 Ω, 300 kHz-3 GHz Gain (dB) High Frequency Cut-off (GHz) 4.5 5.0 5.5 VDD (V) 4.5 5.0 5.5 VDD (V) 2.10 2.12 2.14 2.16 2.18 2.20 1M 10M 100M 1G Frequency (Hz) (dB)

F0321818M2 GHz Limiting Amplifier ♦♦♦♦♦ Typical AC Characteristics (3) VSWR's Ta =25 °C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 Ω, 300 kHz - 3 GHz (4) S parameters on Smith Chart Ta =25 °C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 Ω S11 at VIN+ S22 at VOUT+ START 100 MHz STOP 3 GHz START 100 MHz STOP 3 GHz *Almost same characteristics is exhibited at VIN- *Almost same characteristics is exhibited at VOUT- 1M 10M 100M 1G Frequency (Hz) 1M 10M 100M 1G Frequency (Hz) [at VIN+] [at VOUT+ ]

(a) VIN+ = 5 mVp-p (b) VIN+ = 50 mVp-p 100 psec/div 100 mV/div (c) VIN+ = 500 mVp-p 100 mV/div 100 psec/div 100 psec/div ♦♦♦♦♦ Typical Limiting Characteristics (1) Eye diagrams for 2.5 Gb/s NRZ Pseudo-random Data Response 223-1, Ta = 25 °C, VDD =5 V, VSS =GND, RL =50 Ω

F0321818M2 GHz Limiting Amplifier ♦♦♦♦♦ General Description A post-amplifier is positioned between a preamplifier (an amplifier for a faint photocurrent from PIN photo diode) and a decision circuit (a circuit to discriminate the logic level of the received signal), enlarging the output signal from the preamplifier to a higher level to dis- criminate the logic level. The input signal amplitude of the post-amplifier, meaning the output signal of the preamplifier, varies widely, because the optical signal power received by the PIN photo diode depends on the length of the transmission line. Therefore, the post-ampli- fier should function to output an almost constant signal level under widely varying input volt- age. This is called a limiting function, and the F0321818M provides excellent limiting charac- teristics. As shown in the data sheet, the increase of only 200 mV (400 mV→600 mV) in the output voltage can be observed even if the 2.5 Gb/s input signal varies widely from 50 mV to 500 mV. Wide use analog IC’s having satisfactory limiting functions as described above can not be found except for the F0321818M. Customized IC’s for each application or a circuit de- signed by discrete transistors are believed to have been developed. Post Matching Input/output VSWR’s of the F0321818M are well-designed for 50 Ω, typically showing excellent VSWR’s of 1.1:1. Therefore, the F0321818M can be applied for 50 Ω systems with no external parts. Furthermore, the fine VSWR characteristics provide stable operation even for cascade connections of two IC’s for a higher gain. The excellent VSWR characteristics of the F0321818M gives full play in a clock recovery system using SAW filters, because the impedance mismatch has a significant effect on the quality of the recovered clock signal. Gain Consideration The F0321818M has a small signal gain of 20 dB. A too high gain can be harmful be- cause of parasitic oscillation. If a slightly higher gain is needed, a 6 dB higher gain of 26 dB can be obtained by a high impedance termination instead of a 50 Ω load. A double gain can be achieved by simple cascade connection if a still higher gain is required.

The F0321818M based on the GaAs FET fabrication process intrinsically has more ex- cellent low-noise characteristics compared with IC’s based on the silicon bipolar process. Many transmission systems often demand superior signal-to-noise ratio; the F0321818M is the best choice for such applications. The differential circuit configuration in the input and output enable a complete differential operation to reduce common mode noise: simple single ended input and output operation is also available. LPF+ & LPF- The F0321818M has two terminals, LPF+ and LPF-, for AC ground. These terminals are connected to ground by a capacitor. The time constant of the feedback loop in the F0321818M depends on the capacitor, giving the lower frequency cutoff of the circuit by the large capacitor. A 0.1 micro farad is employed for conventional applications. Packaging The F0321818M is in an 18-lead metal-based flat package (MFP) about 300 mil square with the lead pitch of 40 mil, achieving miniaturization and low cost. It is originally developed by SEI to improve RF performance and heat radiation. Comparing with the SOP, the ground potential steadier at microwave frequency range and the thermal receptivity is smaller due to the metal based bottom structure made from CuW (an alloy of copper and tungsten) with a high thermal conductivity. The intrinsic broad band performance of the F0321818M can not be brought out by the standard SOP and LCC, because it is difficult to overcome impedance mismatch at high frequency around 2 GHz. Therefore, SEI’s superior package technology enable to achieve the excellent wide band limiting performance of the F0321818M. Precautions Owing to their small dimensions, the GaAs FET’s from which the F0321818M is designed are easily damaged or destroyed if subjected to large transient voltages. Such transients can be generated by power supplies when switched on if not properly decoupled. It is also pos- sible to induce spikes from static-electricity-charged operations or ungrounded equipment.

F0321818M2 GHz Limiting Amplifier Note: (1) All dimensions in millimeters. (2) Package is metal-hermetic sealed. 0.15 +0.05 -0.02 5.3±0.2 5.0±0.2 No.1 Lead Identifier 7.3±0.2 5.3±0.2 5.0±0.2 1.0±0.15 0.3±0.05 1.0±0.15 7.3±0.2 13.3±0.2 1.8±0.2 Electron Device Department