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GENERALPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY CO. makes no warranty for any errors whic h may appear in this document. Contact GENERALPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by GENERALPLUS TECHNOLOGY CO. for any infringement of patent or other rights o f third parties which may result from its use. In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably b e expected to result in significant injury to the user, without the express written approval of Generalplus. DATA SHEET Oct. 19, 2017 Version 1.0 GGPPLL0022EE55 1199..55KKBB LLCCDD CCOONNTTRROOLLLLEERR//DDRRIIVVEERR
© Generalplus Technology Inc. Proprietary & Confidential 2 Oct. 19, 2017 Version: 1.0 Table of Contents PAGE
© Generalplus Technology Inc. Proprietary & Confidential 3 Oct. 19, 2017 Version: 1.0 19.5KB LCD CONTROLLER/DRIVER 1. GENERAL DESCRIPTION GPL02E5, a CMOS 8 -bit single chip micro -processor, contains RAM, ROM, I/Os, one interrupt controller, two tone -generator, one noise generator, and one automatic display controller/driver. Based on applica tion needs, users are welling to select either DAC or PWM for audio output through mask option. To reduce power consumption, a software controllable sta ndby switch is built-in to render power management more efficiently. 2. BLOCK DIAGRAM 8-BIT RISC PROCESSOR I/O P I N D A
40 SEGMENTS X 8 COMMONS LCD DRIVER
P W M AUDP AUDN TIMER TIME BASE INTERRUPT LOGIC 19.5K x 8 PROG ROM
192 X 8
(2 TONES
1 NOISE
1 SPEECH)
- FEATURES Built-in 8-bit RISC processor 192-byte SRAM 19.5K-byte ROM Max. CPU clock: 1.5MHz @ 2.4V - 5.5V Operating voltage: 2.4V - 5.5V Built-in RC oscillator (only one resistor is needed) One 7-bit D/A for audio output or PWM audio output (mask option) Standby function available Operating current (enable LVRST) PWM: 480A (700KHz @ 4.5V) DAC: 720A (700KHz @ 4.5V) Extremely low standby current In standby mode: ISTBY < 1.0A LCD matrix: 40 segments x 8 commons LCD bias: 1/4, 1/5 LCD duty: 1/4, 1/8 Two tone-channels and one noise channel for coding aud io sound 10 general I/O pins for key input
© Generalplus Technology Inc. Proprietary & Confidential 4 Oct. 19, 2017 Version: 1.0 4. SIGNAL DESCRIPTIONS Mnemonic PIN No. Type Description SEG40 - 23 SEG22 - 1 18 - 1 64 - 43 O LCD driver segment output COM8 - 1 26 - 19 O LCD driver common output PA7 - 0 34 - 41 I/O I/O port PB1 - 0 32 - 33 I/O I/O port ROSC 42 I R-osc input, connect to VDD through resistor RESET 27 I System reset input AUDP 29 O Current DAC audio output, or PWM audio output (Mask Option) AUDN 31 O PWM audio output VDD 30 I Power input VSS 28 I Ground input
© Generalplus Technology Inc. Proprietary & Confidential 5 Oct. 19, 2017 Version: 1.0 5. FUNCTIONAL DESCRIPTIONS 5.1. ROM Area $5FFF $5000 $3FFF $3000 $2FFF $2000 $0030 $0000 $4FFF $4000 $1FFF $1000 $002F $00BF $0100 $00C0 $00FF $01FF $0600 $0200 $05FF $0FFF Program / Data Bank 2 LCD Display RAM Area SRAM for CPU Data I/O & Control Register Unused GENERALPLUS's Test Program Program Bank Program / Data Bank 0 Program / Data Bank 1 Interrupt Vectors Unused Unused $7FFF $7000 $6FFF $6000 Program / Data Bank 3 Unused To access ROM area, users should program the BANK SELECT Register ($D7) first and then access bank #1 , #2, or bank #3 by addressing the higher bank to fetch data. 5.2. System Operation Mode (R/W) GPL02E5 provides normal mode and standby mode for user’s options. 5.3. Interrupt (R/W) GPL02E5 has three interrupt sources : 2 Hz interrupt , Sound generator, and Power key 5.4. Low Voltage Reset (LVRST) GPL02E5 features a low voltage reset function. Once LVRST function is enabled (by mask option), entire system will enter RESET state if and only if the power supply voltage VDD is lower than 2.2V (typical). 5.5. I/O Port 5.5.1. IOA (R/W) b7, 6, 5, 4 -nibble 1 b3, 2, 1, 0 -nibble 0 5.5.2. IOB (R/W) b1, 0 -nibble 2 5.6. LCD Display Controller There are total of 8 commons and 40 segments available in GPL02E5. The 40 -byte SRAM are allocated at $00-$2Fh for displaying LCD data. 5.7. Control Byte of I/O Port and LCD Duty Rate Port (W) 1). Set IOA, IOB as input status or output status 2). Set LCD duty 3). Set CPU clock rate: non-divided or divided-by-8 5.8. Tone and Noise GPL02E5 equips two tone -generator and one noise -generator. Totally, 10 bits are used for programming the tone frequency, and two registers for controlling the amplitude of ToneA and ToneB. Two types of noise can be chosen and one register can be used to control the amplitude of noise. 5.9. Speech Play Control Port (W) b0 = 0: non play mode 1: speech play mode 5.10. Speech Port (R/W) In speech play mode, once data is written to the speech port, it is pumped to speaker through D/A or PWM (mask option) converter. The bit7 is a sign bit , ‘0’ representing for positive data and ‘1’ for negative data. Both bit0 to bit5 are magnitude bits.
© Generalplus Technology Inc. Proprietary & Confidential 6 Oct. 19, 2017 Version: 1.0 6. ELECTRICAL SPECIFICATIONS 6.1. Absolute Maximum Ratings Characteristics Symbol Ratings DC Supply Voltage V+ < 7.0V Input Voltage Range VIN -0.5V to V+ + 0.5V Operating Temperature TA 0℃ to +60℃ Storage Temperature TSTO -50℃ to +150℃ Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions see AC/DC Electrical Characteristics. 6.2. DC Characteristics (VDD = 3.0V, TA = 25℃) Characteristics Symbol Limit Unit Test condition Min. Typ. Max. Operating Voltage VDD 2.4 - 3.6 V For 2-battery application Operating Current IOP - 380 - A VDD = 3.0V, FCPU = 700KHz Standby Current ISTBY - - 1.0 A VDD = 3.0V Audio output current IOH - -35 - mA VDD = 3.0V, VOH = 2.0V IOL - 40 - mA VDD = 3.0V, VOL = 0.8V Input High Level VIH - 0.5*VDD - V VDD = 3.0V Input Low Level VIL - 0.5*VDD - V VDD = 3.0V Output High I IOH - -1.0 - mA VDD = 3.0V, VOH = 2.0V Output Sink I IOL - 1.1 - mA VDD = 3.0V, VOL = 0.8V 6.3. DC Characteristics (VDD = 4.5V, TA = 25℃) Characteristics Symbol Limit Unit Test condition Min. Typ. Max. Operating Voltage VDD 3.6 - 5.5 V For 3-battery application Operating Current IOP - 720 - A VDD = 4.5V, FCPU = 700KHz Standby Current ISTBY - - 1.0 A VDD = 4.5V Audio output current IOH - 45 - mA VDD = 4.5V, VOH = 3.5V IOL - 50 - mA VDD = 4.5V, VOL = 0.8V Input High Level VIH - 0.5*VDD - V VDD = 4.5V Input Low Level VIL - 0.5*VDD - V VDD = 4.5V Output High I IOH - -1.3 - mA VDD = 4.5V, VOH = 3.5V Output Sink I IOL - 1.4 - mA VDD = 4.5V, VOL = 0.8V
© Generalplus Technology Inc. Proprietary & Confidential 7 Oct. 19, 2017 Version: 1.0 6.4. The Relationships between the ROSC and the FOSC 0.0 0.5 1.0 1.5 0 200 400 600 800 Rosc ( Kohms ) FCPU ( MHz ) 0.0 0.5 1.0 1.5 0 200 400 600 800 Rosc ( Kohms ) FCPU ( MHz ) 6.5. The Relationships between the FCPU and the IOP 0.0 0.5 1.0 0.0 0.5 1.0 1.5 F CPU ( MHz ) I OP ( m A ) VDD = 3V VDD = 4.5V 6.6. The Relationships between the FCPU and the VDD 0.0 0.5 1.0 1.5 2.0 3.0 4.0 5.0 VDD ( Volts ) F CPU ( MHz ) Rosc = 220 Kohms Rosc = 150 Kohms
© Generalplus Technology Inc. Proprietary & Confidential 8 Oct. 19, 2017 Version: 1.0 7. APPLICATION CIRCUITS 7.1. Application Circuit
© Generalplus Technology Inc. Proprietary & Confidential 10 Oct. 19, 2017 Version: 1.0 8. PACKAGE/PAD LOCATIONS 8.1. PAD Assignment 1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 SEG5 SEG4 SEG3 SEG2 SEG1 ROSC PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB0 PB1 AUDN VDD AUDP VSS RESET COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 (0,0) X Y This IC substrate should be connected to VSS Note1: To ensure that the IC functions properly, please bond all of VDD and VSS pins. Note2: The 0.1F capacitor between VDD and VSS should be placed to IC as clos e as possible. 8.2. Ordering Information Product Number Package Type GPL02E5-NnnV-C Chip form Note1: Code number is assigned for customer. Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
© Generalplus Technology Inc. Proprietary & Confidential 11 Oct. 19, 2017 Version: 1.0 8.3. PAD Locations PAD No. PAD Name X Y PAD No. PAD Name X Y 1 SEG23 -879.97 782.24 33 PB0 882.52 -779.89 2 SEG24 -879.97 662.19 34 PA7 882.52 -659.82 3 SEG25 -879.97 552.11 35 PA6 882.52 -549.76 4 SEG26 -879.97 451.94 36 PA5 882.52 -449.58 5 SEG27 -879.97 351.78 37 PA4 882.52 -349.42 6 SEG28 -879.97 251.60 38 PA3 882.52 -249.24 7 SEG29 -879.97 151.43 39 PA2 882.52 -149.08 8 SEG30 -879.97 51.27 40 PA1 882.52 -48.91 9 SEG31 -879.97 -48.91 41 PA0 882.52 51.27 10 SEG32 -879.97 -149.08 42 ROSC 882.52 151.43 11 SEG33 -879.97 -249.24 43 SEG1 882.52 251.60 12 SEG34 -879.97 -349.42 44 SEG2 882.52 351.78 13 SEG35 -879.98 -449.58 45 SEG3 882.52 451.94 14 SEG36 -879.97 -549.76 46 SEG4 882.52 552.11 15 SEG37 -879.97 -659.82 47 SEG5 882.52 662.19 16 SEG38 -879.97 -779.88 48 SEG6 882.52 782.24 17 SEG39 -759.91 -779.89 49 SEG7 762.45 782.24 18 SEG40 -649.84 -779.89 50 SEG8 652.38 782.24 19 COM1 -549.60 -779.89 51 SEG9 552.20 782.24 20 COM2 -449.49 -779.89 52 SEG10 452.04 782.24 21 COM3 -349.33 -779.89 53 SEG11 351.86 782.24 22 COM4 -249.16 -779.89 54 SEG12 251.69 782.24 23 COM5 -148.98 -779.89 55 SEG13 151.53 782.24 24 COM6 -48.82 -779.89 56 SEG14 51.35 782.24 25 COM7 51.35 -779.89 57 SEG15 -48.82 782.24 26 COM8 151.53 -779.89 58 SEG16 -148.98 782.24 27 RESET 251.69 -779.89 59 SEG17 -249.16 782.24 28 VSS 351.86 -749.36 60 SEG18 -349.33 782.24 29 AUDP 452.04 -749.36 61 SEG19 -449.49 782.24 30 VDD 552.20 -749.36 62 SEG20 -549.67 782.24 31 AUDN 652.38 -779.89 63 SEG21 -649.84 782.24 32 PB1 762.45 -779.89 64 SEG22 -759.91 782.24
© Generalplus Technology Inc. Proprietary & Confidential 12 Oct. 19, 2017 Version: 1.0 9. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. GENERALPLUS makes no war ranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheet s and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical l ife support equipment, are specifically not r ecommended without additional processing by GENERALPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc. Proprietary & Confidential 13 Oct. 19, 2017 Version: 1.0 10. REVISION HISTORY Date Revision # Description Page Oct. 19, 2017 1.0 Original 13