EPA680A EXCELICS | Alldatasheet

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UPDATED 05/02/2006 High Efficiency Heterojunction Power FET Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 page 1 of 3 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com Revised May 2006 Chip Thickness: 45 ± 15 microns : Via Hole No Via Hole For EPA680A All Dimensions In Microns

FEATURES

  • +36.5dBm TYPICAL OUTPUT POWER
  • 6.5dB TYPICAL POWER GAIN FOR EPA680A AND 8.0dB FOR EPA680AV AT 12GHz
  • 0.4 X 6800 MICRON RECESSED “MUSHROOM” GATE
  • Si 3N4 PASSIVATION AND PLATED HEAT SINK
  • ADVANCED EPITAXIAL DOPING PROFILE PROVIDES HIGH POWER EFFICIENCY AND RELIABILITY
  • Idss SORTED IN 160mA PER BIN RANGE ELECTRICAL CHARACTERISTICS (Ta = 25 OC) Caution! ESD sensitive device. EPA680A EPA680AV SYMBOLS PARAMETERS/TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT P1dB Output Power at 1dB Compression f=12GHz Vds=8V, Ids=50% Idss 35.5 36.5 35.5 36.5 dBm G1dB Gain at 1dB Compression f=12GHz Vds=8V, Ids=50% Idss 5.5 6.5 7 8 dB PAE Power Added Efficiency at 1dB Compression Vds=8V, Ids=50% Idss f=12GHz 33 36 % Idss Saturated Drain Current Vds=3V, Vgs=0V 1250 2050 2690 1250 2050 2690 mA Gm Transconductance Vds=3V, Vgs=0V 1360 2150 1360 2150 mS Vp Pinch-off Voltage Vds=3V,Ids=20mA -1 .0 -2.5 -1.0 -2.5 V BVgd Drain Breakdown Voltage Igd=6.8mA -13 -15 -13 -15 V BVgs Source Breakdown Voltage Igs=6.8mA -7 -14 -7 -14 V Rth Thermal Resistance (Au-Sn Eutectic Attach) 6 5.5 oC/W MAXIMUM RATINGS AT 25OC EPA680A EPA680AV SYMBOLS PARAMETERS ABSOLUTE1 CONTINUOUS 2 ABSOLUTE 1 CONTINUOUS 2 Vds Drain-Source Voltage 12V 8V 12V 8V Vgs Gate-Source Voltage -5V -3V -5V -3V Igsf Forward Gate Current 30.6 mA 10.2 mA 30.6 mA 10.2 mA Igsr Reserve Gate Current -5.1 mA -1.7 mA -5.1 mA -1.7 mA Pin Input Power 33.5 dBm @ 3dB Compression 33.5 dBm @ 3dB Compression Tch Channel Temperature 175 oC 175 oC 175 oC 175 oC Tstg Storage Temperature -65/175 oC -65/175 oC -65/175 oC -65/175 oC Pt Total Power Dissipation 23 W 23 W 25 W 25 W Note: 1. Exceeding any of the above ratings may result in permanent damage. 2. Exceeding any of the above ratings may reduce MTTF below design goals. D DD D GGGG 60 231 1320 135 201 50 100 440

UPDATED 05/02/2006 High Efficiency Heterojunction Power FET Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 page 2 of 3 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com Revised May 2006 S-PARAMETERS EPA680A 8V, 1/2 Idss Freq S11 S21 S12 S22 (GHz) Mag Ang Mag Ang Mag Ang Mag Ang Note: The data included 0.7 mils diameter Au bonding wires: 4 gate wires, 15 mils each; 4 drain wires, 15 mils each; 10 source wires, 7 mils each.

UPDATED 05/02/2006 High Efficiency Heterojunction Power FET Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 page 3 of 3 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com Revised May 2006 S-PARAMETERS EPA680AV 8V, 1/2 Idss Freq S11 S21 S12 S22 (GHz) Mag Ang Mag Ang Mag Ang Mag Ang Note: The data included 0.7 mils diameter Au bonding wires: 4 gate wires, 15 mils each; 4 drain wires, 15 mils each;