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Technical content

FEATURES

  • Ultra Low Gate Charge
  • Reduced Gate Drive Requirement
  • Enhanced 30 V, V GS Rating
  • Reduced C iss , C oss , C rss
  • Extremely High Frequency Operation
  • Repetitive Avalanche Rated
  • Compliant to RoHS Directive 2002/95/EC Notes a. Repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. V DD = 50 V, starting T J = 25 °C, L = 25 mH, R g = 25 , I AS = 6.2 A (see fig. 12). c. I SD  6.2 A, dI/dt  80 A/μs, V DD  V DS , T J  150 °C. d. 1.6 mm from case. PRODUCT SUMMARY V DS (V) 600 R DS(on) ()V GS = 10 V 1.2 Q g (Max.) (nC) 39 Q gs (nC) 10 Q gd (nC) 19 Configuration Single N-Channel MOSFET G D S Available RoHS* COMPLIANT ABSOLUTE MAXIMUM RATINGS (T C = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V DS

600 V Gate-Source Voltage V

± 30 Continuous Drain Current V GS at 10 V T C = 25 °C I D AT C = 100 °C 2.9 Pulsed Drain Current a I DM Linear Derating Factor 1.0 W/°C Single Pulse Avalanche Energy b E AS 530 mJ Repetitive Avalanche Current a I AR 6.2 A Repetitive Avalanche Energy a E AR 13 mJ Maximum Power Dissipation T C = 25 °C P D 125 W Peak Diode Recovery dV/dt c dV/dt 3.0 V/ns Operating Junction and Storage Temperature Range T J , T stg - 55 to + 150 °C Soldering Recommendations (Peak Temperature) for 10 s 300 d Mounting Torque 6-32 or M3 screw 10 lbf · in

1.1 N · m

  • Pb containing terminations are not RoHS compliant, exemptions may apply D51/%56/ www.daysemi.jp T O-220AB T op View GD S

a. Repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. T HERMAL RESISTANCE RATINGS PARAMETER SYMB OL TYP. MAX. UNIT Maximum Junction-to-Ambient RthJ A -6 °C/WCase-to-Sink, Flat, Greased Surface Rth CS 0.50 Maximum Junction-to-Case (Drain) Rth JC -1 SPECIFI CATIONS (TJ = 25 °C, unless otherwise noted) PA RAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Sta tic Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 600 - - V VDS Te mperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C Gate-Source Threshold Voltage VGS (th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V Gate-Source Leakage IGSS V GS = 20 - - ± 100 nA Zero Gate Voltage Drain Current ID SS VDS = 600 V , VGS = 0 V - - 100 μA VDS = 480 V , VGS = 0 V, TJ = 125 °C - - 500 Drain-Source On-State Resistance RDS (on) V GS = 10 V ID = 3.7 Ab -- 1 . 2  Forward Transconductance gfs VDS = 100 V , ID = 3.7 Ab 3.7 - - S Dynam ic Input Capacitance Ciss VGS = 0 V VDS = 25 V f = 1.0 MHz, see fig. 5 - 1100 - pFOutput Capacitance Coss - 140 - Reverse Transfer Capacitance Crss -1 Total Gate Charge Qg VGS = 10 V ID = 4 A, V DS = 360 V see fig. 6 and 13b 3 9 nC Gate-Source Charge Qgs -- 1 0 Gate-Drain Charge Qgd -- 1 9 Turn-On Delay Time td(on VDD = 300 V, ID = 4 A Rg = 9.1 , RD = 47, see fig. 10b ns Rise Time tr -2 Turn-Off Delay Time td(of f) -2 Fall Time tf -1 Internal Drain Inductance LD B etween lead, 6 mm (0.25") from package and center of die contact -4 . 5- nH Internal Source Inductance L S -7 . 5- D rain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I S MOSFET symbol sh owing the integral reverse p - n junction diode -- 4 . 0 A Pulsed Diode Forward Currenta ISM -- 2 5 Body Diode Voltage VSD TJ = 25 ° C, IS = 4 A, V GS = 0 Vb -- 1 . 5 V Body Diode Reverse Recovery Time trr TJ = 25 ° C, IF = 4 A , dI/dt = 100 A/μs b - 440 680 ns Body Diode Reverse Recovery Charge Q rr -2 . 1 3 . 2 μ C Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) D S G S D G D51/%56/ www.daysemi.jp

T YPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fi g. 1 - Typical Output Characteristics, TC = 2 5 °C Fig. 2 - Typical Output Characteristics, TC = 15 0 °C Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 91114_01 Bottom To p VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width TC = 25 °C 4.5 V VDS, Dr ain-to-Source Voltage (V) ID, Dr ain Current (A) 100 101 101 100 10-1 10-2 10-2 10-1 102 101 100 10-1 100 101 VDS, Dr ain-to-Source Voltage (V) ID, Dr ain Current (A) Bottom To p VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width TC = 150 °C 91114_02 4.5 V 10-2 10-2 10-1 102 20 µs Pulse Width VDS = 100 V 101 100 10-1 ID, Dr ain Current (A) VGS, Gate-to-Source Voltage (V) 5678 9 1 04 25 °C 150 °C 91114_03 ID = 4 A VGS = 10 V3.0 0.0 0.5 1.0 1.5 2.0 2.5 TJ, J unction Temperature (°C) RDS(on), Dr ain-to-Source On Resistance (Normalized) 91114_04 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 3.5 D51/%56/ www.daysemi.jp

g. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area 2400 2000 1600 1200 400 800 100 101 Capacitance (pF) VDS, Dr ain-to-Source Voltage (V) Ciss Crss Coss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shor ted Crss = Cgd Coss = Cds + Cgd 91114_05 QG, Total Gate Charge (nC) VGS, Gate-to-Source Voltage (V) 0 8 40322416 VDS = 180 V VDS = 240 V F or test circuit see figure 13 VDS = 300 V 91114_06 ID = 3.2 A 101 100 VSD, Source-to-Dr ain Voltage (V) ISD, Re verse Drain Current (A) 25 °C 150 °C VGS = 0 V 91114_07 10 µs 100 µs 1 ms 10 ms Oper ation in this area limited by RDS(on) VDS, Dr ain-to-Source Voltage (V) ID, Dr ain Current (A) TC = 25 °C TJ = 150 °C Single Pulse10-2 103 0.1 0.1 25 102 25 103 25 104 91114_08 102 D51/%56/ www.daysemi.jp

Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10a - Switching Time Test Circuit Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case ID, Dr ain Current (A) TC, Case Temperature (°C) 0.0 2.5 3.0 3.5 4.0 5.0 1501251007550 91114_09 1.0 2.0 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % RD VGS Rg D.U.T. 10 V VDS VDD VDS 90 % 10 % VGS td(on) tr td(off) tf 0.1 10-2 10-5 10-4 10-3 10-2 0.1 1 10 PDM t1, Rectangular Pulse Dur ation (s) Ther mal Response (ZthJC) Notes: Duty Factor, D = t1/t2 Peak Tj = PDM x ZthJC + TC Single Pulse (Ther mal Response) 0 − 0.5 0.2 0.1 0.05 0.02 0.01 91114_11 D51/%56/ www.daysemi.jp

g. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit Rg I AS 01 Ωt p D.U.T. L V DS - V DD 10 V Va ry tp to obtain required IAS IAS VDS VDD VDS tp 1200 200 400 600 800 1000 1501251007550 Star ting TJ, J unction Temperature (°C) EAS, Single Pulse Energy (mJ) Bottom To p ID 1.8 A 2.9 A 4 A VDD = 50 V 91114_12c QGS QGD QG VG Charge 10 V D.U.T. 3 mA VGS VDS IG ID 0.3 µF 0.2 µF 50 kΩ 12 V Current regulator Current sampling resistors Same type as D.U.T. D51/%56/ www.daysemi.jp

  • M = 1.32 mm to 1.62 mm (dim ension including protrusion) Heatsink hole for HVM 321 L L(1) D H(1) Q Ø P A F J(1) b(1) e(1) e E b C MILLIMETERS INCHES A 4.25 4.65 0.167 0.183 b 0.69 1.01 0.027 0.040 b(1) 1.20 1.73 0.047 0.068 c 0.36 0.61 0.014 0.024 D 14.85 15.49 0.585 0.610 E 10.04 10.51 0.395 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.09 6.48 0.240 0.255 J(1) 2.41 2.92 0.095 0.115 L 13.35 14.02 0.526 0.552 L(1) 3.32 3.82 0.131 0.150 Ø P 3.54 3.94 0.139 0.155 Q 2.60 3.00 0.102 0.118 ECN: X12-0208-Rev. N, 08-Oct-12 DWG: 5471

Package Information

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