DTL1N60 DINTEK | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 12
Technical content
FEATURES
- Halogen-free According to IEC 61249-2-21 Definition
- Dynamic dV/dt Rating
- Repetitive Avalanche Rated
- Available in Tape and Reel
- F a s t S w i t c h i n g
- Ease of Paralleling
- Compliant to RoHS Directive 2002/95/EC Notes a. Repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. V DD = 50 V, starting T J = 25 °C, L = 37 mH, R g = 25 Ω, I AS = 1.4 A (see fig. 12). c. I SD ≤1.4 A, dI/dt ≤ 40 A/μs, V DD ≤ V DS , T J ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). PRODUCT SUMMARY V DS (V) 600 R DS(on) (Ω)V GS = 10 V 7 Q g (Max.) (nC) 14 Q gs (nC) 2.7 Q gd (nC) 8.1 Configuration Single N-Channel MOSFET G D S DPAK (TO-252) IPAK (TO-251) G D SS D G D ABSOLUTE MAXIMUM RATINGS T C = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V DS
600 V Gate-Source Voltage V
± 20 Continuous Drain Current V GS at 10 V T C = 25 °C I D 1.4 AT C = 100 °C 0.89 Pulsed Drain Current a I DM 5.6 Linear Derating Factor 0.28 W/°C Linear Derating Factor (PCB Mount) e 0.020 Single Pulse Avalanche Energy b E AS 93 mJ Repetitive Avalanche Current a I AR 1.4 A Repetitive Avalanche Energy a E AR 3.6 mJ Maximum Power Dissipation T C = 25 °C P D
36 W Maximum Power Dissipation (PCB Mount)
e T A = 25 °C 2.5 Peak Diode Recovery dV/dt c dV/dt 3.8 V/ns Operating Junction and Storage Temperature Range T J , T stg - 55 to + 150 °C Soldering Recommendations (Peak Temperature) for 10 s 260 d * Pb containing terminations are not RoHS compliant, exemptions may apply TO-220AB Top View GDS DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
a. When mounted on 1" square PCB (FR-4 or G-10 material). Notes a. Repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL MIN. TYP. MAX. UNIT Maximum Junction-to-Ambient R thJA - - 110 °C/WMaximum Junction-to-Ambient (PCB Mount) a R thJA -- 5 0 Maximum Junction-to-Case (Drain) R thJC -- 3 .5 SPECIFICATIONS T J = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V DS V GS = 0 V, I D = 250 μA 600 - - V V DS Temperature Coefficient ΔV DS J Reference to 25 °C, I D Gate-Source Threshold Voltage V GS(th) V DS = V GS , I D = 250 μA 2.0 - 4.0 V Gate-Source Leakage I GSS V GS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current I DSS V DS = 600 V, V GS = 0 V - - 100 μA V DS = 480 V, V GS = 0 V, T J = 125 °C - - 500 Drain-Source On-State Resistance R DS(on) V GS = 10 V I D = 1.2 A b -- 7 . 0 Ω Forward Transconductance g fs V DS = 50 V, I D = 1.2 A 1.4 - - S Dynamic Input Capacitance C iss V GS = 0 V, V DS = - 25 V, f = 1.0 MHz, see fig. 5 - 229 - pFOutput Capacitance C oss -4 2- Reverse Transfer Capacitance C rss -2 . 6- Total Gate Charge Q g V GS = 10 V I D = 1.4 A, V DS = 360 V, see fig. 6 and 13 b -- 1 4 nC Gate-Source Charge Q gs -- 2 . 7 Gate-Drain Charge Q gd -- 8 . 1 Turn-On Delay Time t d(on) V DD = 300 V, I D = 1.4 A, R g = 18 Ω, R D = 135 Ω, see fig. 10 b -1 0- ns Rise Time t r -1 3- Turn-Off Delay Time t d(off) -3 0- Fall Time t f -2 5 - Internal Drain Inductance L D Between lead, 6 mm (0.25") from package and center of die contact -4 . 5- nH Internal Source Inductance L S -7 . 5- Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I S MOSFET symbol showing the integral reverse p - n junction diode -- 2 . 0 A Pulsed Diode Forward Current a I SM -- 8 . 0 Body Diode Voltage V SD T J = 25 °C, I S = 1.4 A, V GS = 0 V b -- 1 . 6 V Body Diode Reverse Recovery Time t rr T J = 25 °C, I F = 1.4 A, dI/dt = 100 A/μs b - 290 580 ns Body Diode Reverse Recovery Charge Q rr - 0.67 1.3 μC Forward Turn-On Time t on Intrinsic turn-on time is negligible (turn-on is dominated by L S and L D D S G S D G DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 0.01 0.1 0.1 100 20μs PULSE WIDTH T = 25 C J TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V V , Drain-to-Source Voltage (V) I , Drain-to-Source Current (A) DS D 4.5V 0.1 100 20μs PULSE WIDTH T = 150 C J TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V V , Drain-to-Source Voltage (V) I , Drain-to-Source Current (A) DS D 4.5V 0.1 4.0 5.0 6.0 7.0 8.0 9.0 V = 100V 20μs PULSE WIDTH DS V , Gate-to-Source Voltage (V) I , Drain-to-Source Current (A) GS D T = 25 C J T = 150 C J -60 -40 -20 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 T , Junction Temperature ( C) R , Drain-to-Source On Resistance (Normalized) J DS(on) V I GS D 10V 1.4A DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area 100 1000 10000 1 10 100 1000 C, Capacitance (pF) DS V , Drain-to-Source Voltage (V) A V = 0V, f = 1MHz C = C + C , C SHORTED C = C C = C + C GS iss gs gd ds rss gd oss ds gd C iss C oss C rss Q , Total Gate Charge (nC) V , Gate-to-Source Voltage (V) G GS FOR TEST CIRCUIT SEE FIGURE I D 1.4A V 120V DS V 300V DS V 480V DS 0.1 0.4 0.6 0.8 1.0 1.2 V ,Source-to-Drain Voltage (V) I , Reverse Drain Current (A) SD SD V = 0 V GS T = 25 C J T = 150 C J 0.1 100 100 1000 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) Single Pulse T T = 150 C = 25 C J C V , Drain-to-Source Voltage (V) I , Drain Current (A) I , Drain Current (A) DS D 10us 100us 1ms 10ms DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10a - Switching Time Test Circuit Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms 100 125 150 0.0 0.4 0.8 1.2 1.6 T , Case Temperature ( C) I , Drain Current (A) C D Pulse width 1 µs Duty factor 0.1 % R D V GS R g D.U.T. 10 V V DS V DD V DS 90 % 10 % V GS t d(on) t r t d(off) t f 0.01 0.1 0.00001 0.0001 0.001 0.01 0.1 Notes: 1. Duty factor D = t / t 2. Peak T P x Z + T J DM thJC C P t t DM t , Rectangular Pulse Duration (sec) Thermal Response (Z ) thJC 0.01 0.02 0.05 0.10 0.20 D = 0.50 SINGLE PULSE (THERMAL RESPONSE) A R g I AS 0.01 Ωt p D.U.T LV DS - V DD Driver 15 V 20 V I AS V DS t p DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 13a - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit 100 125 150 120 160 200 St a rting T , Junction Temperature ( C E Single Pulse Avalanche Energy (mJ) J AS I D TO P BOT T OM 65A Q GS Q GD Q G V G Charge V GS 670 690 710 730 750 770 0.0 0.4 0.8 1.2 1.6 A DS a v av I , Avalanche Current (A) V , Avalanche Voltage (V) D.U.T. 3 mA V GS V DS I G I D 0.3 µF 0.2 µF 50 kΩ 12 V Current regulator Current sampling resistors Same type as D.U.T. DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
Fig. 14 - For N-Channel P.W. Period dI/dt Diode recovery dV/dt Ripple 5 % Body diode forward drop Re-applied voltage Rever s e recovery current Body diode forward current V GS = 10 V a I S D Driver gate drive D.U.T. l S D waveform D.U.T. V D S waveform Inductor current D = P.W. Period Peak Dio d e Recovery d d t Test Circuit V DD dV/dt controlled by R g Driver s ame type a s D.U.T. I S D controlled by duty factor “D” D.U.T. - device under te s t D.U.T. Circuit layout con s ideration s Low s tray inductance G round plane Low leakage inductance current tran s former R g Note a. V GS = 5 V for logic level device s V DD DTL1N60/DTP1N60/DTU1N60 www.din-tek.jp
- M = 1.32 mm to 1.62 mm (dim ension including protrusion) Heatsink hole for HVM M L L(1) D H(1) Q Ø P A F J(1) b(1) e(1) e E b C MILLIMETERS INCHES A 4.25 4.65 0.167 0.183 b 0.69 1.01 0.027 0.040 b(1) 1.20 1.73 0.047 0.068 c 0.36 0.61 0.014 0.024 D 14.85 15.49 0.585 0.610 E 10.04 10.51 0.395 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.09 6.48 0.240 0.255 J(1) 2.41 2.92 0.095 0.115 L 13.35 14.02 0.526 0.552 L(1) 3.32 3.82 0.131 0.150 Ø P 3.54 3.94 0.139 0.155 Q 2.60 3.00 0.102 0.118 ECN: X12-0208-Rev. N, 08-Oct-12 DWG: 5471
Package Information
www.din-tek.jp
TO-252AA (HIGH VOLTAGE) Notes 1. Package body sizes exclude mold flash, protrusion or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 0.10 mm per side. 2. Package body sizes determined at the outermo st extremes of the plastic body exclusive of mold flas h, gate burrs and interlea d flash, but including any mismatch between the top and bottom of the plastic body. 3. The package top may be smaller than the package bottom. 4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.10 mm total in excess of "b" dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. E e b D H A c L θ MILLIMETERS INCHES E 6.40 6.73 0.252 0.265 L 1.40 1.77 0.055 0.070 L1 2.743 REF 0.108 REF L2 0.508 BSC 0.020 BSC L3 0.89 1.27 0.035 0.050 L4 0.64 1.01 0.025 0.040 D 6.00 6.22 0.236 0.245 H 9.40 10.40 0.370 0.409 b 0.64 0.88 0.025 0.035 b2 0.77 1.14 0.030 0.045 b3 5.21 5.46 0.205 0.215 e 2.286 BSC 0.090 BSC A 2.20 2.38 0.087 0.094 A1 0.00 0.13 0.000 0.005 c 0.45 0.60 0.018 0.024 c2 0.45 0.58 0.018 0.023 D1 5.30 - 0.209 - E1 4.40 - 0.173 - θ 0' 10' 0' 10' ECN: S-81965-Rev. A, 15-Sep-08 DWG: 5973 3DFNDJH,QIRUPDWLRQ www.din-tek.jp
TO-251AA (HIGH VOLTAGE) Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension are shown in inches and millimeters. outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions b4, L2, E1 and D1. 5. Lead dimension uncontrolled in L3. 6. Dimension b1, b3 and c1 apply to base metal only. 7. Outline conforms to JEDEC outline TO-251AA. Base metal Plating b1, b3 (b, b2) c1(c) Section B - B and C - C D A c Lead tip (Datum A) Thermal PAD View A - A A A C Seating plane C C B B θ1θ2 B L 3 x b2 3 x b E 2 x e
0.010 C B
M A 0.25 0.010 B A 0.25 A C M MILLIMETERS INCHES MILLIMETERS INCHES c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15' c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35' D 5.97 6.22 0.235 0.245 ECN: S-82111-Rev. A, 15-Sep-08 DWG: 5968 3DFNDJH,QIRUPDWLRQ www.din-tek.jp
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252) 0.420 (10.668) Recommended Minimum Pads Dimensions in Inches/(mm) 0.224 (5.690) 0.180 (4.572) 0.055 (1.397) 0.243 (6.180) 0.087 (2.202) 0.090 (2.286) Return to Index Return to Index $SSOLFDWLRQ1RWH www.din-tek.jp
ALL PRO DUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Din-Tek Intertechnology, Inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, “Din-Tek”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Din-Tek makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Din-Tek disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain type s of applications are based on Din-Tek’s knowledge of typical requirements that are often placed on Din-Tek products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. Parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. All operating parameters, including typical pa rameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Din-Tek’s terms and condit ions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicate d in writing, Din-Tek products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Din-Tek product could result in personal injury or death. Customers using or selling Din-Tek products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Din-Tek personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of Din-Tek. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Din-Tek Intertechnology, Inc. hereby certifies that all its products that are id entified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The Euro pean Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Din-Tek documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Din-Tek Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Din-Tek documentation may still make reference to the IEC 61249-2-21 definition. We co nfirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Legal Disclaimer Notice www.din-tek.jp