AP4201 AKM | Alldatasheet
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[AP4201] 015008157-E-00 - 1 - 2015/09 1. General Description The AP4201 is a 27 channel LED Driver that supports 2 types of serial interfaces (SCI serial interface or serial F/F cascade interface) to program LED lighting. The built-in 100mA drivable power MOSFET is used to shut off the LED current, and LEDs are controlled by a PWM method in accordance with the LED gradation data that is programmed into the device. Constant current output and Open drain output are selectable by DRSET setting pin. To reduce wirings in the system, voltage on anode side of LEDs can be communized. A maximum of 32 devices can be connected on a single BUS to a common master device; furthermore, each AP4201 retains its own programmed commands allowing continuous autonomous lighting. The internal UVLO function prevents the LEDs from incorrect operations when the supply voltage is 4V or less. An internal over current protection function and a thermal protection function are also integrated. 2. Features Power Supply Voltage 8.0V~24.0V 4.5V~5.5V (connect VIN pin and VDC1 pin) Oprating Temperature 0 ~ 70C Absolute Maximum Voltage 30V (VIN, LEDR0~8, LEDG0~8, LEDB0~8) 2 Types of Serial Interface for Setting Lighting Data - 4-wire SCI interface (maximum communication clock: 5MHz) - Serial-F/F cascade (maximum communication clock: 10MHz) - Applicable to both 3.3V and 5.0V input signal (output is fixed to 5.0V) LED Current maximum 100mA/ch - Constant Current Output 50mA/ch - Open Drain Output 100mA/ch (Each channel current is less than the value above when 27 channels are set simultaneously) LED Gradation 8-bit PWM gradation method (256 gradation) Built-in PWM Generator, Adjustable PWM Period Simultaneous Lighting-Off Function (When SCI interface setting) Protection Function - Under Voltage Lock Out (UVLO) - Over Current Protection (timer latch recovery type) - Thermal Shutdown (automatic recovery) Package 48-pin LQFP Application A LED loading machine for the decoration 27ch 100mA LED Driver IC AP4201
[AP4201] 015008157-E-00 - 2 - 2015/09 3. Table of Contents
[AP4201] 015008157-E-00 - 3 - 2015/09 4. Block Diagram and Functions ■ Block Diagram UVLO LDO15.0V VIN VDC1 THERMAL SHUTDOWN VREF LEDR0 IREF POR 1.4MHz OSC 2-bit DIVIDER 8-bit COUNTER 216-bit REGISTER CONTROL LOGIC SCI INTERFACE PWM GENERATOR 0 PWM GENERATOR 0 PWM GENERATOR 0 PWM GENERATOR 26 CSB/LAT SCK/CLK TxD/SI RxD/SO 5.0V LEDG0 LEDB8
27 PWM[26:0]
SCIEN ISET_R VDC LOW SIDE CURRENT SINK Constant Current or Open Drain 1.0V LEDB0 LEDR1 LEDG1 LEDB1 ISET_G ISET_B 5.0V DRSET DRSET DRSET 1.0mF 1.0mF RISET_R RISET_G RISET_B PWMSET PWM PWM VDC2 1.0mF 1.8V LDO2VIN Figure 1.Block Diagram ■ Function No Block Function
1 SCI
In case of SCI: hold the setting data of the PWM gradation. In case of serial F/F: hold the PWM gradation data.
2 CONTROL
LOGIC Detect SCI instruction, control the operation mode. 3 “216-bit” REGISTER Hold the 8-bit PWM gradation data of LEDR0~8, LEDG0~8 and LEDB0~8.
4 PWM
Compare PWM gradation with counter and generate PWM wave. 5 1.4MHz OSC Generate 1.4MHz clock. 6 “2-bit” DIVIDER Divide 1.4MHz clock to 256 gradation clock. 7 “8-bit” COUNTER Count with the 256 gradation clock within PWM period. 8 UVLO Generate reset signal for preventing unstable operating when input power voltage . decreased. 9 LDO1 Generate an internal 5 voltage. It can supply less than 30mA for driving external circuit. 10 LDO2 Generate an internal 1.8 voltage. Driving external circuit is forbidden. 11 VREF Generate a reference voltage. 12 IREF Generate a reference current. 13 POR Generate reset signal at power start up.
14 LOW SIDE
LED output driver which can set to current source or open drain output. Over current protection circuit is built in.
15 THERMAL
Shut down the LED current and set the VDC1,VDC2 pins to 0 voltage when internal temperature is more than setting value.
[AP4201] 015008157-E-00 - 4 - 2015/09 5. Ordering Guide AP4201 0 +70C 48-pin LQFP 6. Pin Configurations and Functions ■ Pin Layout 1:A3/CLRB 2:A4/ENB 3:CSB/LAT 4:SCK/CLK 5:TxD/SI 6:RxD/SO 7:DRSET 8:SCIEN 9:PWMSET 10:VDC2 11:VDC1 12:GND 36:LEDB3 35:LEDG3 34:LEDR3 33:LEDB4 32:LEDG4 31:PGND 30:PGND 29:LEDR4 28:LEDB5 27:LEDG5 26:LEDR5 25:LEDB6 13:VIN 14:ISET_R 15:ISET_G 16:ISET_B 17:LEDR8 18:LEDG8 19:LEDB8 20:LEDR7 21:LEDG7 22:LEDB7 23:LEDR6 24:LEDG6 48:A2 47:A1 46:A0 45:LEDB0 44:LEDG0 43:LEDR0 42:LEDB1 41:LEDG1 40:LEDR1 39:LEDB2 38:LEDG2 37:LEDR2 (Top View)
[AP4201] 015008157-E-00 - 5 - 2015/09 ■ Function No. Name Equivalent circuit Explanation
1 A3/CLRB
IC address input pin 3 (built in 100k ohm pull-up resistor). Configure by connecting to GND or open. CLRB input pin used for serial F/F. Data clear pin used for shift register.
2 A4/ENB
IC address input pin 4 (built in 100 k ohm pull-up resistor). Configure by connecting to GND or open. ENB input pin used for serial F/F. Control the shift resister data which reflect to PWM data or not.
3 CSB/LAT
Strobe signal input pin for SCI. Respective orders are accepted when the CSB terminal goes “L” level. The CSB terminal always needs to be “L” level while commands are entered or data are transferred. If the CSB pin goes “H” level when data are transferred, the commands are disregarded. LAT signal input pin used for serial F/F. Input LAT signal for shift register.
4 SCK/CLK
Clock signal input for SCI. Writing data is entered from the TxD pin at the SCK rising edge, reading data is output to RxD pin at the SCK falling edge. It is not always necessary to supply a clock signal to the SCK pin. CLK signal input pin used for serial F/F. CLK signal for shift register.
5 TxD/SI
Data signal input pin. To input commands, writing data. SI input pin for serial F/F. To input data signal of shift register. Input to F/F which determine LEDB0 lighting data.
6 RxD/SO
Data signal output pin for SCI. To output reading data. Outputs Hi-Z except when data is output. SO output pin for serial F/F. To output data signal of shift register. Output from F/F which determine LEDR8 lighting data.
7 DRSET
Switching pin which can switch to driver output current source or open drain (100kohm pull up) Connect to GND or set to open. If connect to GND, it can work as open drain mode.
8 SCIEN
Enable pin for serial interface. (100kohm pull up) Connect to GND or set to open. If connect to GND, it can work as serial F/F control mode. If open this pin, it can work as SCI control mode.
[AP4201] 015008157-E-00 - 6 - 2015/09
9 PWMSET
PWM period setting pin. (100kohm pull down) Connect to VDC1 pin or set to open. If connect to GND (or open), PWM gradation period= low speed 546µs(typ.) If connect to VDC1 pin, PWM gradation period= high speed 364µs(typ.)
10 VDC2
Internal 1.8V LDO output pin. Drive external circuit is prohibited. Connect a 1.0µF capacitor between the VDC2 pin and GND.
11 VDC1
Internal 5V LDO output pin. External current capability is 30mA maximum. Connect a 1.0µF capacitor between the VDC terminal and GND.
12 GND - Ground
13 VIN
IC power input pin. Internal 5V LDO’s output and 1.8V output. Connect a 1.0µF capacitor between the VDC terminal and GND.
14 ISET_R
1.0V + VDC1 Current setting pin for LEDR0~8. Connect an external resistor between this pin and GND. 15 ISET_G Same as 14-pin The pin which set the current of LEDG0~8. (same as 14 pin) 16 ISET_B Same as 14-pin The pin which set the current of LEDB0~8. (same as 14 pin)
17 LEDR8
R8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
18 LEDG8 Same as 17-pin
G8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
19 LEDB8 Same as 17-pin
B8 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
[AP4201] 015008157-E-00 - 7 - 2015/09
20 LEDR7 Same as 17-pin
R7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
21 LEDG7 Same as 17-pin
G7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
22 LEDB7 Same as 17-pin
B7 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
23 LEDR6 Same as 17-pin
R6 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
24 LEDG6 Same as 17-pin
G6 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
25 LEDB6 Same as 17-pin
B6 pin which connect to LED cathode. Current source/open drain output. Control the internal MON FET to drive LED with lighting setting.
26 LEDR5 Same as 17-pin
R5 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
27 LEDG5 Same as 17-pin
G5 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
28 LEDB5 Same as 17-pin
B5 pin (connect to LED cathode).Current source/open drain output. Control the internal MON-FET to drive LED with lighting setting.
29 LEDR4 Same as 17-pin
R4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED lighting setting.
30 PGND
- Ground pin for LED current.
31 PGND
- Ground pin for LED current.
32 LEDG4 Same as 17-pin
G4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED lighting setting.
33 LEDB4 Same as 17-pin
B4 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
34 LEDR3 Same as 17-pin
R3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
35 LEDG3 Same as 17-pin
G3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
36 LEDB3 Same as 17-pin
B3 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
37 LEDR2 Same as 17-pin
R2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting
[AP4201] 015008157-E-00 - 8 - 2015/09
38 LEDG2 Same as 17-pin
G2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting
39 LEDB2 Same as 17-pin
B2 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. 40 LEDR1 Same as 17-pin B2 pin (connect to LED cathode).Current source/open
41 LEDG1 Same as 17-pin
G1 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
42 LEDB1 Same as 17-pin
B1 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
43 LEDR0 Same as 17-pin
R0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
44 LEDG0 Same as 17-pin
G0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting.
45 LEDB0 Same as 17-pin
B0 pin (connect to LED cathode).Current source/open drain output. Control the internal MONFET to drive LED with lighting setting. 46 A0 VDC1VDC1 IC address input pin 0 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. 47 A1 VDC1VDC1 IC address input pin 1 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. 48 A2 VDC1VDC1 IC address input pin 2 (Built in 100kΩ pull-up resistor) Configure by connecting to GND or OPEN. Note 1. Handling of unused pins. (complementary): Set all unused pins open when the either interface for LED gradation data is selected. There is no need to connect unused pin to GND. Since No. 3~5 pins are always used, the circuit for unused status is not built-in to these pins. It is necessary to control these pins to not become Hi-Z state while the power is supplied. Note 2. The PGND pin and the GND pin are not connected internally. Therefore these pins must be connected externally. Note 3. symbol means high voltage tolerance MOS, the pin with this MOS can tolerate high voltage.
[AP4201] 015008157-E-00 - 9 - 2015/09 7. Absolute Maximum Rating Parameter Symbol min max Unit VIN voltage VIN -0.3 30 V LEDR0-8, LEDG0-8, LED B0-8 voltage VLED -0.3 30 V CSB/LAT, SCK/CLK, TxD/SI, A0-2, A3/CLRB, A4/ENB, RxD/SO, DRSET Voltage (Note 7) - -0.3 VDC1 + 0.3 V VDC2 Voltage - -0.3 1.98 V PWMSET, VDC1, ISET_R, ISET_G, ISET_B voltage - -0.3 5.5 V Power Dissipation (Note 5, Note 6) PD - 1400 mW Storage Temperature TSTG -40 150 °C Note 4. All voltages are with respect to GND pin (GND, PGND) as zero (reference) voltage. Note 5. PD is decreased at the rate of 14mW/C when Ta≥25C. (Mounted on 100 mm 103 mm t=1.0mm double side FR-4 board.) Note 6. When calculating thermal design, please include the heat generated by the internal regulator along with the LED pins.
- The case of fixed current output: IC power consumption = LED pins power consumption (LED current*LED pin voltage) * LED numbers +Internal LDO power consumption [(VIN-VDC1) * (VDC1 output current+IC consumption (8.5mA))] +VDC1*IC consumption (8.5mA)
- The case of open drain output: IC power consumption = LED pins power consumption (LED current*LED current*LED ON-resistor 9.3ohm)*LED numbers +Internal LDO power consumption [(VIN-VDC1) * (VDC1 output current+IC consumption (2mA))] +VDC1*IC consumption (2mA) Note 7. The maximum value is limited to 5.5V when the VDC1 exceeds 5.2V. WARING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. 8. Recommended Operating Conditions Parameter Symbol min typ max Unit Conditions Input Voltage 1 VIN1 8.0 12.0 24.0 V Not connect VIN pin and VDC1 pin Input Voltage 2 VIN2 4.5 5.0 5.5 V Connect VIN pin and VDC1 pin Maximum LDO1 output current IDC - - 30 mA VIN=12V Maximum LED pin voltage VLEDOFF - - 24.0 V LED pin= off setting Operation Temperature Ta 0 - 70 °C Note 8. Input range (VIN pin voltage) = 5.5V~8.0V is prohibited. WARNING: AKM assumes no responsibility for the usage beyond the conditions in this data sheet.
[AP4201] 015008157-E-00 - 10 - 2015/09 9. Electrical Characteristics (VIN=12V, GND=PGND=0V, Ta=+25 C, Capacitor at VIN, VDC1 and VDC2 pins = 1.0μF. DRSET=”H” (fixed current), RISET_R=RISET_G=RISET_B= 33.3kΩ; Recommend Parts, unless otherwise specified) Parameter Symbol min typ max Unit Conditions Power Consumption IDD1 - 1.2 2.0 mA DRSET=”L” (open drain) PWM duty= 0% IDD2 - 1.3 2.0 DRSET=”L” (open drain) PWM duty=50% IDD3 - 5.0 8.5 DRSET=”H” (fixed current) PWM duty= 0% IDD4 - 5.0 8.5 DRSET=”L” (fixed current) PWM duty= 50% VIN Reset Voltage VINRST - 4.0 4.2 V Activated by decreasing VIN from normal state. VIN Hysteresis Width VINHYS - 0.2 - V Hysteresis between VINrst and VIN set voltage (VINset) (VINset>VINrst) LDO1 Output Voltage VDC1 4.75 5.0 5.25 V VIN=12V, IDC1=-30mA (Note 9) LDO2 Output Voltage VDC2 - 1.8 - V VIN=12V, IDC2=-0mA LED Current Capability per Channel ILEDO - - 100 mA DRSET=”L” (open drain) ILEDC - - 50 mA DRSET= “H” (fixed current) LED current switching MOS-FET ON resistance RLED - 6 9.3 Ω DRSET=”L” (open drain) LED current= +100mA LED pin Voltage (for all 27 channels) RLED 1.8 - (Note 10) V DRSET=”H” (fixed current) LED current= +50mA RISET= 20kΩ 0.8 - (Note 10) V DRSET=”H” (fixed current) LED current= +15mA RISET= 66.7kΩ LED Current Accuracy 1 ILEDC1 28.05 30.0 31.95 mA DRSET=”H” (fixed current) LED Current Accuracy 2 ILEDC2 13.95 15.0 16.05 mA DRSET=”H” (fixed current) RISET= 66.7kΩ LED Current Mismatch △ILED -4 - 4 % DRSET=”H” (fixed current) (Note 11) LED pin off-lead Current ILEAK_LED - - 1.0 μA LED pin voltage= 24V PWM Period Accuracy TPWM -10 - +10 % All setting value PWM Setting Range DPWM 0 - 100 % All setting value PWM Setting Error - - ±1 - LSB PWMSET=”L” - ±1 - LSB PWMSET=”H” Input High-level Voltage VIH 2.5 - 5.5 V Input Low-level Voltage VIL -0.2 - 0.5 V Output High-level Voltage VOH 3.7 - 5.3 V IO=-500μA Output Low-level Voltage VOL 0 - 0.8 V IO=+500μA Input Leak Current ILI -1.0 - 1.0 μA CSB, SCK, TxD pins Output Leak Current ILO -1.0 - 1.0 μA Note 9. IDC1=-30mA means that internal 5V LDO1 (VDC1 pin) can drive external circuit less than 30mA. Note 10. VLED identifies the voltage range. There is a range that cannot be set even less than absolute maximum voltage (30V) because of the maximum power dissipation. Please refer to “10.8 Protection Functions”. Note 11. 100II II(%)I LEDxxMINLEDxxMAX LEDxxMINLEDxxMAX LED △
Table 1. SCI Timing Figure 2. SCI Interface Timing Chart 1
0.8 VDC
0.2 VDC
Figure 3. SCI Interface Timing Chart 2 Table 2. Serial F/F Control Timing data set-up time and data hold time. But the SO (RxD) pin output delay time is the value when CL=20pF. Figure 4. Serial F/F Control timing
which is connected to each RGB line, and the all LED pins in the same color are set with the same value. diversification of the LED lighting across multiple AP4201s in a single BUS can be achieved. being held even while all LEDs are turned off. Table 3. Description Table for Setting Pins Table 4. Command Description (Hereinafter initial “16-bit” data transmission is called command part)
Table 5. LED Line Address Table 6. Command Table Note 12. Changing setting of the A4~A0 pins is prohibited when the CSB pin= “L” (during command input).
- Normal Command: when the CSB pin is set “H” after executing a command, the state of the LED lighting
reflects the PWM gradation data configured by the command.
- Unreflected Command: when the CSB pin is set “H” after executing a command, the state of LED
changed by executing the command.
- Latch Command: Latch Command simultaneously executes the LED lighting based on all the PWM
gradation data in the IC when the CSB pin is set “H” after executing the Latch command.
- When the latch command is executed, LEDs that are not set with PWM gradation data are turned off.
- In case of the latch command, the CSB pin can be set “H” after entering the “4-bit” instruction.
- When ALL= “0” is set, the PWM gradation data should be set for 1-RGB (=3 LED lines).
- When ALL= “0” is set, there is a possibility that the AP4201 becomes shipping test status by setting a one
Table 7. IC Address List IC Address Data [A4~A0]: Command will be executed to the assigned IC address. Note 14. Set address 0~31 by the A4~A0 pin for IC address setting (connect to GND or OPEN).
Table 8. Normal Command Examples Case 1: Write LED gradation data using an “8-bit” configuration to the IC assigned by an IC address. initial “16-bit” command, “8-bit” x 27 LED lines = “216-bit” of data input are necessary. Case 2: Write LED gradation data using an “8-bit” configuration to the IC assigned by an IC address. initial “16-bit” command, CLK pulses for “8-bit” x 27 LED lines = “216-bit” are necessary. Case 5: This command means [turn off all at once]. In accordance with [RW]=[ALL]=[RST]= “1”, turn off LEDs of the IC assigned by an IC address. continually. Executing a latch command can relight the LEDs with the same gradation data. Case 6: Write LED gradation data by an “8-bit” configuration to an IC assigned by the IC address. Case 7. Write LED gradation data using an “8-bit” configuration to an IC assigned the IC address. three colors in the order as shown below.
[AP4201] 015008157-E-00 - 16 - 2015/09 ・Timing Diagram SCK TxD RW=1,ALL=1,RST=0,ch3～ch0=任意 の場合 （RxDはHi-Z出力される） CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK TxD B8D5 B8D4 B8D3 B8D2 B8D1 B8D0 R7D7 R7D6 R7D5 R7D4 R7D3 R7D2 R7D1 R7D0 33 4842 43 44 45 46 4734 35 36 37 38 39 40 41 B8D7 B8D6 SCK TxD G0D5 G0D4 G0D3 G0D2 G0D1 G0D0 B0D7 B0D6 B0D5 B0D4 B0D3 B0D2 B0D1 B0D0 217 232226 227 228 229 230 231218 219 220 221 222 223 224 225 G0D7 G0D6 CSB SCK TxD R8D5 R8D4 R8D3 R8D2 R8D1 R8D0 G8D7 G8D6 G8D5 G8D4 G8D3 G8D2 G8D1 G8D0 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 R8D7 R8D6 SCK TxD RW=1,ALL=0,RST=0,ch3～ch0=0100 の場合 （RxDはHi-Z出力される） CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 CSB SCK TxD B4D5 B4D4 B4D3 B4D2 B4D1 B4D0 33 34 35 36 37 38 39 40 B4D7 B4D6 SCK TxD R4D5 R4D4 R4D3 R4D2 R4D1 R4D0 G4D7 G4D6 G4D5 G4D4 G4D3 G4D2 G4D1 G4D0 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 R4D7 R4D6 LED line (gradation data): R4、G4、B4 Data write order (MSB-first): R4D7, R4D6, …R4D1, R4D0, G4D7, G4D6, …G4D1, G4D0, B4D7, B4D6, …B4D1, B4D0 RW= “1”, ALL= “1”, RST= “0”, ch3~ch0= “arbitrary value” (RxD outputs Hi-Z) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “0100” (RxD outputs Hi-Z)
[AP4201] 015008157-E-00 - 17 - 2015/09 SCK TxD RW=0,ALL=1,RST=0,ch3～ch0=任意 の場合 CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK TxD 33 4842 43 44 45 46 4734 35 36 37 38 39 40 41 SCK TxD 217 232226 227 228 229 230 231218 219 220 221 222 223 224 225 CSB SCK TxD 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 RxD Hi-Z RxD R8D5 R8D4 R8D3 R8D2 R8D1 R8D0 G8D7 G8D6 G8D5 G8D4 G8D3 G8D2 G8D1 G8D0R8D7 R8D6 RxD B8D5 B8D4 B8D3 B8D2 B8D1 B8D0 R7D7 R7D6 R7D5 R7D4 R7D3 R7D2 R7D1 R7D0B8D7 B8D6 RxD G0D5 G0D4 G0D3 G0D2 G0D1 G0D0 B0D7 B0D6 B0D5 B0D4 B0D3 B0D2 B0D1 B0D0G0D7 G0D6 SCK TxD RW=0,ALL=0,RST=0,ch3～ch0=0010 の場合 CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK TxD CSB RxD Hi-Z RxD B2D1 B2D0B2D3 B2D2 SCK TxD 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 RxD R2D5 R2D4 R2D3 R2D2 R2D1 R2D0 G2D7 G2D6 G2D5 G2D4 G2D3 G2D2 G2D1 G2D0R2D7 R2D6 33 34 35 36 37 38 39 40 B2D4B2D6 B2D5B2D7 RW= “0”, ALL= “1”, RST= “0”, ch3~ch0= “random”
[AP4201] 015008157-E-00 - 18 - 2015/09 SCK TxD RW=1,ALL=1,RST=1,ch3～ch0=任意 の場合 （RxDはHi-Z出力される） CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK TxD RW=1,ALL=0,RST=0,ch3～ch0=1001 の場合 （RxDはHi-Z出力される） CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK TxD R6D5 R6D4 R6D3 R6D2 R6D1 R6D0 R5D7 R5D6 R5D5 R5D4 R5D3 R5D2 R5D1 R5D0 33 4842 43 44 45 46 4734 35 36 37 38 39 40 41 R6D7 R6D6 SCK TxD R1D5 R1D4 R1D3 R1D2 R1D1 R1D0 R0D7 R0D6 R0D5 R0D4 R0D3 R0D2 R0D1 R0D0 73 8882 83 84 85 86 8774 75 76 77 78 79 80 81 R1D7 R1D6 CSB SCK TxD R8D5 R8D4 R8D3 R8D2 R8D1 R8D0 R7D7 R7D6 R7D5 R7D4 R7D3 R7D2 R7D1 R7D0 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 R8D7 R8D6 SCK TxD RW=1,ALL=0,RST=0,ch3～ch0=0000～0111 の場合 （RxDはHi-Z出力される） CSB 0 0 1 0 A4 A3 A2 A1 A0 RW ALL RST ch3 ch2 ch1 ch0 1 162 3 4 5 6 7 8 9 10 11 12 13 14 15 CSB SCK TxD B*D5 B*D4 B*D3 B*D2 B*D1 B*D0 33 34 35 36 37 38 39 40 B*D7 B*D6 SCK TxD R*D5 R*D4 R*D3 R*D2 R*D1 R*D0 G*D7 G*D6 G*D5 G*D4 G*D3 G*D2 G*D1 G*D0 17 3226 27 28 29 30 3118 19 20 21 22 23 24 25 R*D7 R*D6 RW= “1”, ALL= “1”, RST= “1”, ch3~ch0= “random” (RxD output Hi-Z) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “1001” (RxD output Hi-Z) RW= “1”, ALL= “0”, RST= “0”, ch3~ch0= “0000~0111” (RxD output Hi-Z)
pin to the next IC’s SI pin. Table 9. Serial F/F Cascade Control Note 16. PWM_Rx, PWM_Gx, PWM_Bx (x=8~0) means shift each channel’s PWM gradation data. Figure 5. Serial F/F Cascade Control The SI input shift data can be taken by many chips with LAT rising.
ISET_G pin used to set LEDG0~8 current and the ISET_B pin used to set LEDB0 ~ 8 current. Table 10. Combination of ILED and RISET
Table 11. Input Voltage Range accepted. Please note, that a command accepted during the “t2” period may be interpreted incorrectly. Figure 6. POR Operation (Power on Reset) Table 12. POR Timing when Power Applied Bypass capacitor between the VDC pin and GND CVDC=1.0mF. from the time the VIN voltage reaches 4.5V.
Figure 7. POR Timing Chart Table 13. POR Timing when VIN Decreases voltage range, the communication function via input signal is not guaranteed. function. Reset types and reset states are shown below. Table 14. Types of Reset and status
when the fault condition is removed. Table 15. Protection Function (All values are guaranteed by design) LED pin voltage is “H”. This function is disabled in fixed current output mode. generation in order to prevent activation of the thermal protection. Note 25. VLED voltage and LED current settings according to the ambient temperature (Ta) are shown below. Table 16. VLED voltage and LED current settings (Condition: VIN=12V, IDC1=0mA)
55 ILEDTO=61 [mA]
70 ILEDTO=53 [mA]
2.3 ILEDTC=20 [mA]
2.1 ILEDTC=15 [mA]
3.0 ILEDTC= 8 [mA]
2.4 ILEDTC=10 [mA]
2.0 ILEDTC=12 [mA]
1.7 ILEDTC=14 [mA]
- Recommended External Circuits
Figure 8. Recommended External Circuits resistors for current setting can be removed. In this case, the ISET_R, G, B pins should also be open.
[AP4201] 015008157-E-00 - 25 - 2015/09 12. Package ■ Package ・48-pin LQFP(Unit:mm) ■ Marking Note 27. Week code: the first Thursday of the week of the assembly year is marked to as 01, the second week is marked as 02 … and the 52nd week is marked as 52. (Compliance with ISO-8601) Please contact to our sales office for more detailed marking specification. (example: marking size, marking print sample and etc.) XXXXXXX (1) 1pin Indication (2) Product No. (3) Date Code (7digits) 2 digits for the year, 2 digits for the weed code, 1 digit for the wafer factory code, 1 digit for lot number, 1 digit for the assembly factory (1) AP4201 (3) (2)
[AP4201] 015008157-E-00 - 26 - 2015/09 13. Revision History Date (Y/M/D) Revision Page Contents 15/09/15 00 - First Edition
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