AKD4356 AKM | Alldatasheet

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Technical content

interface and can achieve the interface with digital audio systems via opt-connector or RCA connector.

  • On-board 2nd order LPF
  • On-board clock generator
  • Compatible with 3 types of interface - Direct interface with AKM’s A/D converter evaluation boards and direct interface with AKM’s signal generator(AKD43XX) by 10pin header - On-board CS8414 as DIR which accepts optical input - Direct interface with AC3 decoder by 10pin header
  • BNC connector for an external clock input
  • 10pin header for serial control interface DVDD = 4.5 ∼ 5.25V GND CS8414 (DIR) Opt In A/D, D/A Data ROM Data Clock Generator AK4356 Rch AVDD = 4.5 ∼ 5.25V 10pin Header RCA In Lch Output LPF 10pin Header Control Data

Figure 1. AKD4356 Block Diagram

  • Circuit diagram and PCB layout are attached at the end of this manual.

The 2nd order LPF (fc=93.2kHz, Q=0.712) which adds differential outputs of AK4356 is implemented on the board. through BNC connectors on the board. And the output level of AK4356 is 5.5Vpp@5V. output is muted externally with this signal. Figure 2. On-board analog filter Table 1. The value of R,C on this board Table 2. Frequency Response of LPF

ASAHI KASEI [AKD4356] <KM060602> ’99/11 - 3 - n Operation sequence 1) Set up the power supply lines. [AVDD] (orange) = 4.5 ∼5.25V [DVDD] (orange) = 4.5 ∼5.25V [VD] (red) = 3.4 ∼5.0V [VP+] (green) = +12V ∼+15V [VP-] (blue) = -12V ∼-12V [AGND] (black) = 0V [DGND] (black) = 0V Each supply line should be distributed from the power supply unit. 2) Set-up the evaluation modes, jumper pins and DIP switches (See the followings.) 3) Power on. The AK4356 should be reset once bringing SW1(-PD) “L” upon power-up. n Evaluation mode Applicable evaluation modes 1) DIR (Optical Link and RCA) (default) 2) Using ROM data (AK43XX) 3) Using AKM’s evaluation board for ADC 4) Feeding all signals from external 1) DIR (Optical Link and RCA) <default> PORT4(TORX174) or J1(RCA) is used. All clock are supplied from CS8414(DIR). DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical connector (TORX174) or RCA connector. Used for the evaluation using CD test disk. Nothing should be connected to PORT2,3. In case of using optical connector (TORX174), select “OPT” on JP17(RCA/OPT). In case of using RCA connector, select “RCA”. JP15 XTI JP14 DIR JP4 LRCK DIRADC JP7 BICK JP16 XTE JP13 SDATA DIRADC DIR BNC XTL GNDVD 2) Ideal sine wave generated by ROM data Connect the AKD43XX with PORT3(AD/ROM). AKD4356 sends MCLK to AKD43XX, and receives LRCK, BICK and SDATA. In case of using external master clock through a BNC connector, select “BNC” on JP15(XTI) and short JP16(XTE). JP15 XTI JP14 DIR JP4 LRCK DIRADC JP7 BICK JP16 XTE JP13 SDATA DIRADC DIR BNC XTL GNDVD

“BNC” on JP15(XTI) and short JP16(XTE). Under the following set-up, all external signals can be fed through POTR3. it’s frequency is selected with JP9. Figure 3. BICK frequency

Upper side is “ON”(“H”), lower side is “OFF”(”L”). SW3: No.1 to 5 set the mode of AK4356 and No.6 to 8 set the mode of CS8412.

1 CAD1

2 CAD0

3 DIF0

4 DIF1

5 DIF2

Table 3. SW3 set-up (Note: M2-0 should be selected at only evaluation mode 1.

3 I 2 S 110010 T H R default

Table 4. Digital interface format set-up (1=ON, 0=OFF) SW4: Set the mode of AK4356.

1 DFS0 Normal speed Double speed

2 DZFE Zero detect disable Zero detect enable

3 CKS2

4 CKS1

5 CKS0

(See the datasheet of AK4356. Table 5. SW4 set-up [JP5, 8]: Set the dividing rate corresponding to CKS2-0. This set up is needed only for the evaluation mode 3. Table 6. JP5 and 8 set up

ASAHI KASEI [AKD4356] <KM060602> ’99/11 - 7 - MEASUREMENT RESULTS [Measurement condition]

  • Measurement unit : ROHDE & SCHWARZ, UPD04
  • MCLK : 256fs
  • BICK : 64fs
  • fs : 44.1kHz, 96kHz, 1 92kHz
  • BW : 20Hz ∼20kHz (fs=44.1kHz), 20Hz∼40kHz (fs=96kHz), 20Hz∼80kHz (fs=192kHz)
  • Bit : 24bit
  • Power Supply : AVDD=DVDD=5V
  • Interface : DIR (fs=44.1kHz), Serial Multiplex (fs=96kHz, 192kHz)
  • Temperature : Room Parameter Input signal Measurement filter fs=44.1kHz S/(N+D) 1kHz, 0dB 20kLPF 97.5dB 20kLPF 110.0dBDR 1kHz, -60dB 20kLPF, A-weighted 113.2dB 20kLPF 110.1dBS/N no signal 20kLPF, A-weighted 113.5dB Parameter Input signal Measurement filter fs=96kHz S/(N+D) 1kHz, 0dB 40kLPF 94.4dB 40kLPF 106.2dBDR 1kHz, -60dB 20kLPF, A-weighted 112.3dB 40kLPF 106.4dBS/N no signal 20kLPF, A-weighted 112.8dB Parameter Input signal Measurement filter fs=192kHz S/(N+D) 1kHz, 0dB 80kLPF 90.0dB 80kLPF 92.6dBDR 1kHz, -60dB 20kLPF, A-weighted 112.8dB 80kLPF 93.3dBS/N no signal 20kLPF, A-weighted 112.8dB [Measurement condition]
  • Measurement unit : Audio Precision, System two, Cascade
  • MCLK : 256fs
  • BICK : 64fs
  • fs : 44.1kHz
  • BW : 20Hz ∼20kHz
  • Bit : 24bit
  • Power Supply : AVDD=DVDD=5V
  • Interface : DIR
  • Temperature : Room Parameter Input signal Measurement filter Results S/(N+D) 1kHz, 0dB 20kLPF 98.8dB DR 1kHz, -60dB 22kLPF, A-weighted 112.2dB S/N no signal 22kLPF, A-weighted 112.6dB

Figure 14. FFT (outband noise: fs=44.1kHz; no signal input)

ASAHI KASEI [AKD4356 Control Program] ‘99/3 - 1 - AKD4356 Control Program ver 1.0 operation manual 1. Connect IBM-A T compatible PC with AKD4356 by 10-line type flat cable (packed with AKD4356). Take care of the direction of 10pin Header (Refer to manual of AKD4356). 2. Start up “WINDOWS 95” or “WINDOWS 98”. 3. Insert the floppy-disk labeled “AKD4356 Control Program ver 1.0” into the floppy-disk drive. 4. Set up “MS-DOS” from start menu. 5. Change directory to the floppy-disk drive(ex.a:) at MS-DOS prompt. 6. Type “ak4356”. 7. Then follow the displayed comment (See the following). Input Chip Address (2bit) Write data/ Display register map/ Reset etc.à loop

ASAHI KASEI [AKD4356 Control Program] ‘99/3 - 2 - At first the following message is displayed: copyright(c) 1999, Asahi Kasei Microsystems co.,ltd. All rights reserved. Input Chip Address(CAD1,CAD0) (2 figure, binary) = Input chip address in 2 figures of binary. Set CAD1 and CAD0 before the AKD4356 is powered up. When hanging CAD1 and CAD0, set SW1(-PD) “L”, then “H” after that. After chip address is defined, the following default register map is displayed (Loop starts from here): ADDR = 00 : 01 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN ) ADDR = 01 : 01 <Control 2> ( 0 0 0 CKS2 CKS1 CKS0 SMUTE RSTN ) ADDR = 02 : 0F <Speed & PD> ( 0 0 DFS1 DFS0 PW3 PW2 PW1 RSTN ) ADDR = 03 : 15 <DEM control>( 0 0 DEMC1 DEMC0 DEMB1 DEMB0 DEMA1 DEMA0) ADDR = 04 : FF <LOUT1 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 05 : FF <ROUT1 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 06 : FF <LOUT2 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 07 : FF <ROUT2 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 08 : FF <LOUT3 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 09 : FF <ROUT3 ATT> ( ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 ) ADDR = 0A : 00 <Test> ( TEST7 TEST6 TEST5 TEST4 TEST3 TEST2 TEST1 TEST0) Input 1(Write), R(Reset), T(Table), I(Increment), D(Decrement) or S(Stop) : 1) If you input “1”, you can write data to AK4356. You can write data to AK4356 Input Register Address (2 figure, hex) (00-0A) = Input register address in 2 figures of hexadecimal. Then current data of this address is displayed: ADDR = 00 : 01 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN ) 0 0 0 0 0 0 0 1 Input Register Data (2 figure, hex) (00-FF) = You can write control data to this address. Input control data in 2 figures of hexadecimal. Refer to datasheet of AK4356. Then the data written to this address is displayed: ADDR = 00 : 07 <Control 1> ( 0 SLOW DZFM DZFE DIF2 DIF1 DIF0 RSTN ) 0 0 0 0 0 1 1 1

ASAHI KASEI [AKD4356 Control Program] ‘99/3 - 3 - 2) If you input “R” or “r”, this program writes default data to all register addresses. 3) If you input “T” or “t”, current register map is displayed. 4) If you input “I” or “i”, this program increment data of current address by 1 (only for addr=04H to 09H). You can increment ATT value by 1step. 5) If you input “D” or “d”, this program decrement data of current address by 1 (only for addr=04H to 09H). You can decrement ATT value by 1step. 6) If you input “S” or “s”, this program is terminated.

-CS LH LH Analog GroundDigital Ground AK4356 B AKD4356 1 3Tuesday, August 10, 1999 Title Size Document Number Rev Date: Sheet of LOUT1+ LOUT1- ROUT1+ ROUT1- LOUT2+ LOUT2- ROUT2+ ROUT2- LOUT3+ LOUT3- ROUT3+ ROUT3- DZFL2 DZFR1 DZFL1 DZFR2 DZFL3 DZFR3 SDTI1 SDTI2 LRCK SDTI3 BICK MCLK AVDD1 AVDD1 REG DVDD1 CKS1 CKS2 DIF1 DIF0 DIF2 DZFE CKS0 DFS0 DVDD1 CAD0 CAD1 AVDD2 AVDD1 VD VD VD DVDD AVDD 0.1u 10u 2.2k PORT1 CR-I/F 5 6 2.2k 2.2k 10k SW2 SMUTE +C4 0.1u +C2 10u D1 R1 10k SW1 -PD 0.1u +C7 47u JP2 DVDD 74AC541 U1A 74HC14 1 2 U1B 74HC14 3 4 U1C 74HC14 5 6 JP1 GND AK4356 LOUT1- LOUT1+ DZFL2 DZFR1 DZFL1 CAD0 CAD1 PD BICK MCLK DVDD DVSS SDTI1 SDTI2 SDTI3 LRCK SMUTE CCLK CDTI CS DFS0 CKS0 CKS1 CKS2 DIF0 DIF1 DIF2 DZFE DZFR3 DZFL3 DZFR2 VREFH AVDD AVSS ROUT3- ROUT3+ LOUT3- LOUT3+ ROUT2- ROUT2+ LOUT2- LOUT2+ ROUT1- ROUT1+ + C9 47u JP3 REG L1 (short) + C8 47u 10u 74AC541 NJM78M 05FA

3 OUTGND

for 74HCU04, 74HC14, 74AC74, 74AC541x2,74HC4040 DIF0 DIF1 DIF2 CAD0 CAD1 CKS0 CKS1 CKS2 DZFE DFS0 ADC DIR DIR ADC DATA DATA DATA GND GND GND MCLK BICK LRCK SDTI1 SDTI2 SDTI3 Interface B AKD4356 23Tuesday, August 10, 1999 Title Size Document Number Rev Date: Sheet of SDTI3 SDTI2 SDTI1 X_BICK DIR_BICK DIR_LRCK LRCK BICK DIR_BICK DIR_LRCK X_LRCK X_BICK MCLK DIF0 DIF1 CAD0 CAD1 CKS0 CKS1 CKS2 DZFE DFS0 DIF2 X_LRCK VD VD VD VD VD VD VD PORT4 TORX174

5 OUT

5 C19

0.1u +C17 10u C26 0.01u C23 0.01u JP17 RCA/OPT PREM VERF 10u 1 2 U5B 74HCU04 R12 PORT3 ROM 5 6 JP11 SDTI2 JP13 SDATA U5A 74HCU04 1 2 JP6 BICK2 C25 0.1u R15 C24 47n R14 +C18 10u C20 0.1u C22 (open) R13 BNC U5D 74HCU04 U5E 74HCU04

1110 JP16

(open) JP15 XTI JP9 X_BICK JP5 FS2 +C10 47u C11 0.1u C12 0.1u C13 0.1u C14 0.1u C15 0.1u SW4 MODE2 RP2 47k JP10 SDTI1 JP12 SDTI3 RCA 11.2896MHz RP1 47k SW3 MODE1 CS8414 14 15 28C Cd/F1 Cc/F0 Cb/E2 Ca/E1 C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U CBL SEL MCK FILT AGND VA+ ERF SDATA Ce/F2 VREF U7A 74AC74 4 1 D CLK Q Q PR CL R11 R16 74HC4040 CLK RST Q10 Q11 Q12 JP8 FS1 2 3 C16 0.1u R17 U5C 74HCU04 PORT2 AC3 5 6 JP4 LRCK JP7 BICK

(10k,10k) (10k,10k) (10k,10k) (10k,10k) (10k,10k) (10k,10k) Analog out B AKD4356 33Tuesday, August 10, 1999 Title Size Document Number Rev Date: Sheet of LOUT1+ LOUT1- DZFL1 ROUT1- DZFR1 ROUT2+ ROUT2- DZFR2 LOUT2+ LOUT2- LOUT3+ DZFL3 ROUT3+ DZFR3 DZFL2 LOUT3- ROUT3- ROUT1+ AVDD2 AVDD2 AVDD2AVDD2 AVDD2 AVDD2 12V_P 12V_N 12V_P 12V_N 12V_N 12V_P 12V_N 12V_P 12V_N 12V_P 12V_N 12V_P 12V_N 12V_P REG +12V -12V U9A NJM5532D R29 200 R34 4.7k R28 4.7k R21 4.7k R32 10kC37 470p R24 200 R20 4.7k C31 3300p C33 22u C35 (open) LOUT1 R18 10k JP18 DZFL1 2 3 C27 (open) U9B NJM5532D R31 200 R35 4.7k R30 4.7k R23 4.7k R33 10kC38 470p C30 470p R25 200 R22 4.7k C32 3300p C34 22u C36 (open) ROUT1 R19 10k JP19 DZFR1 2 3 C28 (open) U10B NJM5532D R49 200 R41 4.7k R51 10kC57 470p C49 470p R43 200 R40 4.7k C53 22u C55 (open) ROUT2 R37 10k JP21 DZFR2 2 3 C47 (open) C52 22u R52 4.7k C46 (open) R42 200 U10A NJM5532D R39 4.7k R47 200 LOUT2 C54 (open) C50 3300p R38 4.7k C48 470p C56 470p R36 10k R50 10k R46 4.7k JP20 DZFL2 2 3 C73 (open) C71 22u U11A NJM5532D R70 4.7k R65

200 R68

4.7k R56 4.7k JP22 DZFL3 2 3 C65 (open) R60 200 R64 4.7k C75 470p R54 10k C69 3300p C67 470p C74 (open) C72 22u U11B NJM5532D R71 4.7k R67

200 R69

4.7k R58 4.7k JP23 DZFR3 2 3 C66 (open) R61 200 R66 4.7k C76 470p R55 10k C70 3300p C68 470p C45 0.1u C43 0.1u C44 0.1u +C41 10u +C42 10u +C40 10u C64 0.1u C62 0.1u 10u 1 2 TR13 RN1202 TR14 RN1202 TR2 RN1202 TR8 RN1202 TR7 RN1202 TR1 RN1202

2 TR3

+C63 10u C60 0.1u R26 220 R44 220 R62 220 R63 220 R45 220 R27 220 C29 470p C78 (short) C79 (short) C82 (short) C83 (short) C86 (short) C87 (short) C80 (short) C81 (short) C84 (short) C51 3300p R53 4.7k R48 4.7k C88 (short) C89 (short) +C39 47u 10u 1 2 C77 0.1u C85 (short) TR5 2SC3327 TR6 2SC3327 TR11 2SC3327 TR12 2SC3327 TR17 2SC3327 TR18 2SC3327

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