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[AP1010AEN] 017006174-E-01 2017/11 - 1 - 1. General Description The AP1010 is a 2ch H-Bridge motor driver compatible with motor operating voltage 18V and can drive two DC motors or one stepping motor. The protection circuit has under voltage lockout circuit, thermal shutdown circuit, and overcurrent protection circuit, and overcurrent protection circuit can be disabled with the DIS OCP terminal. The package adopts a small 16-pin QFN package and contributes to downsize Printed Circuit Board. 2. Features Motor Operating Voltage Range 6.0V～18V (Control power supply is unnecessary) Maximum Output Current (DC) 0.7A @Ta=25°C H-Bridge On-Resistance RON(TOP+BOT) = 1.1Ω @Ta=25°C Parallel Connection Possible Under Voltage Lockout Circuit Thermal Shutdown Circuit Overcurrent Protection Circuit Overcurrent protection circuit is disabled when DIS OCP terminal = “H” Operating Temperature Range -30°C～85°C Package 16-pin QFN (3mm×3mm) 18V 2ch H -Bridge Motor Driver IC AP1010
[AP1010AEN] 017006174-E-01 2017/11 - 2 - 3. Table of Conten ts
Figure 1. Block Diagram
[AP1010AEN] 017006174-E-01 2017/11 - 4 - 5. Pin Configurations and Functions
5.1 Pin Configurations
5.2 Functions
Number Pin Name I/O Functions Notes
1 IN1 I Control Signal Input Built-in 200kΩ Pull-down
2 IN2 I Control Signal Input Built-in 200kΩ Pull-down
3 IN3 I Control Signal Input Built-in 200kΩ Pull-down
4 IN4 I Control Signal Input Built-in 200kΩ Pull-down
5 EN I Enable Signal Input Built-in 200kΩ Pull-down
6 VDC O Coupling terminal for internal power supply
Connect a 1.0 μF capacitor between VDC pin and GND.
7 DIS OCP I Over current protection function terminal Built-in 200kΩ Pull-down
8 GND P Ground
9 OUT2B O Motor Driver Output
10 OUT2A O Motor Driver Output
11 OUT1B O Motor Driver Output
12 OUT1A O Motor Driver Output
13 VM P Motor Power Supply
14 VG I/O Connect Terminal for Stabilizing Capacitor.
15 CH I/O Connect Terminal for Charge Pump
Capacitor.
16 CL I/O Connect Terminal for Charge Pump
Capacitor. EP EP P Ex-posed Pad (Note 2) Note 1. I(Input pin)、O(Output pin)、 P(Power pin)、I/O(Input/Output pin) Note 2. Exposed PAD must be connected to GND. 13 VM VG CH CL IN1 IN2 IN3 IN4 OUT1A OUT1B OUT2A OUT2B GND DIS OCP VDC EN (Top View) 9 10 11 12 1 2 3 4 Exposed PAD
0.5 A/ch
Note 3. All voltages are for GND = 0V. Note 5. A 2-layer board is used. RθJA = 60°C/W. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Figure 2. Maximum Power Dissipation
[AP1010AEN] 017006174-E-01 2017/11 - 6 - 7. Recommended Operating Conditions (Ta=25°C, unless otherwise specified.) Parameter Symbol min typ max Unit Motor Operating Voltage VM 6.0 12 18 V Logic Terminal Voltage VIO 0 5.5 V Input Frequency Range Fin - - 200 kHz Operating Temperature Range Ta -30 - 85 °C 8. Electrical Charateristics (Ta=25°C, VM=12V, unless otherwise specified. ) Parameter Symbol Condition min typ max Unit Quiescent Current VM Quiescent Current at the time of Power Save IVMOFF IN=All “L”, EN=”L” - - 10 µA VM Quiescent Current at the time of Operating IVM IN1=IN3=”H”/”L” 200kHz, IN2=IN4=”L”/”H” 200kHz, EN=”H”, Open between OUTA and OUTB - 1.8 3.0 mA Charge Pump Charge Pump Voltage VG VG=VM+VDC, Iload=0A - - 17 V Charge Pump Rise Time tVGON EN=”L”→”H”, CVG=0.1uF - 0.6 3.0 ms H-Bridge Driver on resistance (H-Bridge High+Low) RON Iload (1ch/2ch) = 0.1A/0.1A - 1.1 1.7 Ω H-Bridge Driver Body diode forward voltage VF IF = 100mA - 0.8 1.2 V Delay Time Output Delay Time (“L”→”H”) tPDLH Connected to 1kΩ between OUTA and OUTB. (Figure 3) - - 1.0 μs Output Delay Time (“H”→”L”) tPDHL - - 1.0 μs Output Pulse Width tPW Connected to 1kΩ between OUTA and OUTB. Input Pulse Width：1μs (Figure 3) 0.5 1.0 1.5 μs Control Logic VDC Terminal Voltage VDC 4.2 4.65 5.0 V Input High Level Voltage VIH 2.0 - - V Input Low Level Voltage (EN) VIL1 - - 0.4 V Input Low Level Voltage (IN1, IN2, IN3, IN4, DIS OCP) VIL2 - - 0.6 V Input Pulse Rise Time tR - - 1.0 µs Input Pulse Fall Time tF - - 1.0 µs Pull-down resistance RPD 100 200 300 kΩ Input Low Level Current IIL -1.0 - 1.0 µA Protection Circuit Under Voltage Detect Voltage VMUV 3.85 4.3 4.65 V Thermal Shutdown Temperature (Note 7) TTSD 135 155 175 °C Temperature Hysteresis (Note 7) TTSDHYS - 30 - °C Overcurrent protection IOCP DIS OCP=”L” 1.3 2.6 3.9 A Note 6. All above voltage is defined to GND=0V. Note 7. Not tested under mass-production.
Figure 3. Timing Chart（Delay Time, Pulse Width）
9.1 Operation Outline
Table 1. The relationship between input and output in each mode is as follows. Note 8. Charge Pump Block and TSD, UVLO, OCP don’t operate at the Power Save. Note 9. After inputting "H" to the EN pin, input "H or L" to IN 1 - 4 pin.
9.2 Motor Driver Block Configuration
generated by the charge pump. Lo-side FET is driven by VDC. Figure 4. Driver Block Equivalent circuit
9.3 Protection Circuits
9.3.1 Under Voltage Lockout (UVLO)
If VM voltage is lower than 4.3V at the starting, the H-Bridge output is the Hi-Z.
9.3.2 Thermal Shutdown(TSD)
Figure 5. Detection of abnormal heating
9.3.3 Over current protection (OCP)
driver outputs are set to Hi - Z, and automatically return after 200 ms. the overcurrent protection circuit, connect the DIS OCP terminal to the VDC terminal. Figure 6. Protection Function Timing Chart
- Recommended External Circuits
Figure 7. Recommended External Circuits Table 2. Parts List the load capacitance, the line resistance and etc. of the actual system board. Note 11. Please layout the large ground plane on the PCB. Note 12. Please connect the exposed pad (heat sink) to the ground of the PCB.
[AP1010AEN] 017006174-E-01 2017/11 - 11 - YWW A (1) 1pin Indication (2) Market No. (3) Year code（last 1 digit） (4) Week code (5) Management code (1) 1010 (3) (2) (4) (5) 11. Package
11.1 Outline Dimensions
・16-pin QFN (Unit : mm)
11.2 Recommended Land Pattern
・16-pin QFN (Unit : mm) 0.2 1.8 2.2 3.6 0.22±0.05 1.8 2.2 3.6 φ0.3 Thermal Via The optimum dimensions of the mount pad will vary depending on the substrate material, solder paste method, device accuracy, etc. In actual design, please optimize according to the situation.
11.3 Marking
[AP1010AEN] 017006174-E-01 2017/11 - 12 - 12. Ordering Guide AP1010AEN -30°C～85°C 16-pin QFN 13. Revise History Date (YY/MM/DD) Revision Page Contents 17/07/11 00 - First Edition 17/11/01 01 5 Correction of mistake in Note 5. A 4-layer board is used.→A 2-layer board is used.
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