AK4702 AKM | Alldatasheet
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ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 1 - GENERAL DESCRIPTION The AK4702 offers the ideal features for digital set-top-box systems. Using AKM's multi-bit architecture for its modulator, the AK4702 delivers a wide dynamic range while preserving linearity for improved THD+N performance. The AK4702 integrates a combination of SCF and CTF filters, removing the need for high cost external filters and increasing performance for systems with excessive clock jitter. The AK4702 also including the audio switches and volumes designed primarily for digital set-top-box systems. The AK4702 is offered in a space saving 48-pin LQFP package.
FEATURES
o Sampling Rates Ranging from 8kHz to 50kHz o 18bit 8x FIR Digital Filter o 2nd order Analog LPF o On chip Buffer with Single-ended Output o Digital de-emphasis for 32k, 44.1k and 48kHz sampling o I/F format: 18bit MSB justified, 18/16bit LSB justified, I2S o Master clock: 256fs, 384fs o High Tolerance to Clock Jitter Analog switches for SCART Audio section o THD+N: -86dB (@2Vrms) o Dynamic Range: 96dB (@2Vrms) o Stereo Analog Volume with Zero-cross Detection Circuit (+6dB to –60dB & Mute) o Five Analog Inputs Two Stereo Input (TV, VCR SCART) One Mono Input for Tone o Five Analog Outputs Two Stereo Outputs (TV, VCR SCART) One Mono Output o Loop-through mode for standby o Pop Noise Free Circuit for Power on/off Video section o 75ohm driver o 6dB Gain for Outputs o Adjustable gain o Four CVBS/Y inputs (ENCx2, TV, VCR), Three CVBS/Y output (RF, TV, VCR) o Three R/C inputs (ENCx2, VCR), Two R/C output (TV, VCR) o Bi-directional control for VCR-Chroma/Red o Two G and B inputs (ENC, VCR), One G and B outputs (TV) Power supply o 5V+/-5% and 12V+/-5% o Low Power Dissipation Package o Small 48pin LQFP 2ch DAC with AV SCART switch AK4702
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 2 - TVOUTL MONOOUT TVOUTR VCROUTL VCROUTR MONOIN +6 to -60dB (2dB/step) -6dB/0dB/2.44dB TVINL TVINR VCRINL VCRINR DAC MCLK BICK LRCK SDATA Bias (Mute) Volume #0 Volume #1 SCK SDA Register Control PDN VCOM5 VCOM12 VD VP VSS VCR1/0 TV1/0 VOL MONO Audio Block
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 3 - ENC C TVRC ENC G/CVBS VCR G TVG ENC B VCR B TVB ENC Y TVVOUT RFV 6dB 6dB 6dB 6dB 0, 1, 2, 3dB ENC R/C VCRVOUT VCRC 6dB 6dB VCR CVBS/Y TV CVBS VCR R/C ENC CVBS/Y ENCC ENCG VCRG ENCB VCRB ENCY ENCRC VCRVIN TVVIN VCRRC ENCV ( Typical connection ) RF Mod TV SCART VCR SCART ( Typical connection ) VVD2 VVSS VVD1 6dB Video Block Monitor VCR FB TVFB 6dB TVSB VCRSB 0/ 6/ 12V 0/ 6/ 12V VCRFB ( Typical connection ) TV SCART VCR SCART ( Typical connection ) INT Video Blanking Block
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 4 - n Ordering Guide AK4702 -10 ∼ +70°C 48pin LQFP (0.5mm pitch) n Pin Layout VCRC TVFB VVD1
2 VVSS
3 TVVOUT
4 VVD2
5 TVRC
9 ENCB
10 ENCG
36 PVCOM
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 5 - PIN/FUNCTION No. Pin Name I/O Function
1 VCRC O Chrominance Output Pin for VCR
2 VVSS - Video Ground Pin. 0V.
3 TVVOUT O Composite/Luminance Output Pin for TV
4 VVD2 - Video Power Supply Pin #2. 5V Normally connected to VVSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap.
5 TVRC O Red/Chrominance Output Pin for TV
6 TVG O Green Output Pin for TV
7 TVB O Blue Output Pin for TV
8 VVD1 - Video Power Supply Pin #1. 5V Normally connected to VVSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap.
9 ENCB I Blue Input Pin for Encoder
10 ENCG I Green Input Pin for Encoder
11 ENCRC I Red/Chrominance Input Pin1 for Encoder
12 ENCC I Chrominance Input Pin2 for Encoder
13 ENCV I Composite/Luminance Input Pin1 for Encoder
14 ENCY I Composite/Luminance Input Pin2 for Encoder
15 TVVIN I Composite/Luminance Input Pin for TV
16 VCRVIN I Composite/Luminance Input Pin for VCR
17 VCRFB I Fast Blanking Input Pin for VCR
18 VCRRC I Red/Chrominance Input Pin for VCR
19 VCRG I Green Input Pin for VCR
20 VCRB I Blue Input Pin for VCR
21 INT O Interrupt Pin for Video Blanking
22 VCRSB I/O Slow Blanking Input/Output Pin for VCR
23 TVSB O Slow Blanking Output Pin for TV
24 VCRINR I Rch VCR Audio Input Pin
25 VCRINL I Lch VCR Audio Input Pin
26 TVINR I Rch TV Audio Input Pin
27 TVINL I Lch TV Audio Input Pin
28 MONOIN I MONO Input Pin
29 VCROUTR O Rch Analog Output Pin1
30 VCROUTL O Lch Analog Output Pin1
31 TVOUTR O Rch Analog Output Pin2
32 TVOUTL O Lch Analog Output Pin2
33 MONOOUT O MONO Analog Output Pin
34 VP - Power Supply Pin. 12V Normally connected to VSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap.
35 DVCOM O DAC Common Voltage Pin
Normally connected to VSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap.
36 PVCOM O Audio Common Voltage Pin
Normally connected to VSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap. The caps affect the settling time of audio bias level.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 6 - PIN/FUNCTION (Continued) 37 VSS - Ground Pin. 0V. 38 VD - DAC Power Supply Pin. 5V Normally connected to VSS with a 0.1µF ceramic capacitor in parallel with a 10µF electrolytic cap.
39 MCLK I Master Clock Input Pin
An external TTL clock should be input on this pin.
40 BICK I Audio Serial Data Clock Pin
41 SDTI I Audio Serial Data Input Pin
42 LRCK I L/R Clock Pin
43 SCL I Control Data Clock Pin
44 SDA I/O Control Data Pin
45 PDN I Power-Down Mode Pin
When at “L”, the AK4702 is in the power-down mode and is held in reset. The AK4702 should always be reset upon power-up.
46 RFV O Composite Output Pin for RF modulator
47 VCRVOUT O Composite/Luminance Output Pin for VCR
48 TVFB O Fast Blanking Output Pin for TV
Note: All input pins except pull-up/down pin should not be left floating.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 7 - Internal Equivalent Circuits Pin No. Pin Name Type Equivalent Circuit Description MCLK BICK SDTI LRCK SCL PDN Digital IN VD 200 VSS
44 SDA Digital I/O
not exceed VD.
21 INT Digital OUT
VD(5V) through 10kohm resister externally. RFV VCROUT TVFB VCRC TVVOUT TVRC TVG TVB Video OUT VVD1 VVSS VVD2 VVSS
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 8 - Pin No. Pin Name Type Equivalent Circuit Description ENCB ENCG ENCRC ENCC ENCV ENCY TVVIN VCRVIN VCRFB VCRRC VCRG VCRB Video IN VVD1 200 VVSS VCRSB TVSB Video SB VP VSS VP VSS VSS 200 (120k) The 120kohm is not attached for TVSB. VCRINR VCRINL TVINR TVINL MONOIN Audio IN VP 200 VSS VCROUTR VCROUTL TVOUTR TVOUTL MONOOUT Audio OUT VP VSS VP VSS 100 DVCOM PVCOM VCOM OUT VD VSS VD VSS 100 VD VSS
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 9 - ABSOLUTE MAXIMUM RATINGS (VSS=VVSS=0V;Note: 1) Parameter Symbol min max Units Power Supply VD VVD1 VVD2 VP |VSS-VVSS| (Note: 2) -0.3 -0.3 -0.3 -0.3 6.0 6.0 6.0 0.3 V V V V V Input Current (any pins except for supplies) IIN - ±10 mA Input Voltage VIND -0.3 VD+0.3 V Video Input Voltage VINV -0.3 VVD1+0.3 V Audio Input Voltage VINA -0.3 VP+0.3 V Ambient Operating Temperature Ta -10 70 °C Storage Temperature Tstg -65 150 °C Note: 1. All voltages with respect to ground. Note: 2. VSS and VVSS must be connected to the same analog ground plane. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. RECOMMENDED OPERATING CONDITIONS (VSS=VVSS=0V; Note: 1) Parameter Symbol min typ max Units Power Supply VD VVD1 VVD2 VP 4.75 4.75 VVD1 11.4 5.0 5.0 5.0 5.25 VVD2 5.25 12.6 V V V V Note: 3. Analog output voltage scales with the voltage of VD. AOUT (typ@0dB) = 2Vrms × VD/5. *AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
ELECTRICAL CHARACTERISTICS
(Ta = 25°C; VP=12V, VD = 5V; VVD1=VVD2 = 5V; fs = 48kHz; BICK = 64fs) Power Supplies Power Supply Current Normal Operation (PDN = “H”; Note: 4) VD VVD1+VVD2 VP Power-Down Mode (PDN = “L”; Note: 5) VD VVD1+VVD2 VP 100 100 100 mA mA mA µA µA µA Note: 4. STBY bit ="L", All video outputs active. No signal, no load for A/V switches. fs=48kHz “0”data input for DAC. Note: 5. All digital inputs including clock pins (MCLK, BICK and LRCK) are held at VD or VSS.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 10 - DIGITAL CHARACTERISTICS Parameter Symbol min typ max Units High-Level Input Voltage Low-Level Input Voltage VIH VIL 2.0 0.8 V V Low-Level Output Voltage (SDA pin : Iout= 3mA, INT pin : Iout= 1mA) VOL - - 0.4 V Input Leakage Current Iin - - ± 10 µA ANALOG CHARACTERISTICS (AUDIO) (Ta = 25°C; VP=12V, VD = 5V; VVD1=VVD2 = 5V; fs = 48kHz; BICK = 64fs; Signal Frequency = 1kHz; 18bit Input Data; Measurement frequency = 20Hz ∼ 20kHz; RL ≥4.5kΩ ; Volume#0=Volume#1=0dB, 0dB=2Vrms output; unless otherwise specified) Parameter min typ max Units DAC Resolution 18 bit Stereo Input: (TVINL/TVINR/VCRINL/VCRINR pins) Analog Input Characteristics Input Voltage 2 Vrms Input Resistance 100 150 - kΩ Mono Input: (MONOIN pin) Analog Input Characteristics Input Voltage 1 Vrms Input Resistance 40 60 - kΩ Stereo/Mono Output: (TVOUTL/TVOUTR/VCROUTL/VCROUTR/MONOOUT pins; Note: 6) Analog Output Characteristics Volume#0 Step Width (0dB to –6dB) 6 dB Volume#1 Step Width (+6dB to –12dB) (-12dB to –40dB) (-40dB to –60dB) 1.6 0.5 0.1 2.4 3.5 3.9 dB dB dB THD+N (at 2Vrms output. Note: 7) (at 3Vrms output.: Note: 7, Note: 8) -86 -60 -80 dB dB Dynamic Range (-60dB Output, A-weighted. Note: 7) 92 96 dB S/N (A-weighted. Note: 7) 92 96 dB Interchannel Isolation (Note: 7, Note: 9) 80 90 dB Interchannel Gain Mismatch (Note: 7, Note: 9) - 0.3 - dB Gain Drift - 200 - ppm/°C Load Resistance (AC-Lord; Note: 10) TVOUTL/R, VCROUTL/R, MONOOUT 4.5 kΩ Output Voltage (Note: 10, Note: 11) 1.85 2 2.15 Vrms Power Supply Rejection (PSR. Note: 12) - 50 dB Note: 6. Measured by Audio Precision System Two Cascade. Note: 7. DAC to TVOUT Note: 8. Except VCROUTL/VCROUTL pins. Note: 9. Between TVOUTL and TVOUTR with digital inputs 1kHz/0dBFS. Note: 10. THD+N : -80dB(min. at 2Vrns), -60dB(typ. at 3Vrms). Note: 11. Full-scale output voltage by DAC (0dBFS). Output voltage of DAC scales with the voltage of VD, Stereo output (typ@0dBFS) = 2Vrms × VD/5 when volume#0=volume#1=0dB. Do not output signals over 3Vrms. Note: 12. The PSR is applied to VD with 1kHz, 100mV.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 11 - FILTER CHARACTERISTICS (AUDIO) Parameter Symbol min typ max Units Digital filter Passband ±0.05dB (Note: 13) -6.0dB PB 0 24.0 21.77 kHz kHz Stopband ( Note: 13) SB 26.23 kHz Passband Ripple PR ± 0.06 dB Stopband Attenuation SA 54 dB Group Delay (Note: 14) GD - 19.1 - 1/fs Digital Filter + LPF Frequency Response 0 ∼ 20.0kHz FR - ± 0.5 - dB Note: 13. The passband and stopband frequencies scale with fs (system sampling rate). Note: 14. The calculating delay time which occurred by digital filtering. This time is from setting the 16/18bit data of both channels to input register to the output of analog signal. ANALOG CHARACTERISTICS (VIDEO) (Ta = 25°C; VP=12V, VD = 5V; VVD1=VVD2 = 5V; VVOL1/0= “00” unless specified.) Parameter Conditions min typ max Units Sync tip clamp voltage at output 0.7 V Chrominance bias voltage at output 2.2 V Gain Input=0.3Vp-p, 100kHz 5.5 6 6.5 dB VVOL1/0= “00” 5.5 6 6.5 dB VVOL1/0= “01” 6.7 7.2 7.7 dB VVOL1/0= “10” 7.7 8.2 8.7 dB RGB Gain Input=0.3Vp-p, 100kHz VVOL1/0= “11” 8.6 9.1 9.6 dB Interchannel Gain Mismatch Input=0.3Vp-p, 100kHz (Note: 15) -0.3 - 0.3 dB Frequency response Input=0.3Vp-p, Response at 6MHz -1 -0.5 dB Input impedance Chrominance input (internally biased) 40 60 - kohm Input Signal f=100kHz, maximum with distortion < 1.0% , gain=6dB. - - 1.5 Vpp Load Resistance Except RFV pin (Note: 16) RFV pin (Note: 17) 150 20k ohm ohm Load Capacitance C1 (Note: 16) C2 (Note: 16, Note: 17) 400 pF pF Dynamic Output Signal f=100kHz, maximum with distortion < 1.0% - - 3 Vpp Y/C Cross talk f=4.43MHz, 1Vp -p input . Among TVVOUT, TVRC, VCRVOUT and VCRC outputs. - -50 - dB S/N Reference Level = 0.7Vp-p, CCIR 567 weighting. BW= 15kHz to 5MHz. - 74 - dB Differential Gain 0.7Vpp 5steps modulated staircase. chrominance &burst are 280mVpp, 4.43MHz. -3 - 3 % Differential Phase 0.7Vpp 5steps modulated staircase. chrominance &burst are 280mVpp, 4.43MHz. -3 - 3 Degree
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 13 - Note: 18. BICK rising edge must not occur at the same time as LRCK edge. Note: 19. Data must be held for sufficient time to bridge the 300 ns transition time of SCL. Note: 20. The AK4702 should be reset by PDN= “L” upon power up. Note: 21. I2C is a registered trademark of Philips Semiconductors. Purchase of Asahi Kasei Microsystems Co., Ltd I2C components conveys a license under the Philips I2C patent to use the components in the I2C system, provided the system conform to the I2C specifications defined by Philips.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 14 - n Timing Diagram 1/fCLK tCLKL VIH tCLKH MCLK VIL dCLK=tCLKH x fCLK, tCLKL x fCLK 1/fs VIH LRCK VIL tBCK tBCKL VIH tBCKH BICK VIL Clock Timing tLRB LRCK VIH BICK VIL tSDS VIH SDTI VIL tSDH VIH VIL tBLR Serial Interface Timing
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 15 - tPD VIL PDN Power-down Timing tHIGH SCL SDA VIH tLOW tBUF tHD:STA tR tF tHD:DAT tSU:DAT tSU:STA Stop Start Start Stop tSU:STO VIL VIH VIL tSP I2C Bus mode Timing
Table 1. System clock example edge of BICK. Mode 2 can also be used for 16 MSB justified formats by zeroing the unused two LSBs. Table 2. Audio Data Formats Figure 3. Mode 0,1 Timing
Table 4. Volume #0 (Digital Volume for DAC) Note: Do not exceed 3Vrms as analog output. Table 5. Volume #1 (Analog Volume) Table 6. TVOUT Switch Configuration Table 7. MONOOUT Switch Configuration Table 8. VCROUT Switch Configuration
- Zero-cross detection function
zero-cross is detected on L/R channels independently. To disable this function, set the ZERO bit to “0”. 0 : Disable. The volume value changes immediately without zero-cross. zero-cross timeout before the comparator-based zero-cross detection occurs. to 1DH at next zero-cross or timeout. Figure 6. Zero-cross Operation (ZERO= “1”)
- Offset calibration function
change takes place after calibration is complete. configuration requires standby mode (STBY= “0”).
The AK4702 should be reset once by bringing PDN = “L” upon power-up. The AK4702 has several power-down modes. The PDN pin, MUTE bit and STBY bit control them as shown in Table 9 and Table 10. fixed to TV-VCR loop-through. DAC will power up and the internal timing starts clocking LRCK “↑” after exiting reset and power down states by MCLK. The AK4702 is in power-down mode until MCLK and LRCK are input.
0 Device power-down “L” * * Not Needed Powered
1 Standby and mute
2 Standby “H” 0 1 Not Needed Powered
3 Mute “H” 1 0 Needed Active GND Available
4 Normal operation “H” 0 0 Needed Active Active Available
Table 9. Power-down modes (audio)
0 Power-down “L” * Hi-z Hi-z Internally pulled down by
1 Standby “H” 1 Active
2 Normal operation “H” 0 Active Active Active
Table 10. Power-down modes (video)
The Figure 7 shows an example of the system timing at the power-down and power-up by PDN pin. (1) The analog output corresponding to the digital input has a group delay, GD. (2) The external clocks (MCLK, BICK and LRCK) can be stopped in standby mode. (3) Please mute the analog outputs externally if click noise(3) adversely affects the system. DAC after the STBY bit is changed to “0”. To disable this function, set the CAL bit = “0”. Figure 7. Power-down/up sequence example
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 25 - n Register Map Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 00H Control DEM1 DEM0 DIF1 DIF0 0 0 MUTE STBY 01H Switch VMUTE MMON VCR1 VCR0 MONO VOL TV1 TV0 02H Main Volume 0 0 L5 L4 L3 L2 L1 L0 03H Zerocross 0 0 CAL DVOL1 DVOL0 ZERO ZTM1 ZTM0 04H Video Switch VRF1 VRF0 VVCR2 VVCR1 VVCR0 VTV2 VTV1 VTV0 05H Video output enable CIO TVFB VCRC VCRV TVB TVG TVR TVV 06H Video Volume/Clamp 0 VCLP1 VCLP0 0 CLAMP1 CLAMP0 VVOL1 VVOL0 07H S/F Blanking control SBIO1 SBIO0 SBV1 SBV0 SBT1 SBT0 FB1 FB0 08H S/F Blanking monitor 0 0 0 0 0 FVCR SVCR1 SVCR0 When the PDN pin goes “L”, the registers are initialized to their default values. While the PDN=“H”, all registers can be accessed. Do not write any data to the register over 08H. n Register Definitions Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 00H Control DEM1 DEM0 DIF1 DIF0 0 0 MUTE STBY R/W R/W default 0 1 1 1 0 0 1 1 STBY: Standby control 0 : Normal Operation 1 : Standby Mode(default). All registers are not initialized. DAC : powered down and timings are reset. Gain of Volume#1 : fixed to 0dB, Source of TVOUT : fixed to VCRIN, Source of VCROUT : fixed to TVIN, Source of MONOOUT : fixed to VCRIN, Source of TVVOUT : fixed to VCRVIN(or Hi-Z), Source of TVRC : fixed to VCRRC(or Hi-Z), Source of TVG : fixed to VCRG(or Hi-Z), Source of TVB : fixed to VCRB(or Hi-Z), Source of VCRVOUT : fixed to TVVIN(or Hi-Z), Source of VCRC : fixed to Hi-Z or VSS(controlled by CIO bit). MUTE: Audio output control 0 : Normal Operation 1 : ALL Audio outputs to GND (default) DIF10: Audio data interface format control 00 : 16bit LSB Justified 01 : 18bit LSB Justified 10 : 18bit MSB Justified 11 : 18bit I2S Compatible (Default) DEM10: De-emphasis Response Control 00 : 44.1kHz 01 : off (Default) 10 : 48kHz 11 : 32kHz
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 26 - Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 01H Switch VMUTE MMON VCR1 VCR0 MONO VOL TV1 TV0 R/W R/W default 1 1 0 1 0 1 0 1 TV1-0: TVOUT source switch 00 : DAC 01 : VCRIN (Default) 10 : MUTE 11 : (Reserved) VOL: Source select for MONOOUT 0 : Bypass the volume (fixed to DAC out) 1 : Through the volume (Default) MONO: Mono select for TVOUT 0 : Stereo. (Default) 1 : Mono. (L+R)/2 VCR1-0: VCROUT source switch 00 : DAC 01 : TVIN (Default) 10 : MUTE 11 : (Reserved) MMON: Mute of MONOIN input 0 : Add the MONOIN 1 : Mute the MONOIN (default) VMUTE: Mute switch for volume#1 0 : Normal operation 1 : Mute the volume#1 (Default) Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 02H Main Volume 0 0 L5 L4 L3 L2 L1 L0 R/W R/W default 0 0 0 1 1 1 1 1 L5-0: Volume#1 control Those registers control both Lch and Rch of Volume#1. 111111 to 100011 : (Reserved) 100010 : Volume gain = +6dB 100001 : Volume gain = +4dB 100000 : Volume gain = +2dB 011111 : Volume gain = +0dB (default) 011110 : Volume gain = -2dB ... 000011 : Volume gain = -56dB 000010 : Volume gain = -58dB 000001 : Volume gain = -60dB 000000 : Volume gain = Mute
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 27 - Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 03H Zerocross 0 0 CAL DVOL1 DVOL0 ZERO ZTM1 ZTM0 R/W R/W default 0 0 1 0 0 1 1 1 ZTM10: The time length control of zero-cross timeout 00 : typ. 256/fs 01 : 512/fs 10 : 1024/fs 11 : 2048/fs (default) ZERO: Zero-cross detection enable for volume control#1 0 : Disable The volume value changes immediately without zero-cross. 1 : Enable (default) The volume value changes when timeout or zero-cross before timeout. This function is disabled when STBY= “1”. DVOL1-0: Digital volume control for DAC (Volume#0) 00 : 0dB 01 : -6dB 10 : +2.44dB 11 : (Reserved) CAL: Offset calibration Enable 0 : Offset calibration disable. 1 : Offset calibration enable(default)
Table 11. TV video output (see note) Table 12. VCR video output (see note) Table 13. RF video output (see note) Note: 22: When input the video signal via ENCRC or VCRRC pin, set CLAMP1-0 bits respectively. Note: 23 When VTV2-0=“001”, TVG=“1” and VRF1-0=“01”, RFV output is same as TVG (Encoder G).
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 29 - Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 05H output enable CIO TVFB VCRC VCRV TVB TVG TVR TVV R/W R/W default 0 0 0 0 0 0 0 0 Each video outputs can be set to Hi-Z individually. TVV : TVVOUT output control TVR : TVRCOUT output control TVG : TVGOUT output control TVB : TVBOUT output control VCRV : VCRVOUT output control VCRC : VCRC output control TVFB : TVFB output control 0 : Hi-Z (default) 1 : Active. When CIO= “1”, the VCRC pin is connected to GND even if VCRC= “0”. When CIO= “0”, the VCRC pin follows the setting of VCRC bit. CIO: VCR Chrominance I/O control 0 : Active (output). 1 : Connected to GND CIO VCRC State of VCRC pin 0 0 Hi-z (default) 0 1 Active 1 0 Connected to GND 1 1 Connected to GND Table 14 VCRC output control
Table 15. RGB gain Table 16. DC restore source control
Table 17. TV Fast Blanking output Table 18. TV Slow Blanking output Table 19. VCR Slow Blanking output Table 20. TV/VCR Slow Blanking output
Table 21. VCR Slow Blanking monitor This bit is enabled when TVFB bit = “1”. Table 22. VCR Fast Blanking monitor (Typical threshold is 0.7V) 2usec(typ.) when the status of 08H is changed. This pin should be connected to VD (typ. 5V) through 10kohm resister.
Figure 17. Typical Connection Diagram
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 34 - 1. Grounding and Power Supply Decoupling VD, VP, VVD1, VVD2, VSS and VVSS should be supplied from analog supply unit and be separated from system digital supply. Decoupling capacitor, especially the 0.1µF ceramic capacitor for high frequency noise should be placed as near to VD (VP, VVD1, VVD2) as possible. 2. Voltage Reference Each VCOM is a signal ground of this chip. An electrolytic capacitor 10µF parallel with a 0.1µF ceramic capacitor attached to VCOM pin eliminates the effects of high frequency noise. No load current may be drawn from VCOM pin. All signals, especially clocks, should be kept away from VCOM pins in order to avoid unwanted coupling into the AK4702. 3. Analog Audio Outputs The analog outputs are also single-ended and centered on 5.6V(Typ.). The output signal range is typically 2Vrms (typ@VD=5V). The internal switched-capacitor filter and continuous-time filter attenuate the noise generated by the delta-sigma modulator beyond the audio pass band. Therefore, any external filters are not required for typical application. The output voltage is a positive full scale for 7FFFFFH (@18bit) and a negative full scale for 800000H (@18bit). The ideal output is 5.6V(Typ.) for 000000H (@18bit). The DC voltage on analog outputs are eliminated by AC coupling.
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 35 - 4. External Circuit Example Analog Audio Input pin MONOIN TVINL/R VCRINL/R 0.47ì F 300ohm (Cable) Analog Audio Output pin MONOOUT TVOUTL/R VCROUTL/R 10ì F 300ohm Total > 4.5kohm (Cable) Analog Video Input pin ENCV, ENCY, VCRVIN, TVVIN, ENCRC, ENCC, VCRRC, ENCG, VCRG, ENCB, VCRB 0.1ì F 75ohm (Cable) 75ohm Analog Video Output pin (Except RFV pin) TVVOUT, TVRC TVG, TVR VCRVOUT, VCRC max 400pF 75ohm 75ohm max 15pF (Cable) Analog Video Output pin (RFV pin) The AK4702 does not have 75ohm driver. Please use an external buffer if the input impedance of the RF modulator is less than 20kohm. RFV Max 15pF Buffer Zin>20kohm RF Modulator
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 36 - Slow Blanking pin TVSB VCRSB max 3nF (with 400ohm) 400ohm (max 500ohm) min: 10k ohm (Cable) Fast Blanking Input pin VCRFB 75ohm (Cable) 75ohm Fast Blanking Output pin TVFB 75ohm 75ohm (Cable)
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 37 - PACKAGE 1 12 48 13 7.0 9.0 ± 0.2 7.0 9.0 ± 0.2 0.22 ± 0.08 48pin LQFP(Unit:mm) 0.10 37 24 2536 0.145 ± 0.05 1.40 ± 0.05 0.13 ± 0.13 1.70Max 0° ∼ 10° 0.10 M 0.5 ± 0.2 0.5 n Package & Lead frame material Package molding compound: Epoxy Lead frame material: Cu Lead frame surface treatment: Solder (Pb free) plate
ASAHI KASEI [AK4702] MS0187-E-00 2002/11 - 38 - MARKING AK4702VQ XXXXXXX XXXXXXXX: Date code identifier IMPORTANT NOTICE
- These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning thei r current status.
- AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein.
- Any export of these products, or devices or systems containing them, may req uire an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials.
- AKM products are neither intended nor authorized for use as critical co mponents in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related d evice or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of l ife or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the devic e or system containing it, and which must therefore meet very high standards of performance and reliability.
- It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.