AK4562

AKD4562 AKM | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 30

Technical content

and can achieve the interface with digital audio systems via opt-connector.

• Compatible with 2 types of interface - Direct interface with AKM’s A/D & D/A converter evaluation boards - DIT/DIR with optical input/output
• BNC connector for an external clock input
• 10pin Header for serial control mode LIN1/2 CS8412 (DIR) AK4353 Clock Generator VTVA GND RIN1/2 LOUT1/2 ROUT1/2 AK4562 (DIT) Opt Out Opt In 10pin Header A/D, D/A Data ROM Data Control Data 10pin Header

Figure 1. AKD4562 Block Diagram

• Circuit diagram and PCB layout are attached at the end of this manual.

Figure 2. LIN1,2/RIN1,2 Input circuits

1. Analog signal is input to LIN1 and RIN1 pins via J2 and J4 connectors.
2. Analog signal is input to LIN2 and RIN2 pins via J2 and J4 connectors.

Figure 3. LOUT1/ROUT1 and OPGAL/OPGAR Selection circuits

1. Analog signal is input to OPGAL and OPGAR pins via J3 and J5 connectors.
2. Analog signal is output to LOUT1 and ROUT1 pins via J3 and J5 connectors.
3. Analog signal is input to OPGAL and OPGAR pins via LOUT1 and ROUT1 pins.

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 4 - (2) Other Jumper pins 1. JP1 (CSN) : Selection of CSN pin SSB : SSB mode. AKM : AKM mode. 2. JP2 (SSB) : Selection of SSB mode or AKM mode OPEN : AKM mode. SHORT : SSB mode. 3. JP3 (TST) : Selection of TEST pin OPEN : Normal mode. SHORT : Test mode. * Always open. 4. JP4 (GND) : Analog ground and Digital ground OPEN : Separated. SHORT : Common. (The connector “DGND” can be open.) <default> 5. JP5 (VT) : D2V and VT OPEN : Separated. <default> SHORT : Common. (The connector “VT” can be open.) 6. JP9 (SDTO) : SDTO of AK4562 Always open. It can be short for only evaluation mode “7)”. 7. JP10 (MODE) : Setting mode of CS8412 OPEN : I 2S compatible mode. SHORT : 16 bit LSB justified. * AKM assumes no responsibility for the trouble when using the above circuit examples. n Operation sequence 1) Set up the power supply lines. [VA] (orange) = 2.2 ∼ 3.0V : for VA of AK4562 (typ. 2.5V) [VT] (orange) = 1.8 ∼ 3.0V : for VT of AK4562 (typ. 2.5V) [D2V] (orange) = 1.8 ∼ 3.0V : for 74LVC541 (typ. 2.5V) [D5V] (red) = 3.6 ∼ 5.0V : for logic (typ. 5.0V) [AGND] (black) = 0V : for analog ground [DGND] (black) = 0V : for logic ground Each supply line should be distributed from the power supply unit. VT and D2V must be same voltage level. 2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.) Note : This evaluation board corresponds to I 2S compatible mode for evaluation of A/D. 3) Power on. The AK4562 and AK4353 should be reset once bringing SW1, 2 “L” upon power-up.

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 5 - n Evaluation mode Applicable Evaluation Mode 1) Evaluation of loopback mode (default) 2) Evaluation of D/A using ideal sine wave generated by ROM data 3) Evaluation of D/A using A/D converted data 4) Evaluation of D/A using DIR (Optical Link) 5) Evaluation of A/D using D/A converted data 6) Evaluation of A/D using DIT (Optical Link) 7) All interface signals including master clock are fed externally. DIT PORT1 PORT3 DIR AKD53XX A/D Board ROM Board AKD43XX D/A Board PORT4 AKD4562 2) 3) CD Player 10pin-Header 10pin-Header PORT2 1) Evaluation of loopback mode. <default> Nothing should be connected to PORT3 and PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP13 (CLK) and short JP14 (XTE). This mode corresponds to only I2S compatible mode. JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 6 - 2) Evaluation of D/A using A/D converted data from ideal sine wave generated by ROM data. Digital signals generated by AKD43XX are used. PORT3 is used for the interface with AKD43XX. Master clock is sent from AKD4562 to AKD43XX and BCLK, LRCK, SDTI are sent from AKD43XX to AKD4562. Nothing should be connected to PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP13 (CLK) and short JP14 (XTE). JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC 3) Evaluation of D/A using A/D converted data. It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various AKM’s A/D evaluation boards with PORT3. Nothing should be connected to PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP13 (CLK) and short JP14 (XTE). JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC 4) Evaluation of D/A using DIR. (Optical link) PORT4 (DIR) is used. DIR generates MCLK, BCLK, LRCK and SDATA from the received data through optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be connected to PORT3. DIR (CS8412) corresponds to only I 2S compatible mode or 16 bit LSB justified. JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 7 - 5) Evaluation of A/D using D/A converted data. It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various AKM’s D/A evaluation boards with PORT3. Nothing should be connected to PORT4. JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC 6) Evaluation of A/D using DIT. (Optical link) PORT1 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX176). It is possible to connect AKM’s D/A converter evaluation boards on the digital-amplifier which equips DIR input. Nothing should be connected PORT3 and PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP13 (CLK) and short JP14 (XTE). DIT (AK4353) corresponds to only I 2S compatible mode. JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC 7) All interfacing signals (MCLK, BCLK, LRCK) are fed from the external circuit through PORT3. PORT3 is used. JP7, 8, 11 and 13 should be open. JP13 CLK JP12 DIR JP6 X_BCLK 64fs32fs JP8 BCLK JP14 XTE JP7 LRCK DIRADC DIR EXT XTL GNDVD JP11 SDTI DIRADCDIRADC n The function of the toggle SW Upper-side is “H” and lower-side is “L”. [SW1] (PDN): Power down of AK4562. Keep “H” during normal operation. [SW2] (DIT): Power down of AK4353. Keep “H” during normal operation. n Indication for LED [LED1] (VERF): Monitor VERF pin of the CS8412. LED turns on when some error has occurred to CS8412. [LED2] (PREM): Indicate whether the input data of CS8412 is pre-emphasized or not.

(CTRL) with PC by 10 wire flat cable packed with the AKD4562. Figure 4. Connect of 10 wire flat cable

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 9 - 2. Control Software Manual n Set-up of evaluation board and control software 1. Set up the AKD4562 according to previous term. 2. Connect IBM-AT compatible PC with AKD4562 by 10-line type flat cable (packed with AKD4562). Take care of the direction of 10pin header. (This control software does not operate on Windows NT, therefore please operate it on Windows95/98.) 3. Insert the floppy-disk labeled “AKD4562 Control Program ver 1.0” into the floppy-disk drive. 4. Access the floppy-disk drive and double-click the icon of “AKD4562.exe” to set up the control program. This software corresponds to only AKM mode. 5. Then please evaluate according to the follows. n Explanation of each buttons 1. [Port Setup] : Set up the printer port. 2. [Reset] : Initialize the register of AK4562. 3. [Function1] : Dialog to write data by keyboard operation. 4. [Function2] : Dialog to evaluate IPGA and OPGA. 5. [Write] : Dialog to write data by mouse operation. Note : AK4353(DIT) is fixed to MCLK=256fs and I 2S compatible mode. Therefore, in the case of evaluation for AK4562’s ADC, it is necessary for AK4562 to set up MCLK=256fs and I2S compatible mode. n Explanation of each dialog 1. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Input register address in 2 figures of hexadecimal. Data Box: Input register data in 2 figures of hexadecimal. If you want to write the input data to AK4562, click “OK” button. If not, click “Cancel” button.

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 10 - 2. [Function2 Dialog] : Dialog to evaluate IPGA and OPGA This dialog corresponds to only addr=03H and 04H. Address Box: Input register address in 2 figures of hexadecimal. Start Data Box: Input start data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4562 by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to AK4562, click “OK” button. If not, click “Cancel” button. 3. [Write Dialog] : Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data becomes If you want to write the input data to AK4562, click “OK” button. If not, click “Cancel” button. n Operation flow Keep the following flow surely. 1. Set up the control program according to explanation above. 2. Click “Port Setup” button. 3. Click “Write default” button. 4. Then set up the dialog and input data. n Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet. n Attention on the operation If you set up Function1 or Function2 dialog, input data to all boxes. Attention dialog is indicated if you input data or address that is not specified in the datasheet or you click “OK” button before you input data. In that case set up the dialog and input data once more again. These operations does not need if you click “Cancel” button or check the check box.

ASAHI KASEI [AKD4562] <KM061600> ’00/06 - 11 - MEASUREMENT RESULTS [Measurement condition]

• Measurement unit : Audio Precision, System Two
• MCLK : 256fs
• BCLK : 64fs
• fs : 44.1kHz
• Bit : 20bit
• Power Supply : VA=VD=VT=2.5V
• Interface : DIR/DIT
• Temperature : Room [Measurement Results] Parameter Input pin Results (Lch / Rch) Unit ADC Analog Input Characteristics S/(N+D) (-0.5dB Input) LIN1 / RIN1 LIN2 / RIN2 85.3 / 84.8 85.4 / 84.7 dB dB D-Range (A-weighted) LIN1 / RIN1 LIN2 / RIN2 88.6 / 88.6 88.6 / 88.6 dB dB S/N (A-weighted) LIN1 / RIN1 LIN2 / RIN2 88.6 / 88.6 88.6 / 88.6 dB dB Interchannel Isolation LIN1 / RIN1 LIN2 / RIN2 109.6 / 108.7 109.7 / 109.8 dB dB DAC Analog Output Characteristics D-Range (A-weighted) - 93.0 / 93.0 dB S/N (A-weighted) - 93.2 / 93.2 dB Interchannel Isolation - 109.5 / 108.7 dB Output PGA Characteristics (OPGA) S/(N+D) OPGAL / OPGAR 91.7 / 91.7 dB S/N (A-weighted) OPGAL / OPGAR 94.2 / 94.2 dB Noise level at Mute (A-weighted) OPGAL / OPGAR 108.5 / 108.6 dB

A A B B C C D D E E E E D D C C B B A A AK4562 Sub A AKD4562 11Wednesday, February 02, 2000 Title Size Document Number Rev Date: Sheet of CN2 CN4 0.1u +C4 2.2u 0.1u 10u 0.1u + 10u 0.1u 10u CN3 CN1 51R7 51R8 AK4562 OPGAR LOUT2 ROUT2 LIN1 RIN1 LIN2 RIN2 VCOM AGND VA VREF VD DGND VT SDTO SDTI BCLK TST MCLK LRCK CDTI CCLK CSN PDN SSB LOUT1 OPGAL ROUT1

A A B B C C D D E E E E D D C C B B A A AGNDDGND SSB AKM open = "L" short = "H" HL open = "L" short = "H" AK4562 A AKD4562 13Tuesday, June 13, 2000 Title Size Document Number Rev Date: Sheet of LIN2 RIN2 LOUT2 ROUT2 SSB PDN CSN CCLK CDTI SDTO SDTI BCLK TST MCLK LRCK OPGAR OPGAL ROUT1 LOUT1 CSN CSN1 SSB PDN TST RIN1 LIN1 VA VT D2V D5V D2V VT D2V 0.1u +C6 2.2u 0.1u 10u 0.1u+ 10u 0.1u C10 10u R12 +C13 47u (short) 1 2 10u 1 2 +C11 47u JP4 GND R10 51 R9 51 R8 51 R7 51 R6 51 R4 51 R5 51 0.1u+ C1 47uL1 10u 1 2 JP1 CSN JP2 SSB R2 47k SW1 PDN 1S1588 2 1 R11 10k C12 0.1u JP3 TST 47k 74LVC541 VCC GND AK4562 NC NC LOUT2 ROUT2 NC NC LIN1 RIN1 NC LIN2 RIN2 NC NC NC NC VCOM NC AGND VA VREF NC VD DGND VT NC NC NC NC SDTO SDTI BCLK TST MCLK LRCK NC CDTI CCLK NC NC NC NC CSN PDN SSB NC LOUT1 OPGAL NC ROUT1 OPGAR NC NC JP5 VT U3A 74HC14 1 2 U3B 74HC14 3 4

A A B B C C D D E E E E D D C C B B A A 64fs fs 32fs ADC DIR MCLK BCLK LRCK SDTI ROM XTL EXT DIR for 74HCU04, 74HC14, 74HC4040 LH ADC ADC DIR DIR VDGND CSN CCLK / SCK CDTI / SSI SDTO short = "H" open = "L" for SN74LVC07A Interface A AKD4562 23Monday, January 24, 2000 Title Size Document Number Rev Date: Sheet of X_BCLK X_LRCK MCLK SDTO SDTI BCLK DIR_BCLK X_LRCK DIR_LRCK X_BCLK LRCK CSN1 CCLK CDTI CSN1 CCLK CDTI SDTO1 SDTO1 DIR_BCLK DIR_LRCK M0/2 M0/2 D5V D5V D5V D5V D5V D5V D5V D5V D5V D5V D2V R13 R17 10k C31 0.1u +C32 10u C33 0.01u C36 0.01u R31 LED2 PREM 10u 1 2 LED1 VERF R29 JP12 DIR R33 EXT C27 10u C28 0.1u JP14 XTE R30 11.2896MHz C23 0.1u C24 0.1u C25 0.1u + C22 47u JP6 X_BCLK JP9 SDTO R26 10k JP8 BCLK JP7 LRCK C14 0.1u C17 0.1u 1S1588 2 1 SW2 DIT PORT1 DIT

6 GND

5 OUT

0.1u C20 0.1u + C19 10u + C21 10u R19 5.1 C16 0.1u +C15 10u PORT3 ROM 5 6 JP11 SDTI PORT2 CTRL R18 R20 R21 R14 10k R15 10k R16 10k JP13 CLK 10u 1 2 74HC4040 CLK RST Q10 Q11 Q12 U8B 74HCU04 U8C 74HCU04 R25 R32 C34 47n C35 0.1u CS8412 14 15 28C Cd/F1 Cc/F0 Cb/E2 Ca/E1 C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U CBL SEL MCK FILT AGND VA+ ERF SDATA Ce/F2 VERF JP10 MODE R27 47k R22 R23 51 R24 51 U6A SN74LVC07A C26 0.1u C30 (open) C29 (open) U8A 74HCU04 U3C 74HC14 5 6 U3D 74HC14 9 8 U3F 74HC14 1312 U3E 74HC14 1110

A A B B C C D D E E E E D D C C B B A A LIN1 LIN2 ROUT1 OPGRLOUT1 OPGL RIN1 RIN2 LOUT1 OPGL ROUT1 OPGR Input/Output A AKD4562 33Tuesday, December 21, 1999 Title Size Document Number Rev Date: Sheet of LOUT2 ROUT2 ROUT1 OPGAR LOUT1 OPGAL RIN1 RIN2 LIN2 LIN1J2 LIN R36 560 C38 10u LOUT2 R42 220R43 10k C45 22u ROUT2 R44 220R45 10k C46 22u C42 22u R39 220 ROUT1 R40 10k JP19 RIO R41 560 C44 + C43 C37 22u R34 220 LOUT1 R35 10k JP16 LIO R37 560 C40 + C39 RIN R38 560 C41 10u JP17 OPGL JP20 OPGR JP15 LIN JP18 RIN U8D 74HCU04 U8E 74HCU04 1110 U8F 74HCU04 1312 U6B SN74LVC07A U6D SN74LVC07A U6F SN74LVC07A 1312 U6C SN74LVC07A 5 6 U6E SN74LVC07A 11 10

• These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: a. A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. b. A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.