AK4223 AKM | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 27

Technical content

[AK4223] MS1251-E-00 1 2010/10 GENERAL DESCRIPTION The AK4223 is an AV switch with 6:2 audio and 6:2 video switches. High performances with low power consumption are achieved by CMOS process. Integrated differential input circuits in audio and video blocks can separate the external ground noise. In audio block, a differential input circuit, audio LPF and 0dB/-6dB gain amplifier are integrated eliminating the needs for external LPF for audio outputs. In video block, an input clamp circuit, 6dB amplifier and video driver are integrated, and they also eliminate the need for external circuits. The AK4223 is offered in a space saving small 48-pin LQFP package, ideal for car navigation applications.

FEATURES

  1. Audio Section
  • Selector with 6 inputs and 2 outputs
  • Differential Input Circuit for Ground Noise Canceling
  • LPF Circuit for Audio signals
  • Output Gain Control: 0dB ∼ - 6dB, -1dB Step
  • S/(N+D): 90dB (@0dBV)
  • Dynamic Range: 94dB
  • Channel-Independent Mute Function 2. Video Section
  • Selector with 6 inputs and 2 outputs
  • Six Composite Signal Inputs
  • On-Chip Sync-tip Clamp Circuit
  • Video Drivers for Composite Signal Output (+6dB/+3dB/0dB/-3dB)
  • Output Gain Control: -1dB ∼ +1dB, 0.1dB Step
  • LPF Circuit for Video signals (Bandwidth: 6MHz)
  • S/N: 65dB
  • Channel-Independent Mute Function 3. Control Section
  • Serial µP I/F (I2C) 4. Power Supply: 7.5V ∼ 9.5V 6. Package: 48pin LQFP 6:2 Audio Switch and 6:2 Video Switch AK4223

Figure 1. AK4223 Block Diagram

[AK4223] MS1251-E-00 3 2010/10 ■ Ordering Guide AK4223VQ -40 ∼ +85°C 48pin LQFP (0.5mm pitch) AKD4223 Evaluation Board for AK4223 ■ Pin Layout LIN3 VCOM

38 RIN2

39 GND2

40 LIN2

41 RIN1

45 SDA

46 SCL

[AK4223] MS1251-E-00 4 2010/10 PIN/FUNCTION No. Pin Name I/O Function 1 VIN6 I Video Signal Input Pin 6. 2 VGND5 I Video GND Input Pin 5. 3 VIN5 I Video Signal Input Pin 5. 4 VGND4 I Video GND Input Pin 4. 5 VIN4 I Video Signal Input Pin 4. 6 VGND3 I Video GND Input Pin 3. 7 VIN3 I Video Signal Input Pin 3. 8 VGND2 I Video GND Input Pin 2. 9 VIN2 I Video Signal Input Pin 2. 10 VGND1 I Video GND Input Pin 1. 11 VIN1 I Video Signal Input Pin 1. 12 VR2 O Video Signal Clamp Reference Pin 2. Normally connected to VSS2 with a 0.1μF capacitor. 13 VOUT2 O Video Signa l Output Pin 2. 14 VOUT1 O Video Signa l Output Pin 1. 15 VR1 O Video Signal Clamp Reference Pin 1. Normally connected to VSS2 with a 0.1μF capacitor.

16 REGV

O Regulator Output Pin for the power supply of Video Core Circuit. 5.0V (typ) For stability of the regulator, this pin must connect to VSS2 with a 10μF capacitor.

17 RSTN I Reset Mode Pin

“L”: Reset mode (All registers are initialized to their default values.) “H”: Normal operation 18 VVDD - Power Supply Pin: 7.5V~9.5V 19 AVDD - Power Supply Pin: 7.5V~9.5V 20 RVDD - Power Supply Pin: 7.5V~9.5V 21 ROUT2 O Audio Signal Output Pin ROUT 2. 22 LOUT2 O Audio Signal Output Pin LOUT 2. 23 ROUT1 O Audio Signal Output Pin ROUT 1. 24 LOUT1 O Audio Signal Output Pin LOUT 1. 25 RIN6 I Audio Signal Input Pin RIN 6. 26 GND6 I Audio GND Input Pin GND 6. 27 LIN6 I Audio Signal Input Pin LIN 6. 28 RIN5 I Audio Signal Input Pin RIN 5. 29 GND5 I Audio GND Input Pin GND 5. 30 LIN5 I Audio Signal Input Pin LIN 5. 31 RIN4 I Audio Signal Input Pin RIN 4. 32 GND4 I Audio GND Input Pin GND 4. 33 LIN4 I Audio Signal Input Pin LIN 4. 34 RIN3 I Audio Signal Input Pin RIN 3. 35 GND3 I Audio GND Input Pin GND 3. 36 LIN3 I Audio Signal Input Pin LIN 3.

37 VSS1 - Audio Ground Pin

38 RIN2 I Audio Signal Input Pin RIN 2. 39 GND2 I Audio GND Input Pin GND 2. 40 LIN2 I Audio Signal Input Pin LIN 2.

[AK4223] MS1251-E-00 5 2010/10 PIN/FUNCTION (Continued) No. Pin Name I/O Function 41 RIN1 I Audio Signal Input Pin RIN 1. 42 GND1 I Audio GND Input Pin GND 1. 43 LIN1 I Audio Signal Input Pin LIN 1. 44 VCOM O Audio VCOM Voltage Pin. Normally connected to VSS1 with a 1μF electrolytic capacitor. 45 SDA I/O Control Data Pin. 46 SCL I Control Data Clock Pin. 47 VSS2 - Video Ground Pin. 48 VGND6 I Video GND Input Pin 6. ■ Handling of Unused Pin The unused I/O pins should be processed appropriately as below. Classification Pin Name Setting Audio Inputs LIN1-6, RIN1-6, GND1-6 These pins must be open. Video Input VIN1-6, VGND1-6 These pins must be connected to VSS2. Audio, Video Outputs LOUT 1-2, ROUT1-2, VOUT1-2 Thes e pins must be open.

[AK4223] MS1251-E-00 6 2010/10 ABSOLUTE MAXIMUM RATINGS (VSS1=VSS2 =0V; Note 1) Parameter Symbol min max Units Power Supply AVDD VVDD RVDD -0.3 +14.0 V Input Current (any pins except for supplies) IIN - ±10 mA Audio Input Voltage VINA -0.3 AVDD+0.3 V Video Input Voltage VINV -0.3 5.5 V Digital Input Voltage VIND -0.3 5.5 V Ambient Operating Temperature Ta -40 85 °C Storage Temperature Tstg -65 150 °C Note 1. All voltages with respect to ground. Note 2. VSS1 and VSS2 must be connected to the same analog ground plane. Note 3. AVDD and RVDD must be the same voltage. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. RECOMMENDED OPERATING CONDITIONS (VSS1=VSS2 = 0V) Parameter Symbol min typ max Units Power Supply AVDD VVDD RVDD 7.5 9.0 9.5 V Note 3. AVDD and RVDD must be the same voltage. *AKM assumes no responsibility for the usage beyond the conditions in this datasheet.

ELECTRICAL CHARACTERISTICS

(Ta=25°C; AVDD= RVDD= VVDD= 9.0V; VSS1= VSS2 = 0V) Power Supplies Parameter min typ max Units Power Supply (AVDD+RVDD+VVDD) Normal Operation ( Note 4), (RSTN pin = “H”) Power-Down Mode (Note 5), (RSTN pin = “L”) 2.1 3.1 mA μA Note 4. No input, No load. Note 5. This is the value without analog inputs when all digital input pins are fixed to VSS1 or VSS2.

Note 6. This is a value when AGCA=0dB. Note 7. The Input Voltage meets S/(N+D)>82dB. Note 8. Between all channels of LIN1-6 and RIN1-6. Note 9. The output resistance of audio output (LOUT1-2 and ROUT1-2) are less than l0Ω (typ). Note 10. Applied to AVDD, RVDD and VVDD with a sine wave (1kHz, 50mVpp). Figure 2. Load Resistance R1, R2 and Load Capacitance C1, C2

Differential Gain 0.7Vpp 5steps modulated staircase. Chrominance & burst are 280mVpp, 4.43MHz. Differential Phase 0.7Vpp 5steps modulated staircase. Chrominance & burst are 280mVpp, 4.43MHz. and 500mV(max) when VGAIN=0dB or -3dB. Figure 3. Measurement Point

set by ASEL12-10bits and ASEL22-20 bits, and the video input selectors are set by VSEL12-10bits and VSEL22-20 bits. Table 1. Audio Input Selector 1 (LOUT1/ROUT1) Table 2. Audio Input Selector 2 (LOUT2/ROUT2) Note 15. The audio outputs become 3.9V(typ., Gain=0dB) when input selectors are OFF. Table 3. Video Input Selector 1 (VOUT1) Table 4. Video Input Selector 2 (VOUT2) Note 16. The video outputs become sync tip level when input selectors are OFF.

Table 5. L/ROUT1 Output Level Setting Table 6. L/ROUT2 Output Level Setting

0 Normal Output (default)

1 Mute

Table 7. L/ROUT1 Output Mute Control Table 8. L/ROUT2 Output Mute Control

Table 11. Video Output Level (VOUT1) Fine Tuning Setting Table 12. Video Output Level (VOUT2) Fine Tuning Setting

be set to “0” when driving 150Ω resistance. Table 13. VOUT1 Output Driver Setting Table 14. VOUT2 Output Driver Setting Table 15. VOUT1 Output Mute Control Table 16. VOUT2 Output Mute Control

[AK4223] MS1251-E-00 20 2010/10 ■ Register Map Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 00H Control 0 0 VMUTE2 VMUTE1 0 0 AMUTE2 AMUTE1 01H Input Selector Control1 0 ASEL 22 ASEL21 ASEL20 0 ASEL12 ASEL11 ASEL10 02H Input Selector Control2 0 VSEL 22 VSEL21 VSEL20 0 VSEL12 VSEL11 VSEL10 03H Output Level Control1 0 AGCA22 AGCA21 AGCA20 0 AGCA12 AGCA11 AGCA10 04H Output Level Control2 0 VR2 VR1 0 VGAIN21 VGAIN20 VGAIN11 VGAIN10 05H Output Level Control3 0 0 0 VGCA14 VGCA13 VGCA12 VGCA11 VGCA10 06H Output Level Control4 0 0 0 VGCA24 VGCA23 VGCA22 VGCA21 VGCA20 Note: Do not write any data to the register over 07H. When the PDN pin changes to “L”, the registers are initialized to their default values. The bits defined as 0 must contain a “0” value.

[AK4223] MS1251-E-00 21 2010/10 ■ Register Definitions Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 00H Control 0 0 VMUTE2 VMUTE1 0 0 AMUTE2 AMUTE1 Default 0 0 0 0 0 0 0 0 AMUTE2-1: Audio Output Mute Control ( Table 7, Table 8) 0: Normal Operation (default) 1: Mute VMUTE2-1: Video Output Mute Control ( Table 15, Table 16) 0: Normal Operation (default) 1: Mute Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 01H Input Selector Control1 0 ASEL2 2 ASEL21 ASEL20 0 ASEL12 ASEL11 ASEL10 Default 0 0 0 0 0 0 0 0 ASEL12-10: Audio Input Selector 1 Control ( Table 1) The LOUT1/ROUT2 pin outputs 3.9V (typ., Gain=0dB) at the default setting “000”. ASEL22-20: Audio Input Selector 2 Control ( Table 2) The LOUT2/ROUT2 pin outputs 3.9V (typ., Gain=0dB) at the default setting “000”. Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 02H Input Selector Control2 0 VSEL2 2 VSEL21 VSEL20 0 VSEL12 VSEL11 VSEL10 Default 0 0 0 0 0 0 0 0 VSEL12-10: Video Input Selector 1 Control ( Table 3) The video output is sync tip clamp level at the default setting “000”. VSEL22-20: Video Input Selector 2 Control ( Table 4) The video output is sync tip clamp level at the default setting “000”. Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 03H Output Level Control1 0 AGCA22 AGCA21 AGCA20 0 AGCA12 AGCA11 AGCA10 Default 0 0 0 0 0 0 0 0 AGCA11-10: Audio Output L/ROUT1 Level Control ( Table 5) 000: 0dB (default) 001: -1dB 010: -2dB 110: -6dB 111: Reserved AGCA21-20: Audio Output L/ROUT2 Level Control ( Table 6) 000: 0dB (default) 001: -1dB 010: -2dB 110: -6dB 111: Reserved

[AK4223] MS1251-E-00 22 2010/10 Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 04H Output Level Control2 0 VR2 VR1 0 VGAIN21 VGAIN20 VGAIN11 VGAIN10 Default 0 0 0 0 0 0 0 0 VGAIN11-10: Video Out put1 Level Control (Table 9) 00: +6dB (default) 01: 0dB 10: +3dB 11: -3dB VGAIN21-20: Video Out put2 Level Control ( Table 10) 00: +6dB (default) 01: 0dB 10: +3dB 11: -3dB VR1: Video Output1 Load Resistance 0: Drive 150Ω (default) 1: Drive 100kΩ (min) VR2: Video Output2 Load Resistance 0: Drive 150Ω (default) 1: Drive 100kΩ (min) Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 05H Output Level Control3 0 0 0 VGCA14 VGCA13 VGCA12 VGCA11 VGCA10 Default 0 0 0 0 1 0 1 0 VGCA14-10: Video Output1 Level Control ( Table 11) The video output is +6dB (when VGAIN11-10 bits = “00”), 0dB (when VGAIN11-10 bits = “01”), +3dB (when VGAIN11-10 bits= “10”) and -3dB (when VGAIN11-10 bits = “11”) at the default setting “01010”. Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 06H Output Level Control4 0 0 0 VGCA24 VGCA23 VGCA22 VGCA21 VGCA20 Default 0 0 0 0 1 0 1 0 VGCA24-20: Video Output2 Level Control ( Table 12) The video output is +6dB (when VGAIN21-20 bits = “00”), 0dB (when VGAIN21-20 bits = “01”), +3dB (when VGAIN21-20 bits= “10”) and -3dB (when VGAIN21-20 bits = “11”) at the default setting “01010”.

optimum layout, power supply arrangements and measurement results.

13 VOUT2

14 VOUT1

48 VGND6

47 VSS2

44 VCOM

43 LIN1

42 GND1

37 VSS1

Figure 22. Typical Connection Diagram

[AK4223] MS1251-E-00 24 2010/10 1. Grounding and Power Supply Decoupling The AK4223 requires careful attention to power supply and grounding arrangements. AVDD, VVDD and RVDD are usually supplied from the analog power supply in the system. Alternatively if AVDD, VVDD and RVDD are supplied separately, AVDD and RVDD must be powered-up at the same time. The power up sequence between AVDD/RVDD and VVDD is not critical. VSS1 and VSS2 must be connected to the analog ground plane. System analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as close to the power supply pin of AK4223 as possible. Voltage Reference VCOM is a signal ground of this chip. An 1μF electrolytic capacitor attached between VCOM and VSS1 eliminates the effects of high frequency noise. No load current may be drawn from the VCOM pin. To avoid coupling to the AK4223, all signals and especially clock signals should be kept away as far as possible from the VCOM pin. 3. Notes for Drawing a Board Analog input and output pins should be as short as possible in order to avoid unwanted coupling into the AK4223. The unused pins should be open.

[AK4223] MS1251-E-00 25 2010/10 PACKAGE 1 12 48 13 7.0 9.0 ± 0.2 7.0 9.0 ± 0.2 0.22 ± 0.08 48pin LQFP (Unit: mm) 0.10 37 24 25 36 0.09 ∼ 0.20 1.40 ± 0.05 0.13 ± 0.13 1.70Max 0° ∼ 10° 0.10 M 0.3 ∼ 0.75 0.5 ■ Package & Lead Frame Material Package molding compound: Epoxy Lead frame material: Cu Lead frame surface treatmen t: Solder (Pb free) plate RoHS Compliance *All integrated circuits form Asahi Kasei Microdevices Corporation (AKM) assembled in “lead-free” packages are fully compliant with RoHS.

[AK4223] MS1251-E-00 26 2010/10 MARKING AK4223VQ XXXXXXX XXXXXXXX: Date code identifier Date (YY/MM/DD) Revision Reason Page Contents 10/10/22 00 First Edition

REVISION HISTORY

[AK4223] MS1251-E-00 27 2010/10 IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or system Note2), and AKM assumes no responsibility fo r such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aeros pace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.