A1502 MAT | Alldatasheet

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Dual Hall Speed and Direction Sensors 051123 www.masteranalog.com Page 1 of 3 RD-30068 Rev 1.01 A1502 is a dual channel hall latch function with two hall sensor, it's outputs for speed and direction signals.  Absolute Maximum Ratings At (TA=25℃) Characteristics Values Unit Supply Voltage, (VDD) 28 V Output V oltage, (VOUT) 28 V Output Current, (ISINK) 50 mA Operating Temperature Range, (TA) -40 ~+125 ℃ Storage Temperature Range, (TS) -65 ~ +150 ℃ Package Power Dissipation, (PD) 550/780 mW  Functional Block Diagram Voltage Regulator VDD Out A VSS Amp Hall Sensor B Amp Hall Sensor A Direction Detection Bias and compensation circuits Out B  Electrical Specifications DC Operating Parameters： T A=+25℃, VDD=12V Parameters Test Conditions Min Typ Max Units Supply V oltage, (VDD) Operating 2.5 26.0 V Supply Current, (IDD) B<BOP 5.0 mA Output Saturation V oltage, (VDSON) IOUT=20mA, B>BOP 400.0 mV Output Leakage Current, (IOFF) IOFF B<BRP, VOUT = 12V 10.0 uA Output Switch Frequency, (FSW) 3 kHz Output Rise Time, (TR) RL=1KΩ, CL=20pF 0.45 uS Output Fall Time, (TF) RL=1KΩ; CL=20pF 0.45 uS Electro-Static Discharge HBM 4 KV Operate Point, (BOP) I4/D6 5 25 Gauss Release Point, (BRP) I4/D6 -25 -5 Gauss Hysteresis, (BHYS) |BOP - BRP| 30 Gauss DMOS Hall Effect Latch Supply Voltage 2.5 ~ 26V BOP：15 Gauss BRP：-15 Gauss Output Open Drain Package SIP-4(I4) DFN2020-6(D6) Masteranalog

Dual Hall Speed and Direction Sensors 051123 www.masteranalog.com Page 2 of 3 RD-30068 Rev 1.01  Typical Application circuit A1502 VDD SN S N VDD OUT A OUT B VSS OUT1 OUT2 R1 R2 Package Dimension and Sensor Location (Top VieW) NOTES: 1. Controlling dimension: mm 2. Leads must be free of flash and plating voids 3. Do not bend leads within 1 mm of lead to package interface. 4. PINOUT: Pin No. Pin Name Function

1 VDD Power Supply

2 OUT A Output 1

3 OUT B Output 2

4 VSS Ground

R1：1KΩ R2：1KΩ C1：0.1uF Masteranalog

Dual Hall Speed and Direction Sensors 051123 www.masteranalog.com Page 3 of 3 RD-30068 Rev 1.01 NOTES: 1. Controlling dimension: mm 2. Leads must be free of flash and plating voids 3. Do not bend leads within 1 mm of lead to package interface. 4. PINOUT: Pin No. Pin Name Function

1 VDD1 Power Supply

3 VSS Ground

4 VDD2 Power Supply

5 OUT B Output 2

6,7,8 VSS Ground Masteranalog