A1178 MAT | Alldatasheet
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Technical content
Micro-power Open Drain Output Hall Effect Latch 050523 www.masteranalog.com Page 1 of 2 RD-30058 Rev 1.01 A1178 is a micro-power Hall latch IC, with high sensitivity and open drain output. Absolute Maximum Ratings At (TA=25℃) Characteristics Values Unit Supply Voltage, (VDD) 6.0 V Output V oltage, (VOUT) 6.0 V Output Current, (ISINK) 10 mA Operating Temperature Range, (TA) -40 ~ +125 ℃ Storage Temperature Range, (TS) -65 ~ +150 ℃ Package Power Dissipation, (PD) 606 / 230 mW Functional Block Diagram Electrical Specifications DC Operating Parameters： T A=+25℃, VDD=3.0V Parameters Test Conditions Min Typ Max Units Supply V oltage, (VDD) Operating 2.0 5.5 V Supply Current, (IDD) Awake State 2.0 5.0 mA Sleep State 7.0 10.0 uA Average 9.0 15 uA Output Saturation V oltage, (VDSON) IOUT=5mA, B>BOP 200 mV Output Leakage Current, (IOFF) B<BRP, VOUT = 5.5V 1.0 uA Awake mode time, (TAW) Operating 40 80 uS Sleep mode time, (TSL) Operating 40 80 mS Duty Cycle, (D,C) 0.1 % Response Time, (TRES) 5 Hz Electro-Static Discharge HBM 4 KV Operate Point, (BOP) I3(S3) 5(-40) 40(-5) Gauss Release Point, (BRP) I3(S3) -40(5) -5(40) Gauss Hysteresis, (BHYS) |BOP - BRP| 40 Gauss CMOS Hall Effect Latch Supply Voltage 2.0 ~ 5.5V BOP：20 Gauss BRP：-20 Gauss Output Open Drain Package SIP-3(I3) SOT-23(S3) Awake/Sleep Timing Control Amp Control Logic Offset Cancellation VDD Out Vss Hall Sensor Masteranalog
Micro-power Open Drain Output Hall Effect Latch 050523 www.masteranalog.com Page 2 of 2 RD-30058 Rev 1.01 Package Dimension and Sensor Location (Top VieW) NOTES: 1. Controlling dimension: mm 2. Leads must be free of flash and plating voids 3. Do not bend leads within 1 mm of lead to package interface. 4. PINOUT: Pin No. Pin Name Function
1 VDD Power Supply
2 VSS Ground
3 VOUT Output
(Top VieW) NOTES: 1. Controlling dimension: mm 2. Leads must be free of flash and plating voids 3. Lead thickness after solder plating will be 0.254mm maximum 4. PINOUT: Pin No. Pin Name Function