XC9401 TOREX | Alldatasheet
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Off-line Controllers for LED Lighting Input Voltage Product Type Isolation / Non-Isolation Topology Efficiency Power Factor 100VAC / 110VAC XC9401B605MR Non-Isolation Buck 91% 0.6 XC9401B605MR 83% 0.6 220VAC / 240VAC XC9401A605MR Isolation Flyback 82% 0.9 220VAC / 240VAC XC9401B605MR Non-Isolation Buck 87% 0.6 XC9401B605MR - Buck 88% - DC / 12VAC XC9401B605MR - Buck-Boost 86% - ■GENERAL DESCRIPTION The XC9401 series are off-line controller ICs for LED lighting. Through optimization of the external components, these ICs can be made to operate in a range from 85VAC to 270VAC, as we ll as by DC input, and a diversity of specifications can be achieved by selecting components appropriate for the circuit conf iguration. Fixed off-time control is used for the basic contro l method, and by detecting the current that flows to the external power MOSFET, the current that flows to the LED is monitored to provide a stable power supply for LED lighting. Two product se ries differing by function type are available, the XC9401A type and the XC9401B type. The circuit configuration of type A is designed for the power factor, achieving a high power factor by synchronizing the LED current to the input current (sine wave). In this circuit configuration, a high-capacity, high-withstand voltage electrolytic capacitor is not necessary after the bridge rectifier circuit from the AC input. The input filter removes high frequency switching noise from the AC line, allowing a small-capacity ceramic capacitor to be used. Type B holds the peak current due to switching that flows to the external power MOSFET constant, enabling the LED current to be kept constant. By keeping the LED current const ant, this circuit configuration makes it possible to achieve a stable light source with high efficiency. ■APPLICATIONS
- LED lights ( <=10W )
- LED lamps
- LED tube lights
- LED spot lights
- LED stands ■FEATURES Operating Voltage : 85VAC ~ 270VAC VDD Input Voltage Range : 9V ~ 15V Fixed Off-time : 6.0 μs Protection Circuits : Thermal Shutdown 150 oC (TYP.) VDD Over voltage protection, V DD=18V (TYP .) UVLO, V DD=6.5V (TYP.) Over current protection VISEN=0.7V (TYP.) Dimming : PWM Dimming Package : SOT-26 Operating Ambient Temperature : -40 oC ~ +85oC Environmentally Friendly : EU RoHS Compliant, Pb Free ■SOLUTION EXAMPLES ETR3201-006 ■TYPICAL APPLICATION CIRCUITS (XC9401B605MR-G 100VAC Non-isolation buck Type) GND GATE 0.1μF/250V D1 RF071M2S LED 20Series/110mA 1uF/100V EN/DIM 1mH IPD60R3K3C6 3.3mH 2.2Ω 10μF/25V BR1 B4S 33kΩ ZD1 12V 20Ω 100VAC /110VAC 10μF/250V ISEN VDDNF 33kΩ JP *Due to dispersion of constant values of external components, the above values may be deviated. Please understand that the above are typical values. For details, refer to the XC9401 Series Application Notes.
■BLOCK DIAGRAM 1) XC9401 Series, Type A 2) XC9401 Series, Type B EN/DIM Logic ISEN GATE Buffer Drive Voltage Level Shifter Voltage Regulator VSINE to Internal Circuits GND VDD Thermal Shutdown 150℃ OVP 16.5V / 18V EN/DIM DELAY Off Time Controller 6μs VREF (Bandgap reference) UVLO 6.5V / 7.5V Min. ON Time Controller Over Current Limit CMP ×0.2783 PWMCMP Off Time Controller 140μs (Over Current Limit) 180Ω 0.7V Logic ISEN GATE Buffer Drive Voltage Level Shifter Voltage Regulator NF to Internal Circuits GND VDD Thermal Shutdown 150℃ OVP 16.5V / 18V EN/DIM DELAY Off Time Controller 6μs VREF (Bandgap reference) UVLO 6.5V / 7.5V Min. ON Time Controller Over Current Limit CMP ×0.2783 PWMCMP Off Time Controller 140μs (Over Current Limit) 180Ω 0.7V EN/DIM
■ PRODUCT CLASSIFICATION
- Ordering Information XC9401①②③④⑤⑥-⑦ DESIGNATOR ITEM SYMBOL DESCRIPTION A ① Type B Refer to Selection Guide ② OFF Time 6 OFF Time is fixed in 6μs ③④ Accuracy 05 ISEN Voltage Accuracy is ±5% ⑤⑥-⑦ (*1) Package (Order Unit) MR-G SOT-26 (3,000/Reel) (*1) The “-G” suffix denotes Halogen and Antimony free as well as being fully RoHS compliant.
- Selection Guide TYPE COMPARISON WITH ISEN PWM DIMMING DESCRIPTION A "VSINE" × 0.2783 Yes Type A is suitable for PFC circuit. B "VREF" × 0.278 Yes Type B is suitable for constant LED current circuit. ■PIN CONFIGURATION ■PIN ASSIGNMENT PIN NUMBER SOT-26 PIN NAME FUNCTIONS
1 I SEN Current Feedback
2 VDD Power Input
3 GATE External Power MOS Drive
4 EN/DIM Active / Stand-by / PWM Dimming Control
5 GND Ground
Type A: VSINE VSINE Pin: Current Feedback Reference Voltage Input. 6 Type B: NF NF Pin: No Function. Please connect to GND. *Type A *Type B
■FUNCTION PIN NAME EN/DIM STATUS L Stand-by Mode H Active Mode EN/DIM OPEN Undefined State (*1) (*1) Prohibited in the XC9401 series due to undefined operation. ■ABSOLUTE MAXIMUM RATINGS Ta=25 o C PARAMETER SYMBOL RATINGS UNITS VDD Pin Voltage VDD -0.3 ~ +19.4 V EN/DIM Pin Voltage VENDIM -0.3 ~ +19.4 V GATE Pin Voltage VMODE -0.3 ~ VDD+0.3 or +19.4 (*2) V ISEN Pin Voltage VISEN -0.3 ~ 5.5 V VSINE Pin Voltage VSINE NF Pin Voltage VNF -0.3 ~ 5.5 mA Power Dissipation SOT-26 Pd 250 mW Operating Ambient Temperature Topr -40 ~ +85 ℃ Storage Temperature Tstg -55 ~ +125 ℃ (*1) All voltages are described based on GND. (*2) The maximum value should be either VDD+0.3 or +19.4V in the lowest.
■ELECTRICAL CHARACTERISTICS XC9401 Series, Type A Ta=25 oC PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS CIRCUIT VDD Voltage Range V DD 9 - 15 V ① ISEN Voltage V ISEN V ISEN=SWEEP (*1) , VSINE =1V 0.2644 0.2783 0.2922 V ① VSINE Voltage Range (*2) V SINE GND - 1.8 V ① UVLO Detect Voltage V UVLO V DD=SWEEP (*3) 5.5 6.5 7.5 V ① UVLO Release Voltage V UVLOR V DD=SWEEP (*4) 6.5 7.5 8.5 V ① UVLO Hysteresis Width V UVLOH V UVLOH=VUVLOR - VUVLO - 1.1 - V ① Supply Current (*5) I DD V DD=VEN/DIM=15V - 250 300 μA ① Stand-by Current (*6) I STB VDD=15V, VEN/DIM=GND, VSINE=GND - 225 280 μA ① VDD Overvoltage Protection Voltage VOVP V DD=SWEEP (*3) , VEN/DIM=VDD 17 18 19 V ① VDD Overvoltage Protection Release Voltage VOVPR V DD=SWEEP (*4) , VEN/DIM=VDD 15.5 16.5 17.5 V ① VDD Overvoltage Protection Hysteresis Width VOVPH V OVPH=VOVP - VOVPR - 1.5 - V ① VDD Overvoltage Protection Discharge Current (*7) IOVP V DD=19V - 30 - mA ① IGATE = -10mA GATE “H” ON Resistance R GATEH RGATEH = (VDD-VGATE) / IGATE 2 5 8 Ω ③ VISEN=1V, R1=300Ω GATE “L” ON Resistance R GATEL RGATEL= VGATE / IR1 (*8) - 5 - Ω ④ OFF Time (*9) t OFF V ISEN=0.4V, VSINE=1V - 6 - μs ① Minimum ON Time t ONMIN V ISEN=1V - 0.2 - μs ① Current Limit Voltage (*10) V LIM V ISEN=SWEEP, VSINE=1.4V 0.65 0.70 0.95 V ① Thermal Shutdown Temperature (*11) T TSD - 150 - o C ① Thermal Shutdown Release Temperature TTSDR - 130 - o C ① Thermal Shutdown Hysteresis Width THYS - 20 - o C ① PWM Dimmer Delay Time1 (*12) t PWMDIM1 V EN/DIM=2.2V to GND - 0.3 4.0 μs ② PWM Dimmer Delay Time2 (*13) t PWMDIM2 V EN/DIM=GND to 2.2V 100 140 200 μs ② EN/DIM “H” Voltage V EN/DIMH 2.2 - 15.0 V ① EN/DIM “L” Voltage V EN/DIML GND - 0.4 V ① EN/DIM Bias Current I EN/DIMH V EN/DIM=15V - - 32 μA ① Unless otherwise stated, GND standard, V DD=13V, VEN/DIM=VDD, VISEN=GND, VSINE=5.5V (*1) ISEN pin voltage measured at start of GATE pin switching. (*2) Indicates VSINE pin voltage at which OFF TIME 6μs switching becomes possible. (*3) VDD pin voltage measured when GATE pin=L occurs. (*4) VDD pin voltage measured when GATE pin=H occurs. (*5) Indicates internal supply current when “H” level is input into EN/DIM pin and all circuits are activated. (When not switching.) (*6) Indicates internal supply current when “L” level is input into EN/DIM pin and the switching circuit is stopped. (*7) Indicates the current that discharges the capacitance between the VDD and GND pins at VOVP. (*8) Please refer to P.7 “CIRCUIT④”. (*9) May not be fixed at 6μs when UVLO is detected or during DIM signal control. (*10) When the current limit voltage VLIM is exceeded, off time is extended to about 140μs to prevent element damage. For details, refer to the operation description. (*11) To protect the IC from thermal destruction, thermal shutdown activates when the chip temperature reaches 150 o C and forcibly sets the GATE pin voltage to “L”. When the chip temperature falls to 130 o C, operation resumes. (*12) Time from attainment of EN/DIM “L” voltage until GATE pin=L. (*13) Time from attainment of EN/DIM “H” voltage until GATE pin=H.
■ELECTRICAL CHARACTERISTICS (Continued) XC9401 Series, Type B Ta=25 o C PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS CIRCUIT VDD Voltage Range V DD 9 - 15 V ① ISEN Voltage V ISEN V ISEN=SWEEP (*1) 0.3259 0.3430 0.3602 V ① UVLO Detect Voltage V UVLO V DD=SWEEP (*2) 5.5 6.5 7.5 V ① UVLO Release Voltage V UVLOR V DD=SWEEP (*3) 6.5 7.5 8.5 V ① UVLO Hysteresis Width V UVLOH V UVLOH=VUVLOR - VUVLO - 1.1 - V ① Supply Current (*4) I DD V DD=VEN/DIM=15V - 250 300 μA ① Stand-by Current (*5) I STB V DD=15V, VEN/DIM=GND - 225 280 μA ① VDD Overvoltage Protection Voltage VOVP V DD=SWEEP (*2) 17 18 19 V ① VDD Overvoltage Protection Release Voltage VOVPR V DD=SWEEP (*3) 15.5 16.5 17.5 V ① VDD Overvoltage Protection Hysteresis Width VOVPH V OVPH=VOVP - VOVPR - 1.5 - V ① VDD Overvoltage Protection Discharge Current (*6) IOVP V DD=19V - 30 - mA ① IGATE = -10mA GATE “H” ON Resistance R GATEH RGATEH = (VDD - VGATE) / IGATE 2 5 8 Ω ③ VISEN=1V, R1=300Ω GATE “L” ON Resistance R GATEL RGATEL= VGATE / IR1 (*7) - 5 - Ω ④ OFF Time (*8) t OFF V ISEN=0.45V - 6 - μs ① Minimum ON Time t ONMIN V ISEN=1V - 0.2 - μs ① Current Limit Voltage (*9) V LIM V ISEN=SWEEP 0.65 0.70 0.95 V ① Thermal Shutdown Temperature (*10) T TSD - 150 - o C ① Thermal Shutdown Release Temperature TTSDR - 130 - o C ① Thermal Shutdown Hysteresis Width THYS - 20 - o C ① PWM Dimmer Delay Time1 (*11) t PWMDIM1 V EN/DIM=2.2V to GND - 0.3 4.0 μs ① PWM Dimmer Delay Time2 (*12) t PWMDIM2 V EN/DIM=GND to 2.2V 100 140 200 μs ② EN/DIM “H” Voltage V EN/DIMH 2.2 - 15.0 V ② EN/DIM “L” Voltage V EN/DIML GND - 0.4 V ① EN/DIM Bias Current I EN/DIMH V EN/DIM=15V - - 32 μA ① Unless otherwise stated, GND standard, VDD=13V, VEN/DIM=VDD, VISEN=GND, VSINE=5.5V (*1) ISEN pin voltage measured at start of GATE pin switching. (*2) Indicates VSINE pin voltage at which OFF TIME 6μs switching becomes possible. (*3) VDD pin voltage measured when GATE pin=L occurs. (*4) VDD pin voltage measured when GATE pin=H occurs. (*5) Indicates internal supply current when “H” level is input into EN/DIM pin and all circuits are activated. (When not switching.) (*6) Indicates internal supply current when “L” level is input into EN/DIM pin and the switching circuit is stopped. (*7) Indicates the current that discharges the capacitance between the VDD and GND pins at VOVP. (*8) Please refer to P.8 “CIRCUIT④”. (*9) May not be fixed at 6μs when UVLO is detected or during DIM signal control. (*10) When the current limit voltage VLIM is exceeded, off time is extended to about 140μs to prevent element damage. For details, refer to the operation description. (*11) To protect the IC from thermal destruction, thermal shutdown activates when the chip temperature reaches 150 o C and forcibly sets the GATE pin voltage to “L”. When the chip temperature falls to 130 o C, operation resumes. (*12) Time from attainment of EN/DIM “L” voltage until GATE pin=L. (*13) Time from attainment of EN/DIM “H” voltage until GATE pin=H.
■TYPICAL APPLICATION CIRCUIT (Type A) 2) CIRCUIT② ISEN VDD GATE VSINE GND EN/DIM V V A V V CVDDVDD VISEN PWM signal VSINEWaveform measure point ISEN VDD GATE VSINE GND EN/DIM V V A V V V SW1 CVDDVDD VISEN VCEDIM VSINEWaveform measure point A ISEN VDD GATE VSINE GND EN/DIM V VV V CVDDVDD VISEN VSINE IGATE ISEN VDD GATE VSINE GND EN/DIM V VV V CVDDVDD VISEN VSINEWaveform measure point A R1IR1 1) CIRCUIT① 3) CIRCUIT③ 4) CIRCUIT④
■TYPICAL APPLICATION CIRCUIT (Continued) (Type B) ISEN VDD GATE NF GND EN/DIM V V A V CVDDVDD VISEN PWM signalWaveform measure point ISEN VDD GATE NF GND EN/DIM V VV CVDDVDD VISEN IGATE ISEN VDD GATE NF GND EN/DIM V VV CVDDVDD VISEN Waveform measure point A R1IR1 ISEN VDD GATE NF GND EN/DIM V V A V V SW1 CVDDVDD VISEN VCEDIMWaveform measure point A 1) CIRCUIT① 2) CIRCUIT② 3) CIRCUIT③ 4) CIRCUIT④
■OPERATIONAL EXPLANATION The internal circuitry of the XC9401 series consists of a reference voltage source (VREF), PWM comparator (PWMCMP), buffer drive circuit (Buffer Drive), over-current protection circuit (Over Current Limit), under-voltage lockout circuit (UVLO), V DD over voltage protection circuit (OVP), thermal shutdown circuit (Thermal Shutdown), and other circuits. (Refer to the block diagram.) The control method is fixed off-time control. With type A, the PWM comparator compares the voltage at the I SEN pin to that at the V SINE pin x 0.2783 (TYP.) The output of the PWM comparator is connected to the buffer drive circuit and an external Power MOS FET drive signal is output from the GATE pin. When the I SEN pin voltage is 0.2783 times (TYP.) higher than the V SINE pin voltage, the GATE pin switches to low. After a fixed off-time elapses, the GATE pin switches to high. This operation is repeated continuously. With type B, the PWM comparator compares the 0.343V (TYP.), which is 0.2783 times (TYP.) the reference voltage, to the ISEN pin voltage. Fig.1. Reference Circuit
■OPERATIONAL EXPLANATION (Continued) Details of each circuit block are as follows. <Reference voltage supply (VREF)> Reference voltage that enables stable operation of the internal functions of the IC. <PWM comparator (PWMCMP)> With type A, the PWM comparator compares the voltage at the ISEN pin to that at the VSINE pin x 0.2783 (TYP.) When the I SEN pin voltage is higher than VSINE x 0.2783, the GATE pin switches to low. With type B, the PWM comparator compares the 0.343V (TYP.), which is 0.2783 times (TYP.) the reference voltage, to the ISEN pin voltage. <Buffer drive circuit (Buffer Drive)> This outputs an H or L signal from the GATE pin that drives the external Power MOS FET. The H level is the V DD pin voltage, and the L level is the GND pin voltage. The signal that is output is determined by the PWM comparator, as well as by the below described UVLO circuit, V DD over-voltage protection circuit, over-current prot ection circuit, thermal shutdown, and EN/DIM pin voltage. <Enable / PWM Dimming (EN/DIM)> When the power is turned on, it takes about 200 μs (MAX.) for the GATE pin to initially become “H” after the EN/DIM pin voltage is changed from “L” to “H”. Inputting “L” to the EN/DIM pin voltage forcibly puts the GATE pin voltage in the “L” state. The stopped state when the EN/DIM pin voltage is “L” is not shutdown; rather, it is a Stand-by state wherein the switching pulse output is stopped by logic circuit and the internal circuitry continues to operate. For this reason, a high-speed response is possible even when a pulse signal (500 Hz to 1 kHz) is input to the EN/DIM pin, and by adjusting the duty width of the PWM signal input into the EN/DIM pin, the LED can be dimmed. < Minimum on time controller circuit > Spike noise and ripple noise occur in the XC9401 series due to switching. To prevent malfunction of the internal circuit by such noises, a minimum on time is established. The GATE pin voltage is forcibly kept at “H” until the minimum on time elapses. (Refer to Fig. 2.) During the minimum on time, if the below described UVLO, OVP or thermal shutdown is detected, or if the Stand-by state is set from the EN/DIM pin, the GATE pin voltage is immediately changed to “L”. <Off Time Controller> This circuit controls the fixed off time . The off time is normally fixed at 6 μs (TYP.), and the GATE pin voltage is kept at “L” during this time. After the fixed off time, the GATE pin voltage becomes “H”. (Refer to Fig. 2.) If the EN/DIM pin voltage is changed from “L” to “H” during the above PWM dimming, the off time is 140μs (TYP.) during the over-current protection and ULVO release described below. Fig.2. Off Time Controller, Min. On Time Controller
■OPERATIONAL EXPLANATION (Continued) <Over Current Limit> When the switching current of the external power MOSFET is in the over-c urrent state and the ISEN pin voltage reaches 0.7V (TYP.), L level voltage is output to the GATE pin and the extern al power MOSFET is turned off. In addition, the off time is after the extended off time, normal operation resumes. When LED+ and LED- short circuit in the reference circuit shown in Fig.1, the current slope of the coil (L2) becomes smaller during the off time than the slope during normal switching, which prevents sufficient discharge during the 6.0μs (TYP.) off time. During the minimum on time, the external power MOSFET Q1 al ways turns on, and thus the coil current gradually increases. The ISEN pin voltage becomes higher at the same time as the coil current increa ses, and when the ISEN pin voltage reaches <Under-voltage lockout circuit> When the VDD pin voltage falls to the UVLO Detect Voltage (V UVLO) or lower, the GATE pin voltage is forcibly set to “L” to prevent incorrect pulse output. When the V DD pin voltage rises to the UVLO Release Voltage (V UVLOR) or higher, switching resumes. A UVLO stop simply stops pulse output; it is not a shutdown state and the internal circuitry continues to operate. <VDD over-voltage protection circuit> When the V DD pin voltage rises to the V DD Overvoltage Protection Voltage (V OVP) or higher, the charge of the capacitance between the VDD pin and GND pin is discharged by the resistance and transistor connected between the V DD pin and GND pin in order to prevent withstand voltage destruction in the internal circuitry. The GATE pin voltage at this time is forcibly set to “L”. When the V DD pin voltage falls to the VDD Overvoltage Protection Release Voltage (VOVPR) or lower, switching is resumed. <Thermal shutdown> To protect the IC from thermal destruction, thermal shutdown activates when the chip temperature reaches 150 oC (TYP.) and forcibly sets the GATE pin voltage to “L”. When the chip temperature falls to 130 oC (TYP.), switching is resumed. Fig.3. Over Current Limit (Fig.1. Operation when LED+ and LED- short-circuit in the reference circuit)
■NOTE ON USE 1. For the phenomenon of temporal and transitional voltage decrease or voltage increase, the IC may be damaged or deteriorated if IC is used beyond the absolute MAX. specifications. 2. In a switching controller such as the XC9401 series, and in a peripheral circuit controlled by a switching controller, spike voltage and ripple voltage occur. These are greatly affected by the peripheral components (inductance value of the coil, capacitors, peripheral component board layout). During design, test sufficiently using the actual equipment. 3. A delay time of 200μs (MAX.) after the UVLO release voltage, and after EN/DIM pin voltage “H”, has been established in the IC. Keep these delay times in mind during sequence design. 4. The NF pin of the XC9401B605MR-G is conn ected to part of the internal circuitry, although not as a circuit function. When using this IC, connect this pin to GND. 5. Make sure to use this IC within specified electric characteristics. 6. Please pay attention not to exceed absolute maximum ratings of this IC and external components. 7. To reduce V DD fluctuations as much as possible, connect a bypass capacitor (CVDD) over the shortest path between VDD and GND. If there is too much distance between the IC and CVDD, operation may become unstable. 8. Please mount each external component as close to the IC as possible. Please also wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit impedance. 9. Sufficiently reinforce the wiring between V DD and GND. Noise that enters through VDD and GND during switching may cause unstable IC operation. 10. Torex places an importance on improving our products and their reliability. We request that users incorporate fail-safe designs and post-aging protection treatment when using Torex products in their systems.
■ TYPICAL PERFORMANCE CHARACTERISTICS (1) Supply Current vs. V DD Voltage (2) Supply Current vs. Ambient Temperature (3) Stand-by Current vs. VDD Voltage (4) Stand-by Current vs. Ambient Temperature (6) EN/DIM Bias Current vs. Ambient Temperature (5) EN/DIM Bias Current vs. EN/DIM Voltage (7) ISEN Voltage vs. Ambient Temperature XC9401 100 150 200 250 300 1 3 5 7 9 1 11 31 5 VDD Voltage [V] Ta=-40℃ Ta=25℃ Ta=85℃ VEN D IM=VDD , VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) Supply Current [μA] XC9401 100 150 200 250 300 1 3 5 7 9 1 11 31 5 VDD Voltage [V] Ta=-40℃ Ta=25℃ Ta=85℃ VEND IM=GND, VISEN=GND VSINE=GND(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) Stand-by Current [μA] XC9401 13579 1 1 1 3 1 5 EN/DIM Voltage [V] Ta=-40℃ Ta=25℃ Ta=85℃ VDD =13V, ISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) EN/DIM Bias Current [μA] XC9401 200 220 240 260 280 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =15V, VEND IM=VDD , VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) Supply Current [μA] XC9401 180 200 220 240 260 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =15V, VE NDI M=GND, VISEN=GND VSIN E=0V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) Stand-by Current [μA] XC9401 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD =13V, VEN /D IM=13V, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) EN/DIM Bias Current [μA] XC9401A605MR 0.2450 0.2550 0.2650 0.2750 0.2850 0.2950 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VEND IM=VDD VSIN E=1.0V(Ty pe A) CVDD=10μF(TMK316BJ106KL-T) ISEN Voltage [V] XC9401B605MR 0.3350 0.3400 0.3450 0.3500 0.3550 0.3600 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VEN D IM=VDD VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) ISEN Voltage [V]
■ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (8) UVLO Detect Voltage vs. Ambient Temperature (9) UVLO Release Voltage vs. Ambient Temperature (10) UVLO Hysteresis Width vs. Ambient Temperature (11) VDD Overvoltage Protection Voltage vs. Ambient Temperature (12) VDD Overvoltage Protection Release Voltage vs. Ambient Temperature (13) VDD Overvoltage Protection Hysteresis Width (14) VDD Overvoltage Protection Discharge Current vs. Ambient Temperature XC9401 5.5 5.9 6.3 6.7 7.1 7.5 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VEND IM=VDD, VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) UVLO Detect Voltage [V] XC9401 6.5 6.9 7.3 7.7 8.1 8.5 -50 -25 0 25 50 75 100 125 Ambient Temperature : Ta [℃] VEN DIM=VDD, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) UVLO Release Voltage [V] XC9401 1.05 1.10 1.15 1.20 1.25 1.30 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VEND IM=VDD, VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) UVLO Hysteresis Width [V] XC9401 17.2 17.4 17.6 17.8 18.0 18.2 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD Overvoltage Protection Voltage [V] VEND IM=VDD, VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) XC9401 1.30 1.35 1.40 1.45 1.50 1.55 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD Overvoltage Protection Hysteresis Width [V] VEND IM=VDD, VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) XC9401 15.8 16.0 16.2 16.4 16.6 16.8 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD Overvoltage Protection Release Voltage [V] VEN DIM=VDD, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) XC9401 - 5 0 - 2 502 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD Overvoltage Protection Discharge Current [mA] VDD =19V, VEN DIM=VDD, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T)
■ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (15) GATE “H” ON Resistance vs. Ambient Temperature (16) GATE “L” ON Resistance vs. Ambient Temperature (17) OFF Time vs. Ambient Temperature (18) Minimum ON Time vs. Ambient Temperature (19) Current Limit Voltage vs. Ambient Temperature (20) PWM Dimmer Delay Time1 vs. Ambient Temperature (21) PWM Dimmer Delay Time2 vs. Ambient Temperature XC9401 2.0 3.0 4.0 5.0 6.0 7.0 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VE NDI M=VDD , IGATE=-10m A, VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) GATE “H” ON Resistance [Ω] XC9401 2.0 3.0 4.0 5.0 6.0 7.0 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VEN DIM=VDD , R1=300Ω, VISEN=1.0V VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) GATE “L” ON Resistance [Ω] XC9401 5.0 5.5 6.0 6.5 7.0 - 5 0- 2 5 0 2 5 5 0 7 51 0 0 Ambient Temperature : Ta [℃] VEN DIM=VDD, VISEN=0.4V(Type A) or 0.45V(Type B) VSINE=1.0V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) OFF Time [μs] XC9401 0.14 0.16 0.18 0.20 0.22 - 5 0 - 2 502 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VEND IM=VDD, VISEN=1.0V VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) Minimum ON Time [μs] XC9401 0.65 0.70 0.75 0.80 0.85 0.90 0.95 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VEND IM=VDD, VISEN=GND VSINE=1.4V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) Current Limit Voltage [V] XC9401 0.20 0.25 0.30 0.35 0.40 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD =13V, VEN /D IM=2.2V to GND , VISEN=GND VSINE=5.5V(Type A) or VNF=GND(Ty pe B) CVDD=10μF(TMK316BJ106KL-T) PWM Dimmer Delay Time1 [μs] XC9401 100 120 140 160 180 - 5 0 - 2 50 2 55 07 5 1 0 0 Ambient Temperature : Ta [℃] VDD =13V, VEN /D IM=GND to 2.2V , VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Ty pe B) CVD D=10μF(TMK316BJ106KL-T) PWM Dimmer Delay Time2 [μs]
■ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (22) EN/DIM “H” Voltage vs. Ambient Temperature (23) EN/DIM “L” Voltage vs. Ambient Temperature XC9401 1.20 1.30 1.40 1.50 1.60 1.70 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Type B) CVD D=10μF(TMK316BJ106KL-T) EN/DIM “H” Voltage [V] XC9401 0.50 0.60 0.70 0.80 0.90 1.00 -50 -25 0 25 50 75 100 Ambient Temperature : Ta [℃] VDD =13V, VISEN=GND VSIN E=5.5V(Type A) or VNF=GND(Type B) CVD D=10μF(TMK316BJ106KL-T) EN/DIM “L” Voltage [V]
■PACKAGING INFORMATION
- SOT-26 (unit: mm) 1 3 2.9±0.2 0.4 +0.1 -0.05 0.15 +0.1 -0.05 0~0.1 6 4 (0.95) (0.95) 0.4 +0.1 -0.05 1234
■MARKING RULE
- SOT-26 ① represents product series ②③ represents product type ④⑤ represents production lot number 01~09, 0A~0Z, 11~9Z, A1~A9, AA~AZ, B1~ZZ in order. ( G , I , J , O , Q , W e x c l u d e d ) *No character inversion used. MARK PRODUCT SERIES MARK ② ③ PRODUCT SERIES A A XC9401A605-G B A XC9401B605-G 1 2 3 6 4 ① ② ③ ④ ⑤
- The products and product specifications cont ained herein are subject to change without notice to improve performance characteristic s. Consult us, or our representatives before use, to confirm that the information in this datasheet is up to date. 2. We assume no responsibility for any infri ngement of patents, pat ent rights, or other rights arising from the use of any information and circuitry in this datasheet. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this datasheet. 4. The products in this datasheet are not devel oped, designed, or approved for use with such equipment whose failure of malfuncti on can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transpor t; combustion and associated safety equipment thereof.) 5. Please use the products listed in this datasheet within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this dat asheet may be copied or reproduced without the prior permission of TOREX SEMICONDUCTOR LTD.