XC6101A042

Torex Semiconductor

CMOS Voltage Detector

Manufacturer: Torex Semiconductor

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XC6101_07_XC6111_17 ETR0207_009 Preliminary ◆CMOS Voltage Detector ◆Manual Reset Input ◆Watchdog Functions ◆Built-in Delay Circuit ◆Detect Voltage Range: 1.6~5.0V, ± 2% ◆Reset Function is Selectable VDFL (Low When Detected) VDFH (High When Detected) ■GENERAL DESCRIPTION The XC6101~XC6107, XC6111~XC6117 series are groups of high-precision, low current consumption voltage detectors with manual reset input function and watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit, comparator, and output driver. With the built-in delay circuit, the XC6101 ~ XC6107, XC6111 ~ XC6117 series’ ICs do not require any external components to output signals with release delay time. Moreover, with the manual reset function, reset can be asserted at any time. The ICs produce two types of output; V DFL (low when detected) and V DFH (high when detected). With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’ ICs, the WD pin can be left open if the watchdog function is not used. Whenever the watchdog pin is opened, the internal counter clears before the watchdog timeout occurs. Since the manual reset pin is internally pulled up to the V IN pin voltage level, the ICs can be used with the manual reset pin left unconnected if the pin is unused. The detect voltages are internally fixed 1.6V ~ 5.0V in increments of 100mV, using laser trimming technology. Six watchdog timeout period settings are available in a range from 6.25msec to 1.6sec. Seven release delay time 1 are available in a range from 3.13msec to 1.6sec. ■APPLICATIONS

Microprocessor reset circuits
Memory battery backup circuits
System power-on reset circuits
Power failure detection ■TYPICAL APPLICATION CIRCUIT * Not necessary with CMOS output products. ■FEATURES Detect Voltage Range : 1.6V ~ 5.0V, +2% (100mV increments) Hysteresis Range : VDF x 5%, TYP. (XC6101~XC6107) V DF x 0.1%, TYP. (XC6111~XC6117) Operating Voltage Range : 1.0V ~ 6.0V Detect Voltage Temperature Characteristics : +100ppm/ O C (TYP.) Output Configuration : N-channel open drain, CMOS Watchdog Pin : Watchdog input If watchdog input maintains ‘H’ or ‘L’ within the watchdog timeout period, a reset signal is output to the RESET output pin Manual Reset Pin : When driven ‘H’ to ‘L’ level signal, the MRB pin voltage asserts forced reset on the output pin. Release Delay Time : 1.6sec, 400msec, 200msec, 100msec, 50msec, 25msec, 3.13msec (TYP .) can be selectable. Watchdog Timeout Period : 1.6sec, 400msec, 200msec, 100msec, 50msec, 6.25msec (TYP .) can be selectable. ■TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs. Input Voltage * ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111) 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) XC61X1~ XC61X5 (2. 7V ) Ta=85℃ Ta=-40℃ Ta=25℃

XC6101~XC6107, XC6111~XC6117 Series PIN NUMBER XC6101, XC6102 XC6103 XC6104, XC6105 XC6106, XC6107 XC6111, XC6112 XC6113 XC6114, XC6115 XC6116, XC6117 SOT-25 USP-6C SOT-25 USP-6C SOT-25 USP-6C SOT-25 USP-6C PIN NAME FUNCTION 1 4 - - 1 4 1 4 RESETB Reset Output (VDFL: Low Level When Detected) 2 5 2 5 2 5 2 5 VSS Ground 3 2 3 2 - - 4 1 M RB Manual Reset 4 1 4 1 4 1 - - WD Watchdog 5 6 5 6 5 6 5 6 V IN Power Input - - 1 4 3 2 3 2 RESET Reset Output (VDFH: High Level When Detected) ■PIN CONFIGURATION SOT-25 (TOP VIEW) MRB VIN WD RESETB VSS 12 3 MRB WD RESET VSS 12 3 VIN RESET WD RESETB VSS 12 3 VIN SOT-25 (TOP VIEW) RESET MRB RESETB VSS 12 3 VIN SOT-25 (TOP VIEW) ■PIN ASSIGNMENT

SOT-25 XC6101, XC6102 Series XC6111, XC6112 Series SOT-25 (TOP VIEW) XC6103 & XC6113 Series XC6104, XC6105 Series XC6114, XC6115 Series XC6106, XC6107 Series XC6116, XC6117 Series
USP-6C XC6101, XC6102 Series XC6111, XC6112 Series XC6103 & XC6113 Series XC6104, XC6105 Series XC6114, XC6115 Series XC6106, XC6107 Series XC6116, XC6117 Series USP-6C (BOTTOM VIEW) USP-6C (BOTTOM VIEW) USP-6C (BOTTOM VIEW) USP-6C (BOTTOM VIEW) * The dissipation pad for the USP-6C package should be solder-plated in recommended mount pattern and metal masking so as to enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to the V SS pin.

XC6101 ~ XC6107, XC6111~ XC6117 Series RESET OUTPUT SERIES WATCHDOG MANUAL RESET VDFL (RESETB) VDFH (RESET) XC6101 XC6111 Available Available CMOS - XC6102 XC6112 Available Available N-channel open drain - XC6103 XC6113 Available Available - CMOS XC6104 XC6114 Available Not Available CMOS CMOS XC6105 XC6115 Available Not Available N-channel open drain CMOS XC6106 XC6116 Not Available Available CMOS CMOS XC6107 XC6117 Not Available Available N-channel open drain CMOS DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION 0 : V DF x 5% (TYP.) with hysteresis ① Hysteresis Range 1 : V DF x 0.1% (TYP.) without hysteresis Functions and Type of Reset Output 1 ~ 7 : Watchdog and manual functions, and reset output type as per Selection Guide in the above chart A : 3.13msec (TYP.) B : 25msec (TYP .) C : 50msec (TYP .) D : 100msec (TYP.) E : 200msec (TYP.) F : 400msec (TYP.) ③ Release Delay Time * H : 1.6sec (TYP.) 0 : No WD timeout period for XC6106, XC6107, XC6116, XC6117 Series 1 : 6.25msec (TYP.) 2 : 50msec (TYP .) 3 : 100msec (TYP.) 4 : 200msec (TYP.) 5 : 400msec (TYP.) ④ Watchdog Timeout Period 6 : 1.6sec (TYP.) ⑤⑥ Detect Voltage 16 ~ 50 : Detect voltage M : SOT-25 ⑦ Package E : USP-6C R : Embossed tape, standard feed ⑧ Device Orientation L : Embossed tape, reverse feed * Please set the release delay time shorte r than or equal to the watchdog timeout period. ex.) XC6101D427MR or XC6101D327MR ■PRODUCT CLASSIFICATION

Selection Guide
Ordering Information XC61①②③④⑤⑥⑦⑧

XC6101~XC6107, XC6111~XC6117 Series ■PACKAGING INFORMATION

S O T - 2 5
USP-6C

XC6101 ~ XC6107, XC6111~ XC6117 Series ① Represents product series MARK PRODUCT SERIES MARK PRODUCT SERIES

0 XC6101xxxxxx 7 XC6111xxxxxx

1 XC6102xxxxxx 8 XC6112xxxxxx

2 XC6103xxxxxx 9 XC6113xxxxxx

3 XC6104xxxxxx A XC6114xxxxxx

4 XC6105xxxxxx B XC6115xxxxxx

5 XC6106xxxxxx C XC6116xxxxxx

6 XC6107xxxxxx D XC6117xxxxxx

② Represents release delay time and watchdog timeout period MARK RELEASE DELAY TIME WATCH DOG TIMEOUT PERIOD PRODUCT SERIES MARK RELEASE DELAY TIME WATCH DOG TIMEOUT PERIOD PRODUCT SERIES A 3.13msec XC61X6, XC61X7 series XC61xxA0xxxx E 50msec 400msec XC61xxC5xxxx 0 3.13msec 6.25msec XC61xxA1 xxxx F 50msec 1.6sec XC61xxC6xxxx 1 3.13msec 50msec XC61xxA2xxxx D 100msec XC61X6, XC61X7 series XC61xxD0xxxx 2 3.13msec 100msec XC61xxA3xxxx H 100msec 100msec XC61xxD3xxxx 3 3.13msec 200msec XC61xxA4xxxx K 100msec 200msec XC61xxD4xxxx 4 3.13msec 400msec XC61xxA5xxxx L 100msec 400msec XC61xxD5xxxx 5 3.13msec 1.6sec XC61xxA6xxxx M 100msec 1.6sec XC61xxD6xxxx B 25msec XC61X6, XC61X7 series XC61xxB0xxxx E 200msec XC61X6, XC61X7 series XC61xxE0xxxx 6 25msec 50msec XC61xxB2xxxx P 200msec 200msec XC61xxE4xxxx 7 25msec 100msec XC61xxB3xxxx R 200msec 400msec XC61xxE5xxxx 8 25msec 200msec XC61xxB4xxxx S 200msec 1.6sec XC61xxE6xxxx 9 25msec 400msec XC61xxB5xxxx F 400msec XC61X6, XC61X7 series XC61xxF0xxxx A 25msec 1.6sec XC61xxB6xxxx T 400msec 400msec XC61xxF5xxxx C 50msec XC61X6, XC61X7 series XC61xxC0xxxx U 400msec 1.6sec XC61xxF6xxxx B 50msec 50msec XC61xxC2xxxx H 1.6sec XC61X6, XC61X7 series XC61xxH0xxxx C 50msec 100msec XC61xxC3xxxx V 1.6sec 1.6sec XC61xxH6xxxx D 50msec 200msec XC61xxC4xxxx ③ Represents detect voltage MARK DETECT VOLTAGE PRODUCT SERIES MARK DETECT VOLTAGE PRODUCT SERIES F 1.6 XC61Xxxx16xx 3 3.4 XC61Xxxx34xx H 1.7 XC61Xxxx17xx 4 3.5 XC61Xxxx35xx K 1.8 XC61Xxxx18xx 5 3.6 XC61Xxxx36xx L 1.9 XC61Xxxx19xx 6 3.7 XC61Xxxx37xx M 2.0 XC61Xxxx20xx 7 3.8 XC61Xxxx38xx N 2.1 XC61Xxxx21xx 8 3.9 XC61Xxxx39xx P 2.2 XC61Xxxx22xx 9 4.0 XC61Xxxx40xx R 2.3 XC61Xxxx23xx A 4.1 XC61Xxxx41xx S 2.4 XC61Xxxx24xx B 4.2 XC61Xxxx42xx T 2.5 XC61Xxxx25xx C 4.3 XC61Xxxx43xx U 2.6 XC61Xxxx26xx D 4.4 XC61Xxxx44xx V 2.7 XC61Xxxx27xx E 4.5 XC61Xxxx45xx X 2.8 XC61Xxxx28xx F 4.6 XC61Xxxx46xx Y 2.9 XC61Xxxx29xx H 4.7 XC61Xxxx47xx Z 3.0 XC61Xxxx30xx K 4.8 XC61Xxxx48xx 0 3.1 XC61Xxxx31xx L 4.9 XC61Xxxx49xx 1 3.2 XC61Xxxx32xx M 5.0 XC61Xxxx50xx 2 3.3 XC61Xxxx33xx ④ Represents production lot number 0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W expected.) * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) ■MARKING RULE

SOT-25 ①②③④ SOT-25 (TOP VIEW)

XC6101~XC6107, XC6111~XC6117 Series ① Represents product series ② Represents release delay time MARK RELEASE DELAY TIME PRODUCT SERIES A 3.13msec XC61XxAxxxxx B 25msec XC61XxBxxxxx C 50msec XC61XxCxxxxx D 100msec XC61XxDxxxxx E 200msec XC61XxExxxxx F 400msec XC61XxFxxxxx H 1.6sec XC61XxHxxxxx ③ Represents watchdog timeout period MARK WATCHDOG TIMEOUT PERIOD PRODUCT SERIES

0 XC61X6, XC61X7 series XC61Xxx0xxxx

1 6.25msec XC61Xxx1xxxx 2 50msec XC61Xxx2xxxx 3 100msec XC61Xxx3xxxx 4 200msec XC61Xxx4xxxx 5 400msec XC61Xxx5xxxx 6 1.6sec XC61Xxx6xxxx ④⑤ Represents detect voltage MARK ④ ⑤ DETECT VOLTAGE (V) PRODUCT SERIES 3 3 3.3 XC61Xxxx33xx 5 0 5.0 XC61Xxxx50xx ⑥ Represents production lot number 0 to 9 and A to Z repeated. (G, I, J, O, Q, W excepted.) * N o c h a r a c t e r i n v e r s i o n u s e d . ** ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) MARK PRODUCT SERIES MARK PRODUCT SERIES

3 XC6101xxxxxx 8 XC6111xxxxxx

4 XC6102xxxxxx 9 XC6112xxxxxx

5 XC6103xxxxxx A XC6113xxxxxx

6 XC6104xxxxxx B XC6114xxxxxx

7 XC6105xxxxxx C XC6115xxxxxx

3 XC6106xxxxxx 8 XC6116xxxxxx

4 XC6107xxxxxx 9 XC6117xxxxxx

■MARKING RULE (Continued)

USP-6C USP-6C (TOP VIEW)

XC6101 ~ XC6107, XC6111~ XC6117 Series ■BLOCK DIAGRAMS

XC6101, XC6111 Series
XC6102, XC6112 Series
XC6103, XC6113 Series

XC6101~XC6107, XC6111~XC6117 Series ■BLOCK DIAGRAMS (Continued)

XC6107, XC6117 Series
XC6106, XC6116 Series
XC6105, XC6115 Series
XC6104, XC6114 Series

XC6101 ~ XC6107, XC6111~ XC6117 Series PARAMETER SYMBOL RATINGS UNITS VIN V SS -0.3 ~ 7.0 V MRB V SS -0.3 ~ VIN +0.3 V Input Voltage WD V SS -0.3 ~ 7.0 V Output Current I OUT 20 mA CMOS Output RESETB/RESET V SS -0.3 ~ VIN +0.3 Output Voltage N-ch Open Drain Output RESETB V SS -0.3 ~ 7.0 V SOT-25 250 Power Dissipation USP-6C Pd 100 mW Operational Temperature Range Topr -40 ~ +85 OC Storage Temperature Range Tstg -40 ~ +125 OC ■ABSOLUTE MAXIMUM RATINGS Ta = 25OC

XC6101~XC6107, XC6111~XC6117 Series NOTE: *1: XC6101~XC6107 (with hysteresis) *2: XC6111~XC6117 (without hysteresis) *3: ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) *4: VDF(T): Setting detect voltage *5: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected). PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNITS CIRCUIT Detect Voltage VDFL VDFH VDF(T) × 0.98 VDF(T) VDF(T) × 1.02 V 1 Hysteresis Range XC6101~XC6107 (*1) VHYS VDF × 0.02 VDF × 0.05 VDF × 0.08 V 1 Hysteresis Range XC6111~XC6117 (*2) VHYS 0 VDF × 0.001 VDF x 0.01 V 1 VIN=VDF(T)×0.9V - 5 11 VIN=VDF(T)×1.1V - 10 16 XC61X1/XC61X2/XC61X3 XC61X4/XC61X5 (*3) (The MRB & the WD Pin: No connection) VIN=6.0V - 12 18 VIN=VDF(T)×0.9V - 4 10 VIN=VDF(T)×1.1V - 8 14 Supply Current I SS XC61X6/XC61X7 (*3) (The MRB Pin: No connection) VIN=6.0V - 10 16 µA 2 Operating Voltage V IN 1.0 - 6.0 V 1 VIN=2.0V (VDFL(T)> 2.0V) 2.0 2.5 - VIN=3.0V (VDFL(T) >3.0V) 3.0 3.5 - N-ch. VDS = 0.5V VIN=4.0V (VDFL(T) >4.0V) 3.5 4.0 -

3 VDFL

(RESETB) IRBOUT CMOS, P-ch VDS = 0.5V mA N-ch VDS = 0.5V VIN=6.0V 4.4 4.9 - 3 VIN=2.0V (VDFH(T)> 2.0V) - - 0.50 - 0.30 VIN=3.0V (VDFH(T)>3.0V) - - 0.75 - 0.55 VDFH Output Current (RESET) IROUT P-ch. VDS = 0.5V VIN=4.0V (VDFH(T)>4.0V) - - 0.95 - 0.75 mA Temperature Characteristics △VDF / △Topr・VDF -40OC < Topr < 85 OC - + 100 - ppm / OC 1 2 3.13 5 13 25 38 25 50 75 60 100 140 120 200 280 240 400 560 Release Delay Time (VDF<1.8V) TDR Time until VIN is increased from 1.0V to 2.0V and attains to the release time level, and the Reset output pin inverts. 960 1600 2240 ms 5 2 3.13 5 13 25 38 25 50 75 60 100 140 120 200 280 240 400 560 Release Delay Time (VDF>1.9V) TDR Time until VIN is increased from 1.0V to (VDFx1.1V) and attains to the release time level, and the Reset output pin inverts. 960 1600 2240 ms 5 Detect Delay Time T DF Time until VIN is decreased from 6.0V to 1.0V and attains to the detect voltage level, and the Reset output pin detects while the WD pin left opened. - 3 30 µs 5 VDFL/VDFH CMOS Output Leak Current ILEAK VIN=6.0V, RESETB=6.0V (VDFL) VIN=6.0V, RESET=0V (VDFH) - 0.01 - µA 3 VDFL N-ch Open Drain Output Leak Current ILEAK V IN=6.0V, RESETB=6.0V - 0.01 0.10 µA 3 ■ELECTRICAL CHARACTERISTICS

XC6101~XC6107, XC6111~XC6117 Series Ta = 25 O C

XC6101 ~ XC6107, XC6111~ XC6117 Series PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNITS CIRCUIT 3.13 6.25 9.38 25 50 75 60 100 140 120 200 280 240 400 560 Watchdog Timeout Period (VDF<1.8V) TWD Time until VIN increases form 1.0V to 2.0V and the Reset output pin is released to go into the detection state. (WD=VSS) 960 1600 2240 ms 6 3.13 6.25 9.38 25 50 75 60 100 140 120 200 280 240 400 560 Watchdog Timeout Period (VDF>1.9V) TWD Time until VIN increases form 1.0V to (VDFx1.1V) and the Reset output pin is released to go into the detection state. (WD=VSS) 960 1600 2240 ms 6 Watchdog Minimum Pulse Width TWDIN VIN=6.0V, Apply pulse from 6.0V to 0V to the WD pin. 300 - - ns 7 Watchdog High Level Voltage VWDH V IN=VDF x 1.1V ~ 6.0V V IN x 0.7 - 6 V 7 Watchdog Low Level Voltage VWDL VIN=VDF x 1.1V ~ 6.0V 0 - VIN x 0.3 V 7 VIN=6.0V, VWD=6.0V (Avg. when peak ) - 12 19 Watchdog Input Current IWD VIN=6.0V, VWD=0V (Avg. when peak) - 19 -12 - µA 8 Watchdog Input Resistance RWD VIN=6.0V, VWD=0V, RWD=VIN/ |IWD| 315 500 880 kΩ 8 PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNITS CIRCUIT MRB High Level Voltage VMRH V IN=VDFx1.1V ~ 6.0V 1.4 - V IN 9 MRB Low Level Voltage VMRL V IN=VDFx1.1V ~ 6.0V 0 - 0.35 V MRB Pull-up Resistance RMR V IN=6.0V, MRB=0V, RMR=VIN/ |IMRB| 1.6 2.4 3.0 M Ω 10 MRB Minimum Pulse Width (*3) XC6101~XC6105 XC6111~XC6115 TMRIN VIN=6.0V, Apply pulse from 6.0V to 0V to the MRB pin 2.8 - - MRB Minimum Pulse Width (*4) XC6106, XC6107 XC6116, XC6117 TMRIN VIN=6.0V, Apply pulse from 6.0V to 0V to the MRB pin 1.2 - - µs 11

XC6101 ~ XC6103, XC6106 ~ XC6107, XC6111 ~ XC6113, XC6116 ~ XC6117 Series NOTE: * 1 : VDF(T): Setting detect voltage *2: If only “V DF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected). *3: Watchdog function is available. *4: Watchdog function is not available. Ta = 25OC Ta = 25OC ■ELECTRICAL CHARACTERISTICS (Continued)
XC6101~XC6105, XC6111~XC6115 Series

XC6101~XC6107, XC6111~XC6117 Series ■OPERATIONAL EXPLANATION The XC6101~XC6107, XC6111~XC6117 series compare, using the error amplifier, the voltage of the internal voltage reference source with the voltage divided by R1, R2 and R3 connected to the V IN pin. The resulting output signal from the error amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the V IN pin voltage gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the VDFL type ICs, and the RESET pin output goes from low to high in the case of the VDFH type ICs. <RESETB / RESET Pin Output Signal> * V DFL (RESETB) type - output signal: Low when detected. The RESETB pin output goes from high to low whenever the V IN pin voltage falls below the detec t voltage, or whenever the MRB pin is driven from high to low. The RESET B pin remains low for the release delay time (T DR) after the VIN pin voltage reaches the release voltage. If neither rising nor falling sig nals are applied to the WD pin within the watchdog timeout period, the RESETB pin output remains low for the release delay time (TDR), and thereafter the RESET pin outputs high level signal. * V DFH (RESET) type – output signal: High when detected. The RESET pin output goes from low to high whenever the V IN pin voltage falls below the detect voltage, or whenever the MRB pin is driven from high to low. The RESET pin remains high for the release delay time (T DR) after the V IN pin voltage reaches the release voltage. If neither rising nor falling sig nals are applied to the WD pin within the watchdog timeout period, the VOUT pin output remains high for the release delay time (TDR), and thereafter the RESET pin outputs low level signal. <Hysteresis> When the internal comparator output is high , the NMOS transistor connected in paral lel to R3 is turned ON, activating the hysteresis circuit. The difference between the release and detect voltages represents the hysteresis range, as shown by the following calculations: V DF (detect voltage) = (R1+R2+R3) x Vref(R2+R3) VDR (release voltage) = (R1+R2) x Vref(R2) VHYS (hysteresis range)=VDR-VDF (V) VDR > VDF * D e t e c t v o l t a g e ( VDF) includes conditions of both VDFL (low when detected) and VDFH (high when detected). * Please refer to the block diagrams for R1, R2, R3 and Vref. Hysteresis range is selectable from VDF x 0.05V (XC6101~XC6107) or VDF x 0.001V (XC6111~XC6117). <Watchdog (WD) Pin> The XC6101~XC6107, XC6111~XC6117 series use a watch dog timer to detect malfunction or “runaway” of the microprocessor. If neither rising nor falling signals are appli ed from the microprocessor within the watchdog timeout period, the RESETB/RESET pin output main tains the detection state fo r the release delay time (T DR), and thereafter the RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog is then restarted . Six watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec, 6.25msec. <MRB Pin> Using the MRB pin input, the RESET/RESETB pin signal can be forc ed to the detection state. When the MRB pin is driven from high to low, the RESETB pin output goes from high to low in the case of the V DFL type ICs, and the RESET pin output goes from low to high in the case of the V DFH type. Even after the MRB pin is driven back high, the RESET/RESETB pin output maintains the detection state for the release delay time (TDR). Since the MRB pin is internally pulled up to the V IN pin voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode, which is an input protection element, is connected between the MRB pin and VIN pin. Therefore, if the MRB pi n is applied voltage that exceeds VIN, the current will flow to VIN through the diode. Please use this IC within the stated maximum ratings (V SS -0.3 ~ VIN +0.3) on the MRB pin. <Release Delay Time> Release delay time (T DR) is the time that elapses from when the V IN pin reaches the release vo ltage, or when the watchdog timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the detection state. Seven release delay time (T DR) watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec, 25msec, 3.13msec. <Detect Delay Time> Detect Delay Time (T DF) is the time that elapses from when the V IN pin voltage falls to the det ect voltage until the RESET/ RESETB pin output goes into the detection state.

XC6101 ~ XC6107, XC6111~ XC6117 Series ■TIMING CHARTS

CMOS Output
TDF (CMOS Output) VIN Pin Wave FormVIN VDFL Level TDF GND VIN Level VDFL Level 6.0V GND 1.0V 0.6VVIN x 0.1V RESETB Pin Wave Form (VDFL)

XC6101~XC6107, XC6111~XC6117 Series ■NOTES ON USE 1. Please use this IC within the stated maximum ratings. O peration beyond these limits may cause degrading or permanent damage to the device. 2. When a resistor is connected between the V IN pin and the input, the V IN voltage drops while the IC is operating and a malfunction may occur as a result of the IC’s through current. For the CMOS output products, the V IN voltage drops while the IC is operating and malfunction may occur as a result of the IC’s output current. Please be careful with using the XC6111~XC6117 series (without hysteresis). 3. In order to stabilize the IC’s operations, please ensure that the V IN pin’s input frequency’s rise and fall times are more than 1 µ sec/V. 4. Noise at the power supply may cause a malfunction of the watchdog operation or the circuit. In such case, please strength the line between VIN and the GND pin and connect about 0.22µF of a capacitor between the VIN pin and the GND pin. 5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900µsec at maximum. GND GND GND TWD No reaction time (MAX 900usec) TDR VIN Pin Wave Form TDR TWD No reaction time (MAX 900usec) WD Pin Wave Form RESETB Pin Wave Form (VDFL)

XC6101 ~ XC6107, XC6111~ XC6117 Series PIN NAME LOGIC CONDITIONS H V IN>VDF+VHYS VIN L V IN<VDF H MRB> 1.40V MRB L MRB< 0.35V H When keeping W D>VWDH more than TWD L When keeping W D<VWDL more than TWD L → H V WDL → V WDH, TWDIN>300nsec WD H → L V WDH →VWDH, TWDIN>300nsec VIN MRB WD RESETB (*2) H H H L Repeat detect and release (H→L→H) H Open H L → H H H or Open H → L H H L L *1 L VIN MRB WD RESETB (*3) H H H L Repeat detect and release (L→H→L) H Open H L → H H H or Open H → L L H L L *1 H VIN WD RESETB (*2) RESET (*3) H H H L Repeat detect and release (H→L→H) Repeat detect and release (L →H→L) H Open H L → H H H → L H L H L *1 L H VIN MRB RESETB (*2) RESET (*3) H H or Open H L H L L L H ■PIN LOGIC CONDITIONS NOTE: *1: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected). *2: For the details of each parameter, please see the electrical characteristics. VDF: Detect Voltage VHYS: Hysteresis Range VWDH: WD High Level Voltage VWDL: WD Low Level Voltage TWDIN: WD Pulse Width TWD: WD Timeout Period ■FUNCTION CHART

XC6103/XC61113 Series
XC6104/XC61114, XC6105/XC6115 Series
XC6106/XC61116, XC6107/XC6117 Series
XC6101/XC61111, XC6102/6112 Series *1: Including all logic of WD (WD=H, L, L→H, H→L, OPEN). *2: When the RESETB is High, the circuit is in the release state. When the RESETB is Low, the circuit is in the detection state. *3: When the RESET is High, the circuit is in the release state. When the RESET is Low, the circuit is in the detection state. *4: VIN=L and MRB=H can not be combined for the rated input voltage of the MRB pin is Vss-0.3V to VIN+0.3V. *5: The RESET/RESETB pin becomes indefinite operation while 0.35V<MRB<1.4V.

XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS Circuit 1 Circuit 2 Circuit 3 Circuit 4

XC6101 ~ XC6107, XC6111~ XC6117 Series ■TEST CIRCUITS (Continued) Circuit 5 Circuit 6 Circuit 7

XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS (Continued) Circuit 8 Circuit 9 Circuit 10 Circuit 11

XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (1.1) Supply Current vs. Input Voltage * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) (1.2) Supply Current vs. Input Voltage 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) XC61X1~XC61X5 (1.6V) Ta=85℃ Ta=-40℃ Ta=25℃ 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) XC61X1~XC61X5 (2.7V) Ta=85℃ Ta=-40℃ Ta=25℃ 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) Ta=85℃ Ta=-40℃ Ta=25℃ XC61X1~ XC61X5 (5. 0V ) 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) XC61X6~XC61X7 (1.6V) Ta=85℃ Ta=-40℃ Ta=25℃ 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) XC61X6~XC61X7 (2.7V) Ta=85℃ Ta=-40℃ Ta=25℃

XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (2) Detect, Release Voltage vs. Ambient Temperature * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) (1.2) Supply Current vs. Input Voltage (Continued) 0123456 Input Voltage: VIN (V) Supply Current: ISS (µA) Ta=85℃ Ta=-40℃ Ta=25℃ XC61X6~XC61X7 (5.0V) 1.55 1.60 1.65 1.70 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) Detect, Release Voltage: VDF,VDR (V) XC61X1~XC61X7 (1.6V) VDR VDF 2.60 2.70 2.80 2.90 - 5 0 - 2 5 0 2 55 07 5 1 0 0 Ambient Temperature: Ta ( ℃) Detect, Release Voltage: VDF,VDR (V) XC61X1~XC61X7 (2.7V) VDF VDR 4.90 5.00 5.10 5.20 5.30 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) Detect, Release Voltage: VDF,VDR (V) VDR VDF XC61X1~XC61X7 (5.0V)

XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (3-1) Output Voltage vs. Input Voltage (VDFL) * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) (3.1) Detect, Release Voltage vs. Input Voltage (VDFL) (3.2) Detect, Release Voltage vs. Input Voltage (VDFH) 0.0 0.5 1.0 1.5 2.0 012 Input Voltage: VIN (V) Detect, Release Voltage:VDFL,VDR(V) XC6101~XC6107 (1.6V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↓：VDF ↑：VDR 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0123 Input Voltage: VIN (V) Detect, Release Voltage:VDFL,VDR(V) XC6101~XC6107 (2.7V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↓：VDF ↑：VDR 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0123456 Input Voltage: VIN (V) Detect, Release Voltage:VDFL,VDR(V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↓：VDF ↑：VDR XC6101~XC6107 (5.0V) 0.0 0.5 1.0 1.5 2.0 012 Input Voltage: VIN (V) Detect,Release Voltage:VDR,VDFH(V) XC6103~XC6107 (1.6V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↑：VDF ↓：VDR 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0123 Input Voltage: VIN (V) Detect,Release Voltage:VDR,VDFH(V) XC6103~XC6107 (2.7V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↑：VDF ↓：VDR

XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (4) N-ch Driver Output Current vs. VDS (5) N-ch Driver Output Current vs. Input Voltage * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) (3.2) Detect, Release Voltage vs. Input Voltage (VDFH) (Continued) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0123456 Input Voltage: VIN (V) Detect,Release Voltage:VDR,VDFH(V) Rpull:100k Ω Ta=-40℃ 25℃ 85℃ ↑：VDF ↓：VDR XC6103~XC6107 (5.0V) 0123 VDS (V) Output Current: IOUT (mA) XC61X1~XC61X7 Ta=25℃ VIN=1.0V VIN=2.0V 0123456 VDS (V) Output Current: IOUT (mA) XC61X1~XC61X7 Ta=25℃ VIN=4.0V VIN=3.0V 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0123456 Input Voltage: VIN (V) Output Current: IOUT (mA) Ta=85℃ Ta=25℃ Ta=-40℃VDS=0.5V XC61X1~XC61X7

XC6101 ~ XC6107, XC6111~ XC6117 Series (6) P-ch Driver Output Current vs. Input Voltage 1 ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (8) Release Delay Time vs. Ambient Temperature * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) (7) P-ch Driver Output Current vs. Input Voltage 2 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0123456 Input Voltage: VIN (V) Output Current: IOUT (mA) XC61X1, XC61X3~XC61X7 Ta=25℃ VDS=2.0V 1.5V 1.0V 0.5V 0.0 0.4 0.8 1.2 1.6 2.0 0123456 Input Voltage: VIN (V) Output Current: IOUT (mA) XC61X1, XC61X3~XC61X7 Ta=-40℃ Ta=25℃ Ta=85℃ VDS=0.5V 0.0 1.0 2.0 3.0 4.0 5.0 6.0 - 5 0 - 2 5 0 2 55 07 5 1 0 0 Ambient Temperature: Ta ( ℃) Release Delay Time TDR （msec ） XC61X1~XC61X7 TDR=3.13msec 100 150 200 250 300 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) Release Delay Time TDR （msec ） XC61X1~XC61X7 TDR=100msec 500 1000 1500 2000 2500 3000 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) Release Delay Time TDR （msec ） TDR=1.6sec XC61X1~XC61X7

XC6101~XC6107, XC6111~XC6117 Series (9) Watchdog Timeout Period vs. Ambient Temperature ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (10) Release Delay Time vs. Input Voltage (11) Watchdog Timeout Period vs. Input Voltage * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 100 150 200 250 300 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) WD Timeout Piriod TWD （msec ） XC61X1~XC61X5 TWD=100msec - 5 0 - 2 5 0 2 55 07 5 1 0 0 Ambient Temperature: Ta ( ℃) WD Timeout Piriod TWD （msec ） XC61X1~XC61X5 TWD=6.25msec 500 1000 1500 2000 2500 3000 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) WD Timeout Piriod TWD （msec ） TWD=1.6sec XC61X1~XC61X5 100 110 120 1234567 Input Voltage: VIN (V) Release Delay Time : TDR （msec ） XC61x1~XC61x7 Ta=25℃ TDR=100msec 100 110 120 1234567 Input Voltage: VIN (V) WD Timeout Piriod : TWD （msec ） XC61x1~XC61x5 Ta=25℃ TWD=100msec

XC6101 ~ XC6107, XC6111~ XC6117 Series (12) Watchdog Low Level Voltage vs. Ambient Temperature (13) Watchdog High Level Voltage vs. Ambient Temperature ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (14) MRB Low Level Voltage vs. Ambient Temperature (15) MRB High Level Voltage vs. Ambient Temperature * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) WD LowLevel Threshold Voltage VWDL(V) XC61X1~XC61X5 VIN=6.0V VIN=3.0V VIN=1.76V 0.0 1.0 2.0 3.0 4.0 5.0 6.0 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) WD HighLevel Threshold Voltage VWDH(V) XC61X1~XC61X5 VIN=6.0V VIN=3.0V VIN=1.76V 0.50 0.60 0.70 0.80 0.90 1.00 1.10 -50 -25 0 25 50 75 100 Ambient Temperature: Ta ( ℃) MRB LowLevel Threshold Voltage VMRL(V) XC61X1~XC61X3, XC61X6~XC61X7 VIN=6.0V VIN=3.0V VIN=1.76V 0.50 0.60 0.70 0.80 0.90 1.00 1.10 - 5 0 - 2 5 0 2 55 07 5 1 0 0 Ambient Temperature: Ta ( ℃) MRB HighLevel Threshold Voltage VMRH(V) XC61X1~XC61X3, XC61X6~XC61X7 VIN=6.0V VIN=3.0V VIN=1.76V

XC6101~XC6107, XC6111~XC6117 Series 1. The products and product specifications cont ained herein are subject to change without notice to improve performance characteristic s. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infri ngement of patents, pat ent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction ca n be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transpor t; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this cata log may be copied or reproduced without the prior permission of Torex Semiconductor Ltd.

Product Information

XC6101A042 specifications and overview.

Summary

CMOS Voltage Detector

Description

CMOS Voltage Detector

Source title XC6101A042 Datasheet(PDF) - Torex Semiconductor

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