UPIO-M3U1XX SILABS | Alldatasheet
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Integrated Development Environment (IDE). Figure 1. Unified Development Platform Block Diagram
2 Rev. 0.1 2. Relevant Documents This document provides a hardware overview for the Unified Development Platform (UDP) system SiM3U1xx I/O card. Additional information on the UDP system can be found in the documents listed in this section. 2.1. Motherboard User’s Guide The UDP Motherboard User’s Guide contains informat ion on the motherboard features and can be found at www.silabs.com/udp. 2.2. Card User’s Guides The UDP MCU, I/O, and radio test card User’s Guides can be found at www.silabs.com/udp.
- Connect an MCU card to the UDP motherboard slot.
- Connect the I/O card to the UDP motherboard slot.
- (Optional) Connect a radio test card to the radio test card slot in the UDP motherboard.
- (Optional) Connect an EZLink card to the EZLink card slot in the UDP motherboard.
- Connect the USB Debug Adapter to the 2x5 debug connector on the MCU card with the 10-pin ribbon
- Connect one end of the USB cable to the USB connector on the USB Debug Adapter.
- Connect the other end of the USB cable to a USB Port on the PC.
- Connect the ac/dc power adapter to power jack J20 on the UDP motherboard. The board can also be
powered from the J16 USB or J1 mini USB connectors.
- Move the S3 power switch on the UDP motherboard to the ON position.
Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter. can damage the device and/or the USB Debug Adapter. Figure 2. Hardware Setup using the Unified Development Platform
Figure 4. UPIO-M3U1xx I/O Card Features by the UDP motherboard and communicates to a UDP MCU card via I2C through the UDP connector. Debug connections to the C8051F990 are available via the J8 header. Table 2 shows the header connections. Table 1. J8 Header Connections
1 C8051F990 VDD pin (PWR_SYS_BULK)
2 C8051F990 C2CK
3 C8051F990 C2D
a single component. D1 is a bright white LED. Table 2 shows the port pin connections. ground when the joystick placed in one of the five positions. Table 3 show the port pin connections to the joystick. voltage drop across R42 to regulate the collector current. of the BJT and enables and disables the regulator circuit. software tools to recognize the connected hardware and automatically select the appropriate firmware image. Table 2. Switch and LED Connections Table 3. Joystick Switch Connections
- Using the I/O Card with the UDP Motherboard
Figure 5. Power Measurement Diagram UPIO-M3U1xx card implements a subset of these connections.
factory default shorting block. Figure 6. Shorting Blocks: Factory Defaults
Figure 7. UPIO-M3U1xx I/O Card Schematic (1 of 4)
Figure 8. UPIO-M3U1xx I/O Card Schematic (2 of 4)
Figure 9. UPIO-M3U1xx I/O Card Schematic (3 of 4)
Figure 10. UPIO-M3U1xx I/O Card Schematic (4 of 4)
Table 4. UPIO-M3U1xx Card Bill of Materials U1-2 C8051F990-GM Silicon Labs MIXED SIGNAL, MCU, QFN20-3X3, RoHS.
24 R29 R32
9 R16 R25
Table 4. UPIO-M3U1xx Card Bill of Materials (Continued)
Table 5. UPIO-M3U1xx Card H1 Pin Descriptions (J1)
3 LIN_RX_B
4 LIN_TX_B
5 CAN_RX_A
6 CAN_TX_A
7 EXT_DMA_TRIG1
8 EXT_DMA_TRIG0
9 EXT_DAC_TRIG1
10 EXT_DAC_TRIG0
11 EXT_ADC_TRIG1
12 EXT_ADC_TRIG0
13 EXT_INT1
15 WAKEUP1
35 CLKOUT0
39 I2C_SCL_B
40 I2C_SDA_B
51 GND
57 TIMER_EX_B
58 TIMER_CT_B
60 TIMER_CT_A
63 I2SOUT_DOUT_A
64 I2SOUT_CLK_A
66 PCA_CH1_B
67 PCA_CH0_B
68 PCA_ECI_B
71 PCA_ECI_A
Table 5. UPIO-M3U1xx Card H1 Pin Descriptions (J1) (Continued)
72 LIN_RX_A
73 LIN_TX_A
74 EPCA_CH5_A
75 EPCA_CH4_A
76 EPCA_CH3_A
77 EPCA_CH2_A
78 EPCA_CH1_A
79 EPCA_CH0_A
80 EPCA_ECI_A
81 USART_UCLK_B
82 USART_CTS_B
83 USART_RTS_B
93 CAN_RX_B
94 CAN_TX_B
100 GND
Table 6. UPIO-M3U1xx Card H2 Pin Descriptions (J2)
1 CMOSCLK_XTAL2_A
2 CMOSCLK_XTAL1_A
3 LCD_COM7_A
4 LCD_COM6_A
5 LCD_COM5_A
6 LCD_COM4_A
7 LCD_COM3_A
8 LCD_COM2_A
9 LCD_COM1_A
10 LCD_COM0_A
11 LCD_SEG39_A
12 LCD_SEG38_A
13 LCD_SEG37_A
14 LCD_SEG36_A
15 LCD_SEG35_A
16 LCD_SEG34_A
17 LCD_SEG33_A
18 LCD_SEG32_A
19 LCD_SEG31_A
20 LCD_SEG30_A
21 LCD_SEG29_A
22 LCD_SEG28_A
23 LCD_SEG27_A
24 LCD_SEG26_A
25 LCD_SEG25_A
26 LCD_SEG24_A
27 LCD_SEG23_A
28 LCD_SEG22_A
29 LCD_SEG21_A
30 LCD_SEG20_A
31 LCD_SEG19_A
32 LCD_SEG18_A
33 LCD_SEG17_A
34 LCD_SEG16_A
35 LCD_SEG15_A
36 LCD_SEG14_A
37 LCD_SEG13_A
38 LCD_SEG12_A
39 LCD_SEG11_A
40 LCD_SEG10_A
41 LCD_SEG09_A
42 LCD_SEG08_A
43 LCD_SEG07_A
44 LCD_SEG06_A
45 LCD_SEG05_A
46 LCD_SEG04_A
47 LCD_SEG03_A
48 LCD_SEG02_A
49 LCD_SEG01_A
50 LCD_SEG00_A
Table 6. UPIO-M3U1xx Card H2 Pin Descriptions (J2) (Continued)
81 EMIF_A22
82 EMIF_A23
83 HVGPIO7
84 HVGPIO6
97 EPCA_ECI_MOTOR
98 UDPBUS_SCL_A UDP moth erboard I2C A clock
99 UDPBUS_SDA_A UDP motherboard I2C A data
Table 7. UPIO-M3U1xx Card H3 Pin Descriptions (J3)
1 H3_100
2 H3_99
3 H3_98
4 H3_97
5 H3_96
6 H3_95
7 H3_94
8 H3_93
9 H3_92
10 H3_91
11 H3_90
12 H3_89
13 H3_88
14 H3_87
15 H3_86
16 H3_85
17 H3_84
18 H3_83
19 H3_82
20 H3_81
21 H3_80
22 H3_79
23 H3_78
24 H3_77
25 H3_76
26 H3_75
27 H3_74
28 H3_73
29 H3_72
30 H3_71
31 H3_70
32 H3_69
33 H3_68
34 H3_67
35 H3_66
36 H3_65
37 H3_64
38 H3_63
39 H3_62
40 H3_61
41 H3_60
42 H3_59
43 H3_58
44 H3_57
45 H3_56
46 H3_55
47 UART_SYS_EN
48 VCP_EN
53 C2_DAT_E
54 C2_CLK_E
55 C2_DAT_D
56 C2_CLK_D
57 C2_DAT_C
58 C2_CLK_C
59 C2_DAT_B
60 C2_CLK_B
61 C2_DAT_A
62 C2_CLK_A
63 EBID_NSS
64 EBID_MISO
65 EBID_MOSI
66 EBID_SCK
67 GND
69 PWR_SYS_BULK
Table 7. UPIO-M3U1xx Card H3 Pin Descriptions (J3) (Continued)
78 PWR_VPP_BULK
79 PWR_VPP_BULK
80 PWR_HV2_BUS High Drive I/O power 2
81 PWR_HV2_BUS
82 PWR_HV1_BUS High Drive I/O power 1
83 PWR_HV1_BUS
84 PWR_AUX_BUS
85 PWR_AUX_BUS
86 PWR_IO_BUS Connects power from the MCU card to the radio and I/O
88 PWR_IO_OUT
89 PWR_IO_OUT
90 PWR_IO_IN
91 PWR_IO_IN
92 PWR_RADIO_OUT
93 PWR_RADIO_OUT
94 PWR_RADIO_IN
95 PWR_RADIO_IN
96 PWR_VDD_OUT
97 PWR_VDD_OUT
98 PWR_VDD_IN
99 PWR_VDD_IN
Table 8. UPIO-M3U1xx Card H4 Pin Descriptions (J4)
2 H4_99
3 H4_98
4 H4_97
5 ITM_CLK
6 ITM_DAT3
7 ITM_DAT2
8 ITM_DAT1
9 ITM_DAT0
10 H4_91
11 EZR_GPIO4
12 EZR_GPIO3
13 EZR_GPIO2
14 EZR_GPIO1
15 EZR_GPIO0
16 EZR_VDI
17 EZR_ARSSI
18 EZR_RESET
19 EZR_SI100X_RX
20 EZR_FFIT
21 EZR_DTO
22 EZR_SI100X_TX
24 EZRP_NIRQ
26 GND
30 GND
32 GND
39 GND
40 HVDA_INN_B
41 HVDA_INP_B
42 HVDA_INN_A
43 HVDA_INP_A
44 GND
53 GND
54 DAC_OUT3
55 DAC_OUT2
56 DAC_OUT1
57 DAC_OUT0
58 DAC_VREFGND
59 DAC_VREF
60 GND
68 C2D_RX15_A
69 C2D_RX14_A
70 C2D_RX13_A
71 C2D_RX12_A
72 C2D_RX11_A
Table 8. UPIO-M3U1xx Card H4 Pin Descriptions (J4) (Continued)
73 C2D_RX10_A
74 C2D_RX09_A
75 C2D_RX08_A
76 C2D_RX07_A
77 C2D_RX06_A
78 C2D_RX05_A
79 C2D_RX04_A
80 C2D_RX03_A
81 C2D_RX02_A
82 C2D_RX01_A
83 C2D_RX00_A
84 C2D_TX15_A
85 C2D_TX14_A
86 C2D_TX13_A
87 C2D_TX12_A
88 C2D_TX11_A
89 C2D_TX10_A
90 C2D_TX09_A
91 C2D_TX08_A
92 C2D_TX07_A
Rev. 0.1 27 NOTES:
28 Rev. 0.1 CONTACT INFORMATION Silicon Laboratories Inc.
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