TS3001

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© 2014 Silicon Laboratories, Inc. All rights reserved.

FEATURES

 Ultra Low Supply Current: 1µA at 25kHz  Supply Voltage Operation: 0.9V to 1.8V  Programmable Frequency Range: o 5.2kHz ≤ FOUT ≤ 90kHz  FOUT Period Drift: 0.021%/ °C  PWMOUT Duty Cycle Range: 12% to 90%  Single Resistor Sets Output Frequency  Output Driver Resistance: 160 Ω

APPLICATIONS

Portable and Battery-Powered Equipment Low-Parts-Count Nanopower Oscillator Compact Nanopower Replacement for Crystal and Ceramic Oscillators Nanopower Pulse-width Modulation Control Nanopower Pulse-position Modulation Control Nanopower Clock Generation Nanopower Sequential Timing

DESCRIPTION

The TS3001 is a single-supply CMOS oscillator fully specified to operate at 1V while consuming a 1µA supply current at an output frequency of 25kHz. This oscillator is compact, easy-to-use, and versatile. Optimized for ultra-long life, battery-powered applications, the TS3001 joins the TS3002 CMOS oscillator in the “NanoWatt Analog™” high- performance analog integrated circuits portfolio. The TS3001 can operate from single-supply voltages from 0.9V to 1.8V. Requiring only a resistor to set the output frequency, the TS3001 represents a 66% reduction in pcb area and a factor-of-10 reduction in power consumption over other CMOS-based integrated circuit oscillators. When compared against industry-standard 555-timer- based products, the TS3001 offers up to 93% reduction in pcb area and four orders of magnitude lower power consumption. The TS3001 is fully specified over the -40°C to +85°C temperature range and is available in a low-profile, 8- pin 2x2mm TDFN package with an exposed back- side paddle. A 1V/1µA Easy-to-Use Resistor-Tuned Silicon Oscillator/Timer TYPICAL APPLICATION CIRCUIT Table 1: FOUT vs RSET RSET (MΩ) FOUT (kHz) 1 110 2.49 44 4.32 25.5 6.81 16 9.76 11

Page 2 TS3001 Rev. 1.0 ABSOLUTE MAXIMUM RATINGS Short Circuit Duration FOUT, PWMOUT to GND or VDD Continuous Power Dissipation (TA = +70°C) Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the op erational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART MARKING CARRIER QUANTITY TS3001ITD822 AAG Tape & Reel ----- TS3001ITD822T Tape & Reel 3000 Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges.

TS3001 Rev. 1.0 Page 3

ELECTRICAL CHARACTERISTICS

VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VDD 0.9 1 1.8 V Supply Current IDD 1 1.5 µA -40°C ≤ TA ≤ 85°C 2.8 VCNTRL = 0.15 x VDD 2.1 3.7 FOUT Period tFOUT 38.5 41.6 µs -40°C ≤ TA ≤ 85°C 36.8 44.6 FOUT Period Line Regulation ∆tFOUT/V 1V ≤ VDD ≤ 1.8V 1.8 %/V FOUT Period Temperature Coefficient ∆tFOUT/∆T 0.021 %/°C PWMOUT Duty Cycle DC(PWMOUT) VCNTRL = 0.03 x VDD 6 10.5 15 % VCNTRL = 0.15 x VDD 45 49.8 54.2 VCNTRL = 0.27 x VDD 84 91 98 FOUT, PWMOUT Rise Time tRISE See Note 2, C L = 15pF 8.6 ns FOUT, PWMOUT Fall Time t FALL See Note 2, C L = 15pF 7.9 ns FOUT Jitter See Note 3 0.08 % RSET Pin Voltage V(RSET) 0.3 V CNTRL Output Current I CNTRL 25 45 nA -40°C ≤ TA ≤ 85°C 100 PWMOUT Enable VPWM_EN (V DD - VCNTRL ), 0.9V < VDD < 1.8V 375 mV PWMOUT Disable VPWM_DIS (V DD - VCNTRL ), 0.9V < VDD < 1.8V 131 mV High Level Output Voltage, FOUT and PWMOUT V DD - VOH I OH = 1mA 160 mV Low-level Output Voltage, FOUT and PWMOUT V OL I OL = 1mA 140 mV Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified. Note 2: Output rise and fall times are measured between the 10% and 90% of the VDD power-supply voltage levels. The specification is based on lab bench characterization and is not tested in production. Note 3: Timing jitter is the ratio of the peak-to-peak variation of the period to the mean of the period. The specification is based on lab bench characterization and is not tested in production.

Page 4 TS3001 Rev. 1.0 PERIOD - µs SUPPLY CURRENT - µA 40 80 1.5 0.5 Supply Current vs FOUT Period 0 120 2.5 160 200 SUPPLY VOLTAGE - Volt PERIOD - µs 1.05 1.2 39.8 39.6 40.4 FOUT Period vs Supply Voltage 0.9 1.35 40.2 1.5 CLOAD- pF SUPPLY CURRENT - µA 10 20 1.2 0.8 1.8 Supply Current vs CLOAD(FOUT) 0 30 1.4 1.6 1.65 1.8 TEMPERATURE - ºC SUPPLY CURRENT - µA 1.08 0.8 Supply Current vs Temperature 1.22 1.36 0.94 1.5 -15 10 -40 35 60 85 SUPPLY VOLTAGE - Volt START-UP TIME - ms 1.2 1.24 1.1 1.66 Start-up Time vs Supply Voltage 0.9 1.38 1.52 1.5 1.8 1.8 TEMPERATURE - ºC PERIOD - µs -15 10 39.5 FOUT Period vs Temperature -40 35 60 85 40.5 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted. Values are at TA = 25°C unless otherwise noted.

TS3001 Rev. 1.0 Page 5 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted. Values are at TA = 25°C unless otherwise noted. RSET - MΩ PERIOD - µs 4 8 200 Period vs RSET 0 12 120 160 16 20 PERCENT OF UNITS - % SUPPLY CURRENT - µA Supply Current Distribution 0.97 10% 15% 20% 25% 30% 35% 0.99 1.01 1.03 FOUT and PWMOUT Transient Response VDD = 1V, VCNTRL = 0.035 x VDD, CLOAD = 22pF 5µs/DIV FOUT 500mV/DIV PWMOUT 500mV/DIV FOUT and PWMOUT Transient Response VDD = 1.5V, VCNTRL = 0.035 x VDD, CLOAD = 22pF 5µs/DIV FOUT 1V/DIV PWMOUT 1V/DIV FOUT Transient Response VDD = 1V, CLOAD = 47pF 5µs/DIV FOUT Transient Response VDD = 1.5V, CLOAD = 47pF 5µs/DIV FOUT 500mV/DIV FOUT 200mV/DIV

Page 6 TS3001 Rev. 1.0 PIN FUNCTIONS PIN NAME FUNCTION

1 FOUT

Fixed Duty Cycle Output. A push-pull output stage with an output resistance of 160Ω, the FOUT pin swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized. 2 NC No Connection.

3 PWMOUT

Pulse-width Modulated Output. A push-pull output stage with an output resistance of 160Ω, the PWMOUT pin is wired anti-phase with respect to FOUT and swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized.

4 CNTRL

PWMOUT Enable and Duty Cycle Control Input. An analog input pin, the V CNTRL pin voltage enables the TS3001’s PWM engine and controls the duty cycle at PWMOUT from 12% (VCNTRL = 0.03 x VDD) to 90% (VCNTRL = 0.27 x VDD). Enabling the PWM engine increases the TS3001’s nominal operating supply current. To disable the TS3001’s PWM engine, CNTRL shall be connected to V DD. 5,6 GND Ground – Connect this pin to the system’s analog ground plane.

7 RSET

FOUT Programming Resistor Input. A 4.32MΩ resistor connected from this pin to GND sets the TS3001’s internal oscillator’s output period to 40μs (25kHz). For optimal performance, the composition of the RSET resistor shall be consistent with tolerances of 1% or lower. The RSET pin voltage is 0.3V at a 1V supply.

8 VDD

Power Supply Voltage Input. While the TS3001 is fully specified at 1V, the supply voltage range is 0.9V ≤ V DD ≤ 1.8V. It is always considered good engineering practice to bypass the VDD pin with a 0.1μF ceramic decoupling capacitor in close proximity to the TS3001. EP ----- Exposed paddle is elec trically connected to GND.

TS3001 Rev. 1.0 Page 7 BLOCK DIAGRAM THEORY OF OPERATION The TS3001 is a user-programmable oscillator where the period of the square wave at its FOUT terminal is generated by an external resistor. The output frequency is given by: FOUT (kHz) = 1 t FOUT (µs) ൌ 1E6 k x RSETሺMΩሻ where the scalar k is approximately 9.09E3. With an RSET = 4.32M Ω, the output frequency is approximately 25kHz with a 50% duty cycle. As design aids, Tables 1 lists TS3001’s typical FOUT for various standard values for RSET. The TS3001 also provides a separate PWM output signal at its PWMOUT terminal that is anti-phase with respect to FOUT. In addition, applying a voltage at the CNTRL both enables the TS3001’s internal PWM engine as well as adjusting the duty cycle from 12% to 90%. A dc control voltage equal to 0.03 x VDD applied to the CNTRL pin enables the PWM engine to set the duty cycle to 12%. A dc control voltage equal to 0.27 x VDD increases the duty cycle to 90% and connecting CNTRL to VDD disables the PWM engine altogether. Configured for nominal operation (PWM engine OFF), the supply current of the TS3001 is 1µA; enabling the PWM engine increases the TS3001 operating supply cu rrent as shown in the electrical specification table. Table 1: FOUT vs RSET RSET (MΩ) FOUT (kHz) 1 110 2.49 44 4.32 25.5 6.81 16 9.76 11

Silicon Laboratories, Inc. Page 10 400 West Cesar Chavez, Austin, TX 78701 TS3001 Rev. 1.0 +1 (512) 416-8500 ▪ www.silabs.com PACKAGE OUTLINE DRAWING Patent Notice Silicon Labs invests in research and development to help our custom ers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of pub lication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. BOTTOM VIEW SIDE VIEW 8-Pin TDFN22 Package Outline Drawing (N.B., Drawing not to scale; all dimensions in mm; JEDEC MO-229 compliant)

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