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© 2014 Silicon Laboratories, Inc. All rights reserved.
FEATURES
Single 0.65V to 2.5V Operation Supply current: 0.6μA per amplifier (typ) Offset voltage: 0.5mV (typ) Low TCVOS: 10µV/°C (typ) AVOL Driving 100kΩ Load: 90dB (min) Unity Gain Stable Rail-to-rail Input and Output No Output Phase Reversal Packaging: TS1002 – 8-pin MSOP TS1004 – 14-pin TSSOP
APPLICATIONS
Battery/Solar-Powered Instrumentation Portable Gas Monitors Low-voltage Signal Processing Nanopower Active Filters Wireless Remote Sensors Battery-powered Industrial Sensors Active RFID Readers Powerline or Battery Current Sensing Handheld/Portable POS Terminals
DESCRIPTION
The TS1002 and the TS1004 are the industry’s first and only dual and quad single-supply, precision CMOS operational amplifiers fully specified to operate at 0.8V while consuming less than 0.6µA supply current per amplifier. Optimized for ultra-long-life battery-powered applications, the TS1002 and the TS1004 join the TS1001 operational amplifier in the “NanoWatt Analog™” high-performance analog integrated circuits portfolio. Both op amps exhibit a typical offset voltage of 0.5mV, a typical input bias current of 25pA, and rail-to-rail input and output stages. The TS1002 and the TS1004 can operate from single-supply voltages from 0.65V to 2.5V. The TS1002/TS1004’s combined features make either an excellent choice in applications where very low supply current and low operating supply voltage translate into very long equipment operating time. Applications include: nanopower active filters, wireless remote sensors, battery and powerline current sensors, portable gas monitors, and handheld/portable POS terminals. The TS1002 and the TS1004 are fully specified at VDD = 0.8V and over the industrial temperature range (−40°C to +85°C). The TS1002 is available in PCB-space saving 8-lead MSOP surface-mount packages. The TS1004 is available in a 14-pin TSSOP package. THE ONLY 0.8V/0.6µA RAIL-TO-RAIL DUAL/QUAD OP AMPS TYPICAL APPLICATION CIRCUIT A NanoWatt 2-Pole Sallen-Key Low-Pass Filter VDD = 0.8V Percent of Units - % 30% 25% 20% 15% 10% Supply Current Distribution Supply Current per Amplifier - µA
Page 2 TS1002/4 Rev. 1.0 ABSOLUTE MAXIMUM RATINGS Continuous Power Dissipation (TA = +70°C) 14-pin TSSOP (Derate 8.3mW/°C above +70°C) Electrical and thermal stresses beyond thos e listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION TAPE & REEL ORDER NUMBER PART MARKING PACKAGE QUANTITY TAPE & REEL ORDER NUMBER PART MARKING PACKAGE QUANTITY TS1002IM8 TADJ ----- TS1004IT14 T1004I ----- TS1002IM8T 2500 TS1004IT14T 2500 Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges.
TS1002/4 Rev. 1.0 Page 3
ELECTRICAL CHARACTERISTICS
VDD = +0.8V, VSS = 0V, VINCM = VSS; RL = 100kΩ to (VDD-VSS)/2; TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. See Note 1 Parameters Symbol Conditions Min Typ Max Units Supply Voltage Range VDD-VSS 0.65 0.8 2.5 V Supply Current ISY TS1002; RL = Open circuit TA = 25°C 1.2 1.6 µA -40°C ≤ TA ≤ 85°C 2 TS1004; RL = Open circuit TA = 25°C 2.4 3.2 µA -40°C ≤ TA ≤ 85°C 4 Input Offset Voltage VOS V IN = VSS or VDD TA = 25°C 0.5 3 mV -40°C ≤ TA ≤ 85°C 5 Input Offset Voltage Drift TCVOS 10 µV/°C Input Bias Current IIN+, IIN- V IN+, VIN- = (VDD - VSS)/2 TA = 25°C 0.025 nA -40°C ≤ TA ≤ 85°C 20 Input Offset Current IOS Specified as IIN+ - IIN- VIN+, VIN- = (VDD - VSS)/2 TA = 25°C 0.01 nA -40°C ≤ TA ≤ 85°C 2 Input Voltage Range IVR Guaranteed by Input Offset Voltage Test VSS V DD V Common-Mode Rejection Ratio CMRR 0V ≤ VIN(CM) ≤ 0.4V 50 74 dB Power Supply Rejection Ratio PSRR 0.65V ≤ (VDD - VSS) ≤ 2.5V 50 74 dB Output Voltage High VOH Specified as VDD - VOUT, RL = 100kΩ to VSS TA = 25°C 1.2 2 mV -40°C ≤ TA ≤ 85°C 2.5 Specified as VDD - VOUT, RL = 10kΩ to VSS TA = 25°C 10 16 -40°C ≤ TA ≤ 85°C 20 Output Voltage Low VOL Specified as VOUT - VSS, RL = 100kΩ to VDD TA = 25°C 0.4 0.6 mV -40°C ≤ TA ≤ 85°C 1 Specified as VOUT - VSS, RL = 10kΩ to VDD TA = 25°C 5 7 -40°C ≤ TA ≤ 85°C 10 Short-circuit Current ISC+ V OUT = VSS TA = 25°C 0.5 1.5 mA -40°C ≤ TA ≤ 85°C 0.3 ISC- V OUT = VDD TA = 25°C 4.5 11 Open-loop Voltage Gain AVOL V SS+50mV ≤ VOUT ≤ VDD-50mV TA = 25°C 90 104 dB -40°C ≤ TA ≤ 85°C 85 Gain-Bandwidth Product GBWP R L = 100kΩ to VSS, CL = 20pF 4 kHz Phase Margin φM Unity-gain Crossover, RL = 100kΩ to VSS, CL = 20pF 70 degrees Slew Rate SR R L = 100kΩ to VSS, AVCL = +1V/V 1.5 V/ms Full-power Bandwidth FPBW FPBW = SR/(π • VOUT,PP); VOUT,PP = 0.7VPP 680 Hz Input Voltage Noise Density en f = 1kHz 0.6 µV/√Hz Input Current Noise Density in f = 1kHz 10 pA/√Hz Note 1: All specifications are 100% tested at TA = +25°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by device characterization, not production tested.
Page 4 TS1002/4 Rev. 1.0 TYPICAL PERFORMANCE CHARACTERISTICS Total Supply Current vs Supply Voltage SUPPLY CURENT - µA SUPPLY VOLTAGE - Volt Total Supply Current vs Input Common-Mode Voltage SUPPLY CURENT - µA INPUT COMMON-MODE VOLTAGE - Volt Total Supply Current vs Input Common-Mode Voltage Input Offset Voltage vs Input Common-Mode Voltage INPUT OFFSET VOLTAGE - mV INPUT OFFSET VOLTAGE - mV INPUT COMMON-MODE VOLTAGE - Volt Input Offset Voltage vs Supply Voltage INPUT COMMON-MODE VOLTAGE - Volt SUPPLY CURENT - µA SUPPLY VOLTAGE - Volt VDD =0.8V TA = +25°C Input Offset Voltage vs Input Common-Mode VoltageINPUT OFFSET VOLTAGE - mV INPUT COMMON-MODE VOLTAGE - Volt VDD = 2.5V TA = +25°C +25°C, TS1004 +85°C, TS1004 -40°C, TS1004 0.6 1.5 TA = +25°C 1.56 1.34 1.12 0.9 0 0.2 0.4 0.6 0.8 TA = +25°C 0 0.5 1.5 2 2.51 TA = +25°C 0.5 1.5 2 2.51 VINCM = VDD 0.65 0.6 0.55 0.5 0.55 VINCM = 0V 0 0.2 0.4 0.6 0.8 0.5 -0.5 0.5 -0.5 0 0.5 1.5 2 2.51 1.9 2.4 2.8 +85°C, TS1002 +25°C, TS1002 -40°C, TS1002 1.78 TS1004 TS1002 1.56 1.34 1.12 0.9 1.78 TS1004 TS1002
TS1002/4 Rev. 1.0 Page 5 -40 TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current (IIN+, IIN-) vs Input Common-Mode Voltage INPUT BIAS CURRENT - pA INPUT COMMON-MODE VOLTAGE - Volt Output Voltage High (VOH) vs Temperature, RLOAD =100kΩ TEMPERATURE - °C Output Voltage Low (VOL) vs Temperature, RLOAD =100kΩ TEMPERATURE - °C Output Voltage High (VOH) vs Temperature, RLOAD =10kΩ Output Voltage Low (VOL) vs Temperature, RLOAD =10kΩ Input Bias Current (IIN+, IIN-) vs Input Common-Mode Voltage OUTPUT SATURATION VOLTAGE - mV INPUT COMMON-MODE VOLTAGE - Volt INPUT BIAS CURRENT - pA OUTPUT SATURATION VOLTAGE - mV VDD = 2.5V TA = +25°C VDD =0.8V TA = +25°C 100 -50 -25 250 200 100 -50 150 RL = 100kΩ VDD = 0.8V VDD = 2.5V RL = 100kΩ VDD = 0.8V VDD = 2.5V 4.5 3.5 0.5 1.5 2.5 1.8 1.6 0.8 0.4 1.2 1.4 0.2 0.6 OUTPUT SATURATION VOLTAGE - mV OUTPUT SATURATION VOLTAGE - mV TEMPERATURE - °C TEMPERATURE - °C RL = 10kΩ VDD = 0.8V VDD = 2.5V RL = 10kΩ VDD = 0.8V VDD = 2.5V 16
Page 6 TS1002/4 Rev. 1.0 VOUT(N) - 100µV/DIV 0.1Hz to 10Hz Output Voltage Noise TYPICAL PERFORMANCE CHARACTERISTICS Output Short Circuit Current, ISC+ vs Temperature OUTPUT SHORT-CIRCUIT CURRENT - mA Output Short Circuit Current, ISC- vs Temperature Large-Signal Transient Response VDD = 2.5V, VSS = GND, RLOAD = 100kΩ, CLOAD = 15pF 200µs/DIV OUTPUT SHORT-CIRCUIT CURRENT - mA INPUT Small-Signal Transient Response VDD = 2.5V, VSS = GND, RLOAD = 100kΩ, CLOAD = 15pF 2ms/DIV OUTPUT INPUT OUTPUT TEMPERATURE - °C TEMPERATURE - °C VDD = 0.8V VDD = 2.5V VDD = 0.8V VDD = 2.5V VOUT = 0V VOUT = VDD Gain and Phase vs. Frequency GAIN - dB FREQUENCY - Hz PHASE - Degrees 10 1k 10k 100 -20 -250 -150 -50 150 100k VDD = 0.8V TA = +25°C RL = 100kΩ CL = 20pF AVCL = 1000 V/V PHASE GAIN 4kHz 70°
1 Second/DIV
130µVPP
TS1002/4 Rev. 1.0 Page 7 PIN FUNCTIONS Pin Label Function TS1002 MSOP TS1004 TSSOP 1, 7 1, 7, 8, 14 OUT Amplifier Output s: A, B – TS1002; A, B, C, D – TS1004 4 7 V SS Negative Supply or Analog GND. If applying a negative voltage to this pin, connect a 0.1µF capacitor from this pin to analog GND. 3, 5 3, 5, 10, 12 +IN Amplifier Non-inverting Inputs: A, B – TS1002; A, B, C, D – TS1004 2, 6 2, 6, 9, 13 -IN Amplifier Inverting Inputs: A, B – TS1002; A, B, C, D – TS1004 8 14 V DD Positive Supply Connection. Connect a 0.1µF bypass capacitor from this pin to analog GND. THEORY OF OPERATION The TS1002 and the TS1004 are fully functional for input signals from the negative supply (V SS or GND) to the positive supply (V DD). Their input stages consist of two differential amplifiers, a p-channel CMOS stage and an n-channel CMOS stage that are active over different ranges of the input common mode voltage. The p-channel input pair is active for input common mode voltages, V INCM, between the negative supply to approximately 0.4V below the positive supply. As the common-mode input voltage moves closer towards V DD, an internal current mirror activates the n-channel input pair differential pair. The p-channel input pair becomes inactive for the balance of the input common mode voltage range up to the positive supply. Because both input stages have their own offset voltage (V OS) characteristic, the offset voltage of these amplifiers is a function of the applied input common-mode voltage, VINCM. The VOS has a crossover point at ~0.4V from V DD (Refer to the V OS vs. V CM curve in the Typical Operating Characteristics section). Caution should be taken in applications where the input signal amplitude is comparable to the amplifiers’ V OS value and/or the design requires high accuracy. In these situations, it is necessary for the input signal to avoid the crossover point. In addition, amplifier parameters such as PSRR and CMRR which involve the input offset voltage will also be affected by changes in the input common-mode voltage across the differential pair transition region. The amplifiers’ second stage is a folded-cascode transistor arrangement that converts the input stage differential signals into a single-ended output. A complementary drive generator supplies current to the output transistors that swing rail to rail. The amplifiers’ output stage voltage swings within 1.2mV from the rails at 0.8V supply when driving an output load of 100kΩ - which provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. When driving a stiffer 10k Ω load, the amplifiers’ output swings within 10mV of V DD and within 5mV of VSS (or GND). APPLICATIONS INFORMATION Portable Gas Detection Sensor Amplifier Gas sensors are used in many different industrial and medical applications. Gas sensors generate a current that is proporti onal to the percentage of a particular gas concentration sensed in an air sample. This output current flows through a load resistor and the resultant voltage drop is amplified. Depending on the sensed gas and sensitivity of the sensor, the output current can be in the range of tens of microamperes to a few milliamperes. Gas sensor datasheets often specify a recommended load resistor value or a ra nge of load resistors from which to choose. There are two main applications for oxygen sensors – applications which sense oxygen when it is abundantly present (that is, in air or near an oxygen tank) and those which detect traces of oxygen in parts-per-million concentration. In medical applications, oxygen sensors are used when air quality or oxygen delivered to a patient needs to be monitored. In fresh air, the concentration of oxygen
TS1002/4 Rev. 1.0 Page 11 Printed Circuit Board Layout Considerations Even though these amplifiers operate from a single 0.65V to 2.5V power supply and consume very little supply current, it is always good engineering practice to bypass the power supplies pins with a 0.1μF ceramic capacitor placed in close proximity to the V DD and VSS (or GND) pins. Good pcb layout techniques and analog ground plane management improve the performance of any analog circuit by decreasing the amount of stray capacitance that could be introduced at the op amp's inputs and outputs. Excess stray capacitance can easily couple noise into the input leads of the op amp and excess stray capacitance at the output will add to any external capacitive load. Therefore, PC board trace lengths and external component leads should be kept a short as practical to any of the amplifiers’ package pins. Second, it is also good engineering practice to route/remove any analog ground plane from the inputs and the output pins of these amplifiers.
Page 12 TS1002/4 Rev. 1.0 PACKAGE OUTLINE DRAWING 8-Pin MSOP Package Outline Drawing (N.B., Drawings are not to scale)
Silicon Laboratories, Inc. Page 13 400 West Cesar Chavez, Austin, TX 78701 TS1002/4 Rev. 1.0 +1 (512) 416-8500 ▪ www.silabs.com PACKAGE OUTLINE DRAWING 14-Pin TSSOP Package Outline Drawing (N.B., Drawings are not to scale) Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
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