STP11NM65N VBSEMI | Alldatasheet
Document overview
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Technical content
FEATURES
- Reduced trr, Qrr, and IRRM
- Low figure-of-merit (FOM) Ron x Qg
- Low input capacitance (Ciss)
- Low switching losses due to reduced Qrr
- Ultra low gate charge (Qg)
- Avalanche energy rated (UIS) Notes a. Repetitive rating; puls e width limited by maximum junction temperature. b. V DD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 5.1 A. c. 1.6 mm from case. d. I SD ID, dI/dt = 100 A/μs, starting TJ = 25 °C. PRODUCT SUMMARY VDS (V) at TJ max. 650 RDS(on) max. () at 25 °C V GS = 10 V 0.3 Qg max. (nC) 106 Qgs (nC) 14 Qgd (nC) 33 Configuration Single N-Channel MOSFET G D S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 650 V Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C ID ATC = 100 °C 16 Pulsed Drain Current a IDM 53 Linear Derating Factor 1.7 W/°C Single Pulse Avalanche Energy b EAS 367 mJ Maximum Power Dissipation PD 208 W Operating Junction and Storage Temperature Range TJ, Tstg -55 to +150 °C Drain-Source Voltage Slope TJ = 125 °C dV/dt 37 V/nsReverse Diode dV/dt d 31 Soldering Recommendations (Peak Temperature) c for 10 s 300 °C N-Channel 650 V (D-S) MOSFET TO-220AB GDS www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
a. C oss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. C oss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum Junction-to-Ambient RthJA -6 2 °C/WMaximum Junction-to-Case (Drain) RthJC -0 .5 SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 650 - - V VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA -0 . 6 7- V/°C Gate-Source Threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 2.5 - 4 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ± 1 μA Zero Gate Voltage Drain Current IDSS VDS =650 V, VGS = 0 V - - 1 μA VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 500 Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 11 A - 0.3 Forward Transconductance gfs VDS = 30 V, ID = 11 A - 7.0 - S Dynamic Input Capacitance Ciss VGS = 0 V, VDS = 100 V, f = 1 MHz - 4826 - pF Output Capacitance Coss - 456 Reverse Transfer Capacitance Crss - - Effective Output Capacitance, Energy Related a Co(er) VDS = 0 V to 520 V, VGS = 0 V -8 4- Effective Output Capacitance, Time Related b Co(tr) - 293 - Total Gate Charge Qg VGS = 10 V I D = 11 A, VDS = 520 V -7 1 nC Gate-Source Charge Qgs -1 4- Gate-Drain Charge Qgd -3 3- Turn-On Delay Time td(on) VDD = 520 V, ID = 11 A, VGS = 10 V, Rg = 9.1 -2 2 nsRise Time tr -3 4 Turn-Off Delay Time td(off) -6 8 Fall Time tf -4 2 Gate Input Resistance Rg f = 1 MHz, open drain - 0.78 - Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS MOSFET symbol showing the integral reverse p - n junction diode -- 2 1 A Pulsed Diod e Forward Current ISM -- 5 3 Diode Forward Voltage VSD TJ = 25 °C, IS = 11 A, VGS = 0 V - 0.9 1.2 V Reverse Recovery Time trr TJ = 25 °C, IF = IS = 11 A, dI/dt = 100 A/μs, VR = 25 V - 160 - ns Reverse Recovery Charge Qrr -1 . 2- μ C Reverse Recovery Current IRRM -1 4-A S D G 210 www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typi cal Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Coss and Eoss vs. VDS VDS, Drain-to-Source Voltage (V) ID, Drain-to-Source Current (A) TJ = 25 °CTOP 15 V 14 V 13 V 12 V 11 V 10 V 9 V 8 V 7 V 6 V 5 V 0 5 10 15 20 25 30 VDS, Drain-to-Source Voltage (V) ID, Drain-to-Source Current (A) 01 0 2 0 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9 V 8 V 7 V 6 V 5 V TJ = 150 °C 51 5 2 5 3 0 VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) 01 0 2 5 51 5 2 0 TJ = 25 °C TJ = 150 °C VDS = 29.6 V TJ, Junction Temperature (°C) RDS(on), Drain-to-Source 2.5 0.5 - 60 1.5 - 40 - 20 0 20 40 60 80 100 120 140 160 VGS = 10 V ID = 11 A On Resistance (Normalized) VDS, Drain-to-Source Voltage (V) Capacitance (pF) 2400 1200 0 200 400 4800 3600 100 300 500 600 Ciss Coss Crss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd ġ ġ ġ ġ ġ ġ 500 5000 0 100 200 300 400 500 600 Eoss (μJ) Coss (pF) VDS Coss Eoss www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
Fig. 7 - Typical Gate Charge vs. Gate-to-So urce Voltage Fig. 8 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Safe Operating Area Fig. 10 - Maximum Drain Current vs. Case Temperature Fig. 11 - Temperature vs. Drain-to-Source Voltage Qg, Total Gate Charge (nC) VGS, Gate-to-Source Voltage (V) 0 60 120 30 90 VDS = 520 V VDS = 325 V VDS = 130 V 150 VSD, Source-Drain Voltage (V) ISD, Reverse Drain Current (A) 0.1 100 TJ = 150 °C TJ = 25 °C VGS = 0 V VDS, Drain-to-Source Voltage (V) ID, Drain Current (A) * VGS > minimum VGS at which RDS(on) is specified IDM Limited BVDSS Limited 100 μs 1 ms 10 ms TC = 25 °C TJ = 150 °C Single Pulse Limited by RDS(on)* 0.01 0.1 100 1 10 100 1000 Operation in this Area Limited by RDS(on) TJ, Case Temperature (°C) ID, Drain Current (A) 25 50 75 100 125 150 TJ, Junction Temperature (°C) VDS, Drain-to-Source - 60 0 160 Breakdown Voltage (V) - 40 - 20 20 40 60 80 100 120 140 650 675 700 725 750 775 800 825 850 ID = 10 mA www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-C ase Fig. 13 - Switching Time Test Circuit Fig. 14 - Switching Time Waveforms Fig. 15 - Unclamped Inductive Test Circuit Fig. 16 - Unclamped Inductive Waveforms Fig. 17 - Basic Gate Charge Waveform Fig. 18 - Gate Charge Test Circuit 0.01 0.1 0.0001 0.001 0.01 0.1 1 Normalized Effective Transient Thermal Impedance Pulse Time (s) Duty Cycle = 0.5 0.2 0.1 0.02 Single Pulse 0.05 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % RD VGS RG D.U.T. 10 V VDS VDD VDS 90 % 10 % VGS td(on) tr td(off) tf RG IAS 0.01 Ωtp D.U.T L VDS - VDD 10 V Vary tp to obtain required IAS IAS VDS VDD VDS tp QGS QGD QG VG Charge 10 V D.U.T. 3 mA VGS VDS IG ID 0.3 µF 0.2 µF 50 kΩ 12 V Current regulator Current sampling resistors Same type as D.U.T. www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
Fig. 19 - For N-Channel P.W. Period dI/dt Diode recovery dV/dt Ripple ≤ 5 % Body diode forward drop Re-applied voltage Reverse recovery current Body diode forward current VGS = 10 Va ISD Driver gate drive D.U.T. lSD waveform D.U.T. VDS waveform Inductor current D = P.W. Period Peak Diode Recovery dV/dt Test Circuit VDD dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer Rg Note a. VGS = 5 V for logic level devices VDD www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
- M = 1.32 mm to 1.62 mm (dim ension including protrusion) Heatsink hole for HVM 321 L L(1) D H(1) Q Ø P A F J(1) b(1) e(1) e E b C MILLIMETERS INCHES A 4.25 4.65 0.167 0.183 b 0.69 1.01 0.027 0.040 b(1) 1.20 1 .73 0.047 0.068 c 0.36 0.61 0.014 0.024 D 14.85 15.49 0.585 0.610 E 10.04 10.51 0.395 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.09 6.48 0.240 0.255 J(1) 2.41 2.92 0.095 0.115 L 13.35 14.02 0.526 0.552 L(1) 3.32 3.82 0.131 0.150 Ø P 3.54 3.94 0.139 0.155 Q 2.60 3.00 0.102 0.118 ECN: X12-0208-Rev. N, 08-Oct-12 DWG: 5471 www.VBsemi.tw E-mail:China@VBsemi TEL:86-755-83251052 STP11NM65N A ll data sheet.ocm
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