ST3421SRG STANSON | Alldatasheet
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P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com ST3421SRG 2013. Rev.1
DESCRIPTION
ST3421SRG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package. PIN CONFIGURATION SOT-23 1.Gate 2.Source 3.Drain PART MARKING SOT-23 Y: Year Code A: Process Code FEATURE /circle6 -60V/-5.0A, R DS(ON) = 150m-ohm (Typ.) @VGS = -10V /circle6 -60V/-2.5A, R DS(ON) = 185m-ohm @VGS = -4.5V /circle6 Super high density cell design for extremely low R DS(ON) /circle6 Exceptional on-resistance and maximum DC current capability /circle6 SOT-23 package design 1 2 D G S 1 2 21YA
P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY www.stansontech.com ST3421SRG 2013. Rev.1 ABSOULTE MAXIMUM RATINGS (Ta = 25 ℃ Unless otherwise noted ) Parameter Symbol Typical Unit Drain-Source Voltage V DSS -60 V Gate-Source Voltage VGSS ±20 V Continuous Drain CurrentTJ=150 ℃) TA=25 ℃ TA=70 ℃ ID -5.0 -3.5 A Pulsed Drain Current IDM -12 A Continuous Source Current (Diode Conduction) IS -1.25 A Power Dissipation TA=25 ℃ TA=70 ℃ PD 1.25 0.8 W Operation Junction Temperature TJ 150 ℃ Storgae Temperature Range T STG -55/150 ℃ Thermal Resistance-Junction to Ambient RθJA 100 ℃/W
P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY www.stansontech.com ST3421SRG 2013. Rev.1 ELECTRICAL CHARACTERISTICS ( Ta = 25 ℃ Unless otherwise noted ) Parameter Symbol Condition Min Typ Max Unit Static Drain-Source Breakdown Voltage V (BR)DSS VGS =0V,I D=-10uA -60 V Gate Threshold Voltage VGS(th) V DS =VGS,I D=-250uA -1.0 -3.0 V Gate Leakage Current IGSS VDS =0V,V GS =±20V ±100 nA Zero Gate Voltage Drain Current I DSS VDS =-48V,V GS =0V -1 uA VDS =-48V,V GS =0V TJ=55 ℃ -10 Drain-source On-Resistance RDS(on) VGS =-10V,I D=-5.0A VGS =-4.5V,I D=-2.5A 0.150 0.185 0.160 0.200 Ω Forward Transconductance gfs V DS =-10V,I D=-1.7V 2.4 S Diode Forward Voltage VSD I S=-1.25A,V GS =0V -0.8 -1.2 V Dynamic Total Gate Charge Qg VDS =-30V VGS =-10V ID≡-2A nC Gate-Source Charge Qgs 8 Gate-Drain Charge Qgd 3.0 Input Capacitance Ciss VDS =-30V VGS =0V F=1MH z 1200 pF Output Capacitance Coss 115 Reverse Transfer Capacitance C rss 7 Turn-On Time td(on) tr VDD =-10V RL=15 Ω ID=-1.0A VGEN =-3V RG=2.5 Ω nS 109 Turn-Off Time td(off) tf
P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY www.stansontech.com ST3421SRG 2013. Rev.1 TYPICAL CHARACTERICTICS (25 ℃ Unless noted)
P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY www.stansontech.com ST3421SRG 2013. Rev.1 TYPICAL CHARACTERICTICS (25 ℃ Unless noted)
P Channel Enhancement Mode MOSFET -5.0A STANSON TECHNOLOGY www.stansontech.com ST3421SRG 2013. Rev.1 SOT-23 PACKAGE OUTLINE