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Document overview
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- PDF pages: 8
Technical content
Features
- Two differential 0.7V clock output pairs
- OE# input for enabling SRC outputs
- Individual OE controls
- Low CTC jitter (< 50 ps)
- S p r e a d A w a r e
- 3.3V operation
- Industrial Temperature Grade -40 oC to +85oC
- 16-pin TSSOP package Functional Description The SL28DB200 is a differential buffer capable of distributing the Serial Reference Clock (SRC) for PCI Express Gen2 and SATA implementations. The buffer enables the application system to control the distribution of the SRC.
Applications
- Network/Media Attached Storage
- Routers/IP Gateways
- Multi-function Printers Block Diagram Pin Configuration
16 TSSOP
15 IREF I A precision resistor 475 ohmis attached to this pin to set the differential
16 VSSA GND Ground
Table 1. Buffer Power-up State Machine Figure 1. Buffer Power-up State Diagram
Table 2. OE Functionality
0 Enable
1 Tri-State
All measurements at VDD (typical) = 3.3V, TA = 25oC unless otherwise stated Parameter Description Condition Min. Max. Unit SRCIN at 0.7V TPERIOD Average Period Measured at crossing point V OX 9.9970 10.0533 ns TR / TF SRC and SRC# Rise and Fall Times Single ended measurement: V OL = 0.175 to VOH = 0.525V (Averaged) 0.6 4 V/ns VIH Differential Input High Voltage 150 mV VIL Differential Input Low Voltage –150 mV VOX Crossing Point Voltage at 0.7V Swing Single-ended measurement 250 550 mV VOX Vcross Variation over all edges Single-ended measurement 140 mV VRB Differential Ringback Voltage –100 100 mV TSTABLE Time before ringback allowed 500 ps TDC SRC and SRC# Duty Cycle Measured at crossing point V OX 45 55 % TRFM Rise/Fall Matching Determined as a fraction of 2*(T R – TF)/(TR + TF)– 2 0 % SRC at 0.7V F IN Input Frequency 90 210 MHz FERROR Input/Output Frequency Error – 0 ppm TDC SRC and SRC# Duty Cycle Measured at crossing point V OX 45 55 % TPERIOD Average Period Measured at crossing point V OX at 100 MHz 9.9970 10.0533 ns TR / TF SRC[1:2] and SRC[1:2]# Rise and Fall Times Single-ended measurement: VOL = 0.175 to VOH = 0.525V (Averaged) 175 700 ps TRFM Rise/Fall Matching Determined as a fraction of 2 * (TR – TF)/(TR + TF) –2 0 % TR/TF Rise and Fall Time Variation Variation Single-ended measurement: V OL = 0.175 to VOH = 0.525V (Real Time) –1 2 5 p s VHIGH Voltage High Single-ended measurement 660 850 mv VLOW Voltage Low Single-ended measurement –150 – mv VOX Crossing Point Voltage at 0.7V Swing Single-ended measurement 250 550 mv VOX Vcross Variation over all edges Single-ended measurement – 140 mV VOVS Maximum Overshoot Voltage Single-ended measurement – V HIGH + 0.3 V VUDS Minimum Undershoot Voltage Single-ended measurement – –0.3 V VRB Ring Back Voltage Single-ended measurement 0.2 N/A V TCCJ Cycle to Cycle Jitter Ji tter is additive – 50 ps TSKEW Any SRC/SRC# to SRC/SRC# Clock Skew Measured at crossing point VOX –5 0 p s TPD Input to output skew Measured at crossing point V OX 2.5 4.5 ns
Package Drawing and Dimensions 16-Lead Thin Shrunk Small Outline Package
Document Title: SL28DB200 PCI Express Gen2 and SATA Differential Buffer Document #: 38-07722 Rev *C REV. ECR# Issue Date Orig. of Change Description of Change 1.0 06/17/10 TRP Initial Release AA 09/27/10 TRP Updated Dynamic Supply Current The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil- icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally , Silicon Laboratories assumes no respons ibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, represen- tation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sus- tain life, or for any other application in which the failure of the Silicon Laborator ies product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories produc ts for any such unintended or unauthorized application , Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.