SDBC-DK3UG

Silicon Laboratories

4 buttons and 4 LEDs for custom purposes

Manufacturer: Silicon Laboratories

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Technical content

2 Rev. 0.4

Rev. 0.4 3 TABLE OF C ONTENTS Section Page

4 Rev. 0.4

Rev. 0.4 5 2. Power Supply The board has three power options. The user can select between these options by the supply source selector switch (SW1). 2.1. On Board PSU The on board PSU supplies 3.3 VDC. In this mode, the board should be powered by a standard 9 V ac or 9–12 V dc adapter. 2.2. External PSU In this mode, the board can be powered via the direct dc supply connector by an external PSU. Any supply voltage can be used in the 3.3–4 V range. Polarity is marked on the PCB. 2.3. Powered by USB Port In this mode, the board can be powered via the USB connector. Note: When using the white LED Flash option, it is recommend to use an alternative power supply.

System Introduction: MSC-DBSB8 ICD Connector

Figure 3. Debug Connector (Emulator and Programmer Interface) Table 1. Debug Connector

5 RESET

Table 2. 40-Pin Testcard Connector (J5)

1 J6/1 (SPI_MOSI) 21 GND

2 J7/1 22 J15/1

3 J6/2 (SPI_SCK) 23 GND

4 J7/2 24 J15/2

5 J6/3 (RF_NSEL) 25 J8/1

6 J7/3 26 EBID port (SPI_MOSI)

7 J6/4 27 GND

8 J7/4 28 EBID port (SPI_MISO)

9 J6/5 29 J8/2

10 J7/5 30 EBID port (SPI_SCK)

11 J6/6 31 GND

12 J7/6 (RF_NIRQ) 32 EBID port (EE_NSEL)

13 J6/7 (PWRDN) 33 J8/3

14 J7/7(RF_NIRQ) 34 J15/3

15 J6/8 (GPIO) 35 GND

16 J7/8(SPI_MISO 36 J15/4

System Introduction: Schematic (MSC-DBSB8)

Figure 4. MSC-DBSB8 Schematic (1 of 2)

Figure 5. MSC-DBSB8 Schematic (2 of 2)

Typical Testboard Schematic (Si443x Testcard)

Figure 6. Si443x Testcard Schematic

Using the SDB with a Standard Testcard

Development Board (SDB), as demonstrated below. Figure 7. Software Development Board (MSC-DBSB8)

preloaded on to the c8051F930 microcontroller, but it is also available on the WDS CD-ROMs in the SDB section. to design robust protocols into their designs. approximately 5000 packets, a 2–3 km range is attainable. The demonstration shown below was performed along the Danube River in Budapest, Hungary using the Si4432. Figure 8. Example Range-vs.-Data Rate

Figure 18. Screen 3: RF Parameters (Antenna Diversity Card Fitted) the receiver cannot be achieved. of the link budget that is usually lost to the environment when receivers use only single antenna implementations. Table 3. Illustrative Effects of Antenna Diversity in Indoor/Urban—Multipath Environments Table 4. Effects of Antenna Diversity in Line of Sight (LOS)—Open Air Environments

along that packet—thus the need to implement good CRC checks. a disturbance—thus the need to implement more retries. antenna diversity may help reduce the multipath effects. number of packets used to generate a Packet Error Rate (PER) result. exhaustive testing is better understood. associated antenna is not represented by the LEDs. Figure 21. Non-Antenna Diversity Testcard Note: Only one antenna highlighted on the top row and NO-ANTDIV shown in the second line of text.

Figure 22. Antenna Diversity Testcard A_DIV(2) is shown in the second line of text. 'SETTINGS' where we can re-run the setting accordingly. Once the settings are correct we can run the demonstration accordingly. which you can enable a high brightness LED to make visual confirmation easier of the remote board.

Figure 23. White LED Control Longer tests provide better averages, but in the interest of time, this demonstration sends only 1000 packets. better average can be generated. limited error handling - as is the purpose of this experiment. Good protocols and handling of dropped packets enable users to get much greater ranges.

Figure 24. Active Antenna and RSSI Indications

through the shipping factory firmware on the SDB platform. Table 5. Test Cards Available for Ordering

Figure 25. 4432-DKDB1 - Split TX/RX Antenna Card Using Coaxial Cable

Figure 26. Lab Equipment Connection Diagram

26 Rev. 0.4 7.2.1. Transmitter Evaluation Setup The transmitter output of the 4432-DKDB1 test board can be connected to a spectrum analyzer in order to evaluate output power and spectrum plots. Alternatively the transmitter output may be connected to a vector signal analyzer to evaluate conditions such as freq vs time. The 4432-DKDB1 testcard also provides access to the radio's GPIO which can be used as test-points for the radios internal signals - see diagram above. 7.2.2. Receiver Evaluation Setup Receiver evaluation can be performed by connecting the receiver port of the testcard to an RF signal generator. The RF generator may use a data source from an external IQ generator or from its internal memory depending on its feature set, often RF generators have a PN9 pattern option. The 4432-DKDB1 testcard also provides access to the radio's GPIO which can be used as test-points for the radios internal signals - see test card connection diagram. Two modes are typically used during evaluations: 1. Direct Mode: In this mode, data is continuousl y sent via a source such as a PN9 generator. 2. Packet Mode: In this mode, the data source is customized in a defined packet structure. Typically: Preamble + Sync_Word + Data payload + CRC. Example of a 20 byte packet that can be received by the SDB firmware: 7.2.3. Transmitter Measurements 7.2.3.1. CW Lab Mode Using the CW Lab Mode, users may evaluate the following: 1. Output Power 2. Frequency Offset in Transmitter Output 3. Phase Noise Preamble: 1010101010101010101010101010101010101010101010101010101010101010 Sync: 0010110111010100 Date: 0001010000110100001100000000100101100110001011111001110101010101 0101011101100001010011110010101111010100010000111101001101000010 1111011110011010011100001001000111000011 CRC : 1101011110011000

transmitter and the data received by the receiver. Figure 48. TX Data Sent and Received Selectivity tests. All the required parameters are controlled by the external RF generator.

via a serial terminal emulator such as the WDS Terminal Emulator found on the WDS CDROM. serial port driver needs to be installed on the PC. When the MSC-DBSB8 is connected, you may be prompted to install the Virtual COM port driver. This driver can be found on the WDS CDROM. USB port and the WDS Terminal Emulator is running, test results like following can be seen in Figure 56. Figure 56. Figure 3:Test Result Displayed by USB Virtual COM Port

in many RF applications today. Figure 57. Packet Format Defined in the Packet Error Rate Test

Custom Software Development

segment to create RF links using the EZRadioPRO platform. EZRadioPRO Si443x transceiver using the C8051F930 microcontroller. Figure 58. Basic Program Structure Block Diagram (1 of 4)

Figure 59. Basic Program Structure Block Diagram (2 of 4) modulation index requirements.

Figure 60. Basic Program Structure Block Diagram (3 of 4)

Figure 61. Basic Program Structure Block Diagram (4 of 4)

Rev. 0.4 45 8.1.1. Basic Code Overview Main () (main.c) Hardware Initialization MCU hardware, system clock setup, and I/O init Hardware SPI pin definition (C8051.h) nSEL and nIRQ pin definition SPI read/write function protocol i.e., #define SYSCLK (16000000L/2) #define SPI_CLOCK (SYSCLK/4) //RF chip SBIT(RF_NSEL_PIN, SFR_P1, 3); SBIT(RF_NIRQ_PIN, SFR_P0, 6); //SPI port SBIT(SPI_MISO_PIN, SFR_P1, 1); SBIT(SPI_MOSI_PIN, SFR_P1, 2); SBIT(SPI_SCK_PIN, SFR_P1, 0); Hardware SPI setup (C8051.c) nSEL and nIRQ pin setup SPI read/write functions i.e., void SetHwMasterSpi(void) SPI1CFG = 0x40; //Master SPI, CKPHA=0, CKPOL=0 SPI1CN = 0x00; //3-wire Single Master, SPI enabled SPI1CKR = (SYSCLK/(2*SPI_CLOCK))-1; SPI1EN = 1; // Enable SPI1 module //set nSEL pins to high RF_NSEL_PIN = 1; RF chip hardware and I/O init RF Parameters definition (Si4432.h) i.e., //define the default radio frequency #define FREQ_BAND_SELECT 0x75 //frequency band select #define NOMINAL_CAR_FREQ1 0xBB //default carrier frequency: 915 MHz #define NOMINAL_CAR_FREQ2 0x80 RF hardware setup and parameters setting (Si4432.c) i.e., // set frequency SpiRfWriteAddressData((REG_WRITE | FrequencyBandSelect), FREQ_BAND_SELECT); SpiRfWriteAddressData((REG_W RITE | NominalCarrierFrequency1), NOMINAL_CAR_FREQ1); SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency0), NOMINAL_CAR_FREQ2); RF chip in continuous receive mode (main.c) Check incoming data for valet packet Blink LED for valid packet Response to Push button command Send Data Packet out

Figure 62. Basic Hardware Connections

functions may be specific to the MCU hardware. Figure 63. Flow Chart Main()

48 Rev. 0.4 9.2. Main Source File * FILE --- MAIN.C * DESCRIPTION * This is the main file of the project. * CREATED * Silicon Laboratories Hungary Ltd * COPYRIGHT * Copyright 2008 Silicon Laboratories, Inc. * http://www.silabs.com I N C L U D E #include "C8051.h" #include "Si4432.h" FUNCTION PROTOTYPES void Hw_Init(void); void delay_ms(uint8 delay); /* The real program starts here. */ /* After power-on, the first two tasks are the init of the MCU and the software development board. */ /* The main loop starts after that. While (1) means that it is a never ending loop. */ MAIN PROGRAM void main (void) idata uint8 packet[MAX_PAYLOAD_LENGTH]; idata uint8 length; Hw_Init(); // initialize the MCU and the SW Development board RfInitHw(DR4800BPS_DEV45KHZ); // initialize the Si4432 RFIdle(); // set the radio into IDLE state RFReceive(); // start continuous receive

Rev. 0.4 49 The foreground loop continuously polls the nIRQ pin of the receiver. If the nIRQ is active (low), the microcontroller starts a status read. Then reads out the data packets from the FIFO. while (1) // stay in receiving mode switch ( RFPacketReceived(&packet[0],&length) ) // check the status packet reception case RF_NO_PACKET: // CHIP is in RX mode, but no preamble detected yet If Button#1 is pressed, the LED1 will blink, and both the synthesizer and the power amplifier (PA) will be turned on. Then the packet will be built, and transmitted via the FIFO. Once complete, the power amplifier will be turned off and the system will return to receive mode. if ( PB1_PIN == 0 ) // On PB1, a packet send is initiated while(PB1_PIN == 0); // wait for release of the button LED1_PIN = 1; // blink the LED length = 7; // send a packet (64 bytes payload) strcpy(&packet[0],"PAYLOAD"); // set packet content R F I d l e ( ) ; / / d i s a b l e r e c e i v i n g RFTransmit(&packet[0],length); // start packet transmission LED1_PIN = 0; // release the LED RFIdle(); // disable transmission RFReceive(); // start continuous receive again b r e a k ; At this point, the program is tests the packet length prior to a direct packet validation, blinking LED2 if expected packet data is received. case RF_PACKET_RECEIVED: // a packet received RFIdle(); // disable the receiver if ( length == 7 ) // check packet content is valid if ( memcmp(&packet[0], "PAYLOAD", 7) == 0 ) LED2_PIN = 1; // blink LED2 if packet received delay_ms(100); LED2_PIN = 0; RFReceive(); // restart continuous receive b r e a k ;

50 Rev. 0.4 Receiver will discard corrupted data packet and restart in continuous receive mode. case RF_CRC_ERROR: // packet received with wrong CRC RFIdle(); // disable receiver RFReceive(); // start continuous receive b r e a k ; d e f a u l t : b r e a k ; + FUNCTION NAME: void Init(void) + DESCRIPTION: This fun ction configures the HW + INPUT: None + RETURN: None + NOTES: None void Hw_Init(void) uint16 i; // Disable the Watchdog Timer PCA0MD &= ~0x40; PCA0MD = 0x00; DisableGlobalIt(); //I/O PORT INIT // P0.0 - Skipped, Open-Drain, Digital // P0.1 - Skipped, Open-Drain, Digital // P0.2 - Skipped, Open-Drain, Analog // P0.3 - Skipped, Open-Drain, Analog // P0.4 - TX0 (UART0), Push-Pull, Digital // P0.5 - RX0 (UART0), Open-Drain, Digital // P0.6 - Skipped, Open-Drain, Digital // P0.7 - Skipped, Open-Drain, Digital // P1.0 - SCK (SPI1), Push-Pull, Digital // P1.1 - MISO (SPI1), Open-Drain, Digital // P1.2 - MOSI (SPI1), Push-Pull, Digital // P1.3 - Skipped, Push-Pull, Digital // P1.4 - Skipped, Push-Pull, Digital // P1.5 - Skipped, Push-Pull, Digital // P1.6 - Skipped, Push-Pull, Digital // P1.7 - Skipped, Push-Pull, Digital // P2.0 - Skipped, Open-Drain, Digital // P2.1 - Skipped, Open-Drain, Digital // P2.2 - Skipped, Push-Pull, Digital // P2.3 - Skipped, Push-Pull, Digital // P2.4 - Skipped, Push-Pull, Digital // P2.5 - Skipped, Push-Pull, Digital // P2.6 - Skipped, Push-Pull, Digital // P2.7 - Skipped, Push-Pull, Digital

Rev. 0.4 51 P0MDIN = 0xF3; P0MDOUT = 0x10; P0SKIP = 0xCF; P1MDIN = 0xFF; P1MDOUT = 0xFD; P1SKIP = 0xF8; P2MDIN = 0xFF; P2MDOUT = 0xFC; P2SKIP = 0xFF; SFRPAGE = CONFIG_PAGE; P0DRV = 0x10; P1DRV = 0xFD; P2DRV = 0xFC; SFRPAGE = LEGACY_PAGE; XBR0 = 0x01; XBR1 = 0x40; XBR2 = 0x40; // set inputs P0 |= 0xE3; //Set P0 inputs P1 |= 0x02; //Set P1 inputs P2 |= 0x03; //Set P2 inputs //default I/O port LED1_PIN = 0; LED2_PIN = 0; LED3_PIN = 0; LED4_PIN = 0; BLED_PIN = 0; LCD_NSEL_PIN = 1; LCD_A0_PIN = 0; LCD_RESET_PIN = 0; // Oscillator init: external XTAL (16MHz), SYSCLK=XTAL/2 OSCXCN = 0x77; // 1ms delay for XTAL stabilization for(i=0;i<500;i++); while ((OSCXCN & 0x80) == 0); CLKSEL = 0x01; //Initialize SPI SetHwMasterSpi(); LED1_PIN = 1; delay_ms(5); LED2_PIN = 1; delay_ms(5); LED1_PIN = 0; delay_ms(5); LED2_PIN = 0;

52 Rev. 0.4 + FUNCTION NAME: void delay_ms(void) + DESCRIPTION: This function generates milliseconds delay + INPUT: Number of milliseconds + RETURN: None + NOTES: None void delay_ms(uint8 delay) xdata uint8 i; xdata uint16 j; for(i=0;i<delay;i++) for(j=0;j<8000;j++); //delay 1ms

Rev. 0.4 53 10. Si4432 The Si4432.c module contains code for all Si4432 relate d RF functions including RF setup parameters; Status Read, Transmit, Receive, and Idle state. There is a global variable (a table) 'RfSettings', which contains the preset modem parameters for each set of different data rates. These settings can be mo dified for other application specific settings using values calculated based on the data sheet or through the EZRadioPRO Register Calculator (available on WDS CDROM). It is suggested to change an entire line in the table if a new setting is desired The RfInitHw () function initializes RF chip registers, I/O ports, timer, and IT routines needed by the RF stack. This function has to be called in the power-on routine. Applicat ion specific parameters include: frequency band, carrier frequency, TX/RX headers, sync words, modem setting, test bus and GPIO pin configurations. Some of the core settings are listed below: 1. Read interrupt status to release the pending interrupts 2. SW reset -> wait for POR interrupt 3. Disable all ITs, except Chip Ready -- 'ichiprdy' 4. Set the non-default Si4432 registers Set VCO Set the AGC Set ADC reference voltage to 0.9V Set capacitance bank to adjust for adjust crystal PPM accuracy and TX/RX offsets Reset digital testbus, disable scan test Select nothing to the Analog Testbus Set center frequency Disable RX-TX headers Set the sync word Set GPIOs functionality Set modem and RF parameters according to the selected DATA rate The RFSetRfParameters() function configures the both the Tx and Rx RF parts of the radio for different (predefined) data rates, deviations and modulation index requirements. This sets up all of the modem settings in addition to the packet handler, CRC, preamble, and preamble detection threshold. Note: The modem setting is a very important part of the RF parameters configuration. To simplify; there is a table in the code to provide common parameter values for a number of data rate configurations, this can be seen below. The values shown have been derived using the EZRadioPRO Register Calculator, available on the WDS CDROM or via the data sheet.

from the radio and clears the IT flags. The RFTransmit() function starts packet transmission and ensures packets are sent successfully. prior to and reading the interrupt status registers. FIFO if all packet handlers and the CRC are correct. Table 6. Registers

56 Rev. 0.4 10.2. Si4432 Header File FILE --- Si4432.h DESCRIPTION Header files for Si4432 usage, cont ains RF specific definition and type declaration CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com #ifndef Si4432_H #define Si4432_H #include "C8051.h" * APPLICATION SPECIFIC DEFINITIONS * // define the default radio frequency #define FREQ_BAND_SELECT 0x75 // frequency band select #define NOMINAL_CAR_FREQ1 0xBB // default carrier frequency: 915 MHz #define NOMINAL_CAR_FREQ2 0x80 //packet settings #define PREAMBLE_LENGTH (4) // 4 byte preamble #define PD_LENGTH (2) // pream ble detection threshold in nibbles The max length of the received data packet is defined here (in data bytes). #define MAX_PAYLOAD_LENGTH (64) * D E F I N I T I O N S * // definitions for register usage #define REG_READ (0x00) #define REG_WRITE (0x80) #define NMBR_OF_SAMPLE_SETTING (9) #define NMBR_OF_PARAMETER (13)

Rev. 0.4 57 * T Y P E D E C L A R A T I O N * // RF stack enumerations typedef enum _RF_ENUM RF_OK = 0x00, // function response parameters RF_ERROR_TIMING = 0x01, RF_ERROR_PARAMETER = 0x02, RF_PACKET_RECEIVED = 0x03, RF_RX_FIFO_ALMOST_FULL = 0x04, RF_NO_PACKET = 0x05, RF_CRC_ERROR = 0x06, } RF_ENUM; typedef enum _RF_SAMPLE_SETTINGS { // Data Rate; Freq Deviation; Receiver Bandwidth DR2400BPS_DEV36KHZ = 0, // DR = 2.4kbps; Fdev = +-36kHz; BBBW = 75.2kHz; DR4800BPS_DEV45KHZ = 1, // DR = 4.8kbps; Fdev = +-45kHz; BBBW = 95.3kHz; DR9600BPS_DEV45KHZ = 2, // DR = 9.6kbps; Fdev = +-45kHz; BBBW = 112.8kHz; DR10000BPS_DEV12KHZ = 3, // DR = 10kbps; Fdev = +-12kHz; BBBW = 41.7kHz; DR20000BPS_DEV12KHZ = 4, // DR = 20kbps; Fdev = +-12kHz; BBBW = 45.2kHz; DR40000BPS_DEV20KHZ = 5, // DR = 40kbps; Fdev = +-20kHz; BBBW = 83.2kHz; DR50000BPS_DEV25KHZ = 6, // DR = 50kbps; Fdev = +-25kHz; BBBW = 112.8kHz; DR100000BPS_DEV50KHZ = 7, // DR = 100kbps; Fdev = +-50kHz; BBBW = 208kHz; DR128000BPS_DEV64KHZ = 8, // DR = 128kbps; Fdev = +-64kHz; BBBW = 269.3kHz; } RF_SAMPLE_SETTINGS; typedef enum _RF_REG_MAP // These settings are for silicon Rev-V2 DeviceType = 0x00, DeviceVersion = 0x01, DeviceStatus = 0x02, InterruptStatus1 = 0x03, InterruptStatus2 = 0x04, InterruptEnable1 = 0x05, InterruptEnable2 = 0x06, OperatingFunctionControl1 = 0x07, OperatingFunctionControl2 = 0x08, CrystalOscillatorLoadCapacitance = 0x09, MicrocontrollerOutputClock = 0x0A, GPIO0Configuration = 0x0B, GPIO1Configuration = 0x0C, GPIO2Configuration = 0x0D, IOPortConfiguration = 0x0E, ADCConfiguration = 0x0F, ADCSensorAmplifierOffset = 0x10, ADCValue = 0x11, TemperatureSensorControl = 0x12, TemperatureValueOffset = 0x13, WakeUpTimerPeriod1 = 0x14, WakeUpTimerPeriod2 = 0x15, WakeUpTimerPeriod3 = 0x16, WakeUpTimerValue1 = 0x17, WakeUpTimerValue2 = 0x18, LowDutyCycleModeDuration = 0x19, LowBatteryDetectorThreshold = 0x1A, BatteryVoltageLevel = 0x1B, IFFilterBandwidth = 0x1C,

58 Rev. 0.4 AFCLoopGearshiftOverride = 0x1D, AFCTimingControl = 0x1E, ClockRecoveryGearshiftOverride = 0x1F, ClockRecoveryOversamplingRatio = 0x20, ClockRecoveryOffset2 = 0x21, ClockRecoveryOffset1 = 0x22, ClockRecoveryOffset0 = 0x23, ClockRecoveryTimingLoopGain1 = 0x24, ClockRecoveryTimingLoopGain0 = 0x25, ReceivedSignalStrengthIndicator = 0x26, RSSIThresholdForClearChannelIndicator = 0x27, AntennaDiversityRegister1 = 0x28, AntennaDiversityRegister2 = 0x29, DataAccessControl = 0x30, EZmacStatus = 0x31, HeaderControl1 = 0x32, HeaderControl2 = 0x33, PreambleLength = 0x34, PreambleDetectionControl = 0x35, SyncWord3 = 0x36, SyncWord2 = 0x37, SyncWord1 = 0x38, SyncWord0 = 0x39, TransmitHeader3 = 0x3A, TransmitHeader2 = 0x3B, TransmitHeader1 = 0x3C, TransmitHeader0 = 0x3D, TransmitPacketLength = 0x3E, CheckHeader3 = 0x3F, CheckHeader2 = 0x40, CheckHeader1 = 0x41, CheckHeader0 = 0x42, HeaderEnable3 = 0x43, HeaderEnable2 = 0x44, HeaderEnable1 = 0x45, HeaderEnable0 = 0x46, ReceivedHeader3 = 0x47, ReceivedHeader2 = 0x48, ReceivedHeader1 = 0x49, ReceivedHeader0 = 0x4A, ReceivedPacketLength = 0x4B, AnalogTestBus = 0x50, DigitalTestBus = 0x51, TXRampControl = 0x52, PLLTuneTime = 0x53, CalibrationControl = 0x55, ModemTest = 0x56, ChargepumpTest = 0x57, ChargepumpCurrentTrimming_Override = 0x58, DividerCurrentTrimming = 0x59, VCOCurrentTrimming = 0x5A, VCOCalibration_Override = 0x5B, SynthesizerTest = 0x5C, BlockEnableOverride1 = 0x5D, BlockEnableOverride2 = 0x5E, BlockEnableOverride3 = 0x5F, ChannelFilterCoefficientAddress = 0x60, ChannelFilterCoefficientValue = 0x61, CrystalOscillator_ControlTest = 0x62, RCOscillatorCoarseCalibration_Override = 0x63, RCOscillatorFineCalibration_Override = 0x64, LDOControlOverride = 0x65,

Rev. 0.4 59 DeltasigmaADCTuning1 = 0x67, DeltasigmaADCTuning2 = 0x68, AGCOverride1 = 0x69, AGCOverride2 = 0x6A, GFSKFIRFilterCoefficientAddress = 0x6B, GFSKFIRFilterCoefficientValue = 0x6C, TXPower = 0x6D, TXDataRate1 = 0x6E, TXDataRate0 = 0x6F, ModulationModeControl1 = 0x70, ModulationModeControl2 = 0x71, FrequencyDeviation = 0x72, FrequencyOffset = 0x73, FrequencyChannelControl = 0x74, FrequencyBandSelect = 0x75, NominalCarrierFrequency1 = 0x76, NominalCarrierFrequency0 = 0x77, FrequencyHoppingChannelSelect = 0x79, FrequencyHoppingStepSize = 0x7A, TXFIFOControl1 = 0x7C, TXFIFOControl2 = 0x7D, RXFIFOControl = 0x7E, FIFOAccess = 0x7F, } RF_REG_MAP; * F U N C T I O N P R O T O T Y P E S * RF_ENUM RfInitHw(U8 data_rate); RF_ENUM RFSetRfParameters(RF_SAMPLE_SETTINGS setting); RF_ENUM RFIdle(void); RF_ENUM RFTransmit(uint8 * packet, uint8 length); RF_ENUM RFReceive(void); RF_ENUM RFPacketReceived(uint8 * packet, uint8 * length); #endif

60 Rev. 0.4 10.3. Si4432 Source File FILE --- Si4432.c DESCRIPTION Contains all Si4432 RF functions CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com #include "C8051.h" #include "Si4432.h" /* GLOBAL variables */ // This table contains the modem parameters for different data rates. See the comments for more details code uint8 RfSettings[NMBR_OF_SAMPLE_SETTING][NMBR_OF_PARAMETER] = // revV2 // IFBW, COSR, CRO2, CRO1, CRO0, CTG1, CTG0, TDR1, TDR0, MMC1, FDEV, AFC, ChargepumpCT {0x01, 0x83, 0xc0, 0x13, 0xa9, 0x00, 0x05, 0x13, 0xa9, 0x20, 0x3a, 0x40, 0x80}, //DR: 2.4kbps, DEV:+-36kHz, BBBW: 75.2kHz {0x04, 0x41, 0x60, 0x27, 0x52, 0x00, 0x0a, 0x27, 0x52, 0x20, 0x48, 0x40, 0x80}, //DR: 4.8kbps, DEV: +-45kHz, BBBW: 95.3kHz {0x91, 0x71, 0x40, 0x34, 0x6e, 0x00, 0x18, 0x4e, 0xa5, 0x20, 0x48, 0x40, 0x80}, //DR: 9.6kbps, DEV: +-45kHz, BBBW:112.8kHz {0x12, 0xc8, 0x00, 0xa3, 0xd7, 0x01, 0x13, 0x51, 0xec, 0x20, 0x13, 0x40, 0x80}, //DR: 10kbps, DEV: +-12kHz, BBBW: 41.7kHz {0x13, 0x64, 0x01, 0x47, 0xAE, 0x04, 0x46, 0xa3, 0xd7, 0x20, 0x13, 0x40, 0x80}, //DR: 20kbps, DEV: +-12kHz, BBBW: 45.2kHz {0x02, 0x64, 0x01, 0x47, 0xae, 0x05, 0x21, 0x0A, 0x3D, 0x00, 0x20, 0x40, 0x80}, //DR: 40kbps, DEV: +-20kHz, BBBW: 83.2kHz {0x05, 0x50, 0x01, 0x99, 0x9A, 0x06, 0x68, 0x0C, 0xCD, 0x00, 0x28, 0x40, 0x80}, //DR: 50kbps, DEV: +-25kHz, BBBW:112.8kHz {0x9A, 0x3C, 0x02, 0x22, 0x22, 0x07, 0xFF, 0x19, 0x9A, 0x00, 0x50, 0x00, 0xC0}, //DR: 100kbps, DEV: +-50kHz, BBBW: 208 kHz {0x89, 0x5e, 0x01, 0x5D, 0x86, 0x02, 0xAB, 0x20, 0xc5, 0x00, 0x66,0x00, 0xC0}, //DR: 128kbps, DEV:+-64kHz, BBBW:269.3kHz idata uint8 ItStatus1,ItStatus2; + FUNCTION NAME: void RfInitHw(void) + DESCRIPTION: Initializes the used I/O pins, SPI and timer peripherals, + IT routines needed for the RF stack + RETURN: None + NOTES: 1) Has to be called in the power-on routine + 2) It initializes the RF chip registers RF_ENUM RfInitHw(U8 data_rate)

Rev. 0.4 61 R F _ N S E L _ P I N = 1 ; // initialize I/O port directions ItStatus1 = SpiRfReadRegister(InterruptStatus1); // read interrupt status ItStatus2 = SpiRfReadRegister(InterruptStatus2); // SW reset -> wait for POR interrupt SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x80); // Enable the POR interrupt while ( RF_NIRQ_PIN == 1); // Wait for the POR interrupt // disable all ITs, except 'ichiprdy' SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00); SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x02); ItStatus1 = SpiRfReadRegister(InterruptStatus1); ItStatus2 = SpiRfReadRegister(InterruptStatus2); // set the non-default Si4432 registers / / s e t V C O SpiRfWriteAddressData((REG_WRITE | VCOCurrentTrimming), 0x7F); SpiRfWriteAddressData((REG_WRITE | DividerCurrentTrimming), 0x40); // set the AGC SpiRfWriteAddressData((REG_WRITE | AGCOverride2), 0x0B); // set ADC reference voltage to 0.9V SpiRfWriteAddressData((REG_WRITE | DeltasigmaADCTuning2), 0x04); The default value on power up should be able to oscillate the crystal. Based on the crystal and PCB capacitance, these cap banks can be used to tune the TX/RX offset. // set cap. bank SpiRfWriteAddressData((REG_WRITE | CrystalOscillatorLoadCapacitance), 0xD7); // reset digital testbus, disable scan test SpiRfWriteAddressData((REG_WRITE | DigitalTestBus), 41);//0x00); // select nothing to the Analog Testbus SpiRfWriteAddressData((REG_WRITE | AnalogTestBus), 0x0B); Important: The band selector command (Configuration Command) should be sent prior to the receiver command since once band selection has been achieved, the synthesizer should be calibrated. Calibration can be done by turning off and on the receiver chain using the receiver command. In the current application the receiver chain is continuously turned on. // set frequency SpiRfWriteAddressData((REG_WRITE | FrequencyBandSelect), FREQ_BAND_SELECT); SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency1), NOMINAL_CAR_FREQ1); SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency0), NOMINAL_CAR_FREQ2); // disable RX-TX headers, SpiRfWriteAddressData((REG_WRITE | HeaderControl1), 0x00 ); SpiRfWriteAddressData((REG_WRITE | HeaderControl2), 0x02 ); // set the sync word

62 Rev. 0.4 Figure 66. SpiRfWriteAddressData((REG_WRITE | SyncWord3), 0x2D); SpiRfWriteAddressData((REG_WRITE | SyncWord2), 0xD4); GPIO definitions // set GPIO0 to RX DATA SpiRfWriteAddressData((REG_WRITE | GPIO0Configuration), 0x14); // set GPIO1 to TX State & GPIO2 to RX State SpiRfWriteAddressData((REG_WRITE | GPIO1Configuration), 0x12); SpiRfWriteAddressData((REG_WRITE | GPIO2Configuration), 0x15); Next, define your RF parameters based on application specific data rate, deviation, receive baseband bandwidth etc., // set modem and RF parameters according to the selected DATA rate RFSetRfParameters(data_rate); return RF_OK;

Rev. 0.4 63 + FUNCTION NAME: RF_ENUM RFSetRfParameters (RF_SAMPLE_SETTINGS setting) + DESCRIPTION: This function configure s the RF part of the chip (both TX and RX) + for different (predefined) data rate, deviation and modulation index + requirements. + RETURN: RF_OK: The operation was successful + RF_ERROR_P ARAMETER: Invalid parameter, operation is ignored. + NOTES: RF_ENUM RFSetRfParameters(RF_SAMPLE_SETTINGS setting) // setup the internal digital modem according the selected RF settings (data rate) SpiRfWriteAddressData((REG_WRITE | IFFilterBandwidth), RfSettings[setting][0] ); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOversamplingRatio), RfSettings[setting][1]); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset2), RfSettings[setting][2]); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset1), RfSettings[setting][3]); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset0), RfSettings[setting][4]); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain1), RfSettings[setting][5]); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain0), RfSettings[setting][6]); SpiRfWriteAddressData((REG_WRITE | TXDataRate1), RfSettings[setting][7]); SpiRfWriteAddressData((REG_WRITE | TXDataRate0), RfSettings[setting][8]); SpiRfWriteAddressData((REG_WRITE | ModulationModeControl1), RfSettings[setting][9]); SpiRfWriteAddressData((REG_WRITE | FrequencyDeviation), RfSettings[setting][10]); SpiRfWriteAddressData((REG_WRITE | AFCLoopGearshiftOverride), RfSettings[setting][11]); SpiRfWriteAddressData((REG_WRITE | ChargepumpCurrentTrimming_Override), RfSettings[setting][12]); // enable packet handler & CRC16 SpiRfWriteAddressData((REG_WRITE | DataAccessControl), 0x8D); SpiRfWriteAddressData((REG_WRITE | ModulationModeControl2), 0x63); // set preamble length & detection threshold SpiRfWriteAddressData((REG_WRITE | PreambleLength), (PREAMBLE_LENGTH << 1)); SpiRfWriteAddressData((REG_WRITE | PreambleDetectionControl), ( PD_LENGTH << 4)); SpiRfWriteAddressData((REG_WRITE | ClockRecoveryGearshiftOverride), 0x03); return RF_OK;

64 Rev. 0.4 + FUNCTION NAME: RF_ENUM RFIdle(void) + DESCRIPTION: Sets the transceiver and the RF stack into IDLE state, + independently of the actual state of the RF stack. + RETURN: RF_OK: The operation was successful + NOTES: RF_ENUM RFIdle(void) // disable transmitter and receiver SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x01); // disable all ITs SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00); SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x00); // read the interrupt status registers from the radio to clear the IT flags ItStatus1 = SpiRfReadRegister(InterruptStatus1); ItStatus2 = SpiRfReadRegister(InterruptStatus2); return RF_OK; + FUNCTION NAME: RF_ENUM RF Transmit(uint8 * packet, uint8 length) + DESCRIPTION: Starts packet transmission + INPUT: MESSAGE structure + RETURN: RF_OK: The packet sent correctly + NOTES: RF_ENUM RFTransmit(uint8 * packet, uint8 length) uint8 temp8; // set packet length SpiRfWriteAddressData((REG_WRITE | TransmitPacketLength), length); for(temp8=0;temp8<length;temp8++) SpiRfWriteAddressData((REG_WRITE | FIFOAccess),packet[temp8]); // enable transmitter SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x09); // enable the packet sent interrupt only SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x04); // read interrupt status registers ItStatus1 = SpiRfReadRegister(InterruptStatus1);

Rev. 0.4 65 ItStatus2 = SpiRfReadRegister(InterruptStatus2); // wait for the packet sent interrupt while(RF_NIRQ_PIN == 1); // packet is sent correctly return RF_OK; + FUNCTION NAME: RF_ENUM RFReceive(void) + DESCRIPTION: Starts packet reception + INPUT: None + RETURN: RF_OK: The operation was successful + NOTES: RF_ENUM RFReceive(void) // enable receiver chain SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x05); // enable the wanted ITs SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x13); SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x00); // read interrupt status registers ItStatus1 = SpiRfReadRegister(InterruptStatus1); ItStatus2 = SpiRfReadRegister(InterruptStatus2); return RF_OK;

66 Rev. 0.4 + FUNCTION NAME: RF_ENUM RFPacketReceived (uint8 * packet, uint8 * length) + DESCRIPTION: Check whether the packet received or not. + INPUT: Pointers for storing data and length + RETURN: RF_PACKET_RECEIVED: Packet received + RF_NO_PACKET: Packet is not yet received + RF_CRC_ERROR: Received a packet with CRC error + NOTES: RF_ENUM RFPacketReceived (uint8 * packet, uint8 * length) xdata uint8 i; // Check if IT occurred or not if( RF_NIRQ_PIN == 0 ) /* check what caused the interrupt */ // read out IT status register ItStatus1 = SpiRfReadRegister(InterruptStatus1); ItStatus2 = SpiRfReadRegister(InterruptStatus2); // packet received interrupt occurred if( (ItStatus1 & 0x02) == 0x02) // read buffer *length = SpiRfReadRegister(ReceivedPacketLength) ; for(i=0;i<*length;i++) *packet++ = SpiRfReadRegister(FIFOAccess); // disable receiver SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x01); return RF_PACKET_RECEIVED; // CRC ERROR interrupt occurred if( (ItStatus1 & 0x01) == 0x01 ) // disable receiver SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x01); return RF_CRC_ERROR; return RF_NO_PACKET;

Rev. 0.4 67 11. C8051 The C8051.c module contains all the low level, 8051 dependent functions. The code mostly comprises of hardware SPI setup and SPI read/write function calls. The SetHwMasterSpi() function initializes the 3-wire HW SPI port. This does not control the nSEL pin. The nSEL pin is controlled separately by RF_NSEL_PIN. The SpiWrite() function sends data through the SPI port (8 bits length). The nSEL pin is controlled separately by RF_NSEL_PIN. The SpiReadWrite() function sends and reads data via th e SPI port (8 bits length). The nSEL pin is controlled separately by RF_NSEL_PIN. The SpiRfWriteAddressData() function sends data through t he SPI port (16 length - 8 bits address, 8 bits data). This function controls the nSEL pin. The SpiRfWriteAddressData() function reads the current value of the register. This function controls the nSEL pin. 11.1. C8051 Header File FILE --- C8051.h DESCRIPTION Contains the 8051 specific declarations, IO declarations, type declarations CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com #ifndef C8051_H #define C8051_H #include <compiler_defs.h> // compiler declarations #include <C8051F930_defs.h> #include <stdio.h> #include <stdlib.h> #include <string.h>

68 Rev. 0.4 * T Y P E D E C L A R A T I O N * //Only these types of variables are used in this software #undef uint8 #undef sint8 #undef uint16 #undef sint16 #undef uint32 #undef sint32 #define uint8 unsigned char #define sint8 signed char #define uint16 unsigned short #define sint16 signed short #define uint32 unsigned long #define sint32 signed long typedef struct unsigned int bit0 : 1; unsigned int bit1 : 1; unsigned int bit2 : 1; unsigned int bit3 : 1; unsigned int bit4 : 1; unsigned int bit5 : 1; unsigned int bit6 : 1; unsigned int bit7 : 1; } reg; typedef union reg testreg; uint8 adat; }reg_union; typedef union reg_union bytes[2]; uint16 adat; }reg16_union; * D E F I N I T I O N S * #undef TRUE #undef FALSE #undef INPUT #undef OUTPUT #define TRUE (1) #define FALSE (0) #define INPUT (1) #define OUTPUT (0)

Rev. 0.4 69 I/O definitions. The RF_NSEL_PIN and RF_NIRQ_PIN port are created separately as the Hardware SPI ports use only 3-wires. //I/O pin definitions SBIT(LED1_PIN, SFR_P1, 4); SBIT(LED2_PIN, SFR_P1, 5); SBIT(LED3_PIN, SFR_P1, 6); SBIT(LED4_PIN, SFR_P1, 7); SBIT(BLED_PIN, SFR_P2, 2); SBIT(PB1_PIN, SFR_P0, 0); SBIT(PB2_PIN, SFR_P0, 1); SBIT(PB3_PIN, SFR_P2, 0); SBIT(PB4_PIN, SFR_P2, 1); //RF chip SBIT(RF_NSEL_PIN, SFR_P1, 3); SBIT(RF_NIRQ_PIN, SFR_P0, 6); //SPI port SBIT(SPI_MISO_PIN, SFR_P1, 1); SBIT(SPI_MOSI_PIN, SFR_P1, 2); SBIT(SPI_SCK_PIN, SFR_P1, 0); //Test card EEPROM SBIT(EE_NSEL_PIN, SFR_P2, 6); //LCD SBIT(LCD_NSEL_PIN, SFR_P2, 5); SBIT(LCD_A0_PIN, SFR_P2, 3); SBIT(LCD_RESET_PIN, SFR_P2, 4); SBIT(LCD_BL_PIN, SFR_P2, 7); #define SYSCLK (16000000L/2) // SYSCLK frequency in Hz #define SPI_CLOCK (SYSCLK/4) #define EnableGlobalIt() EA = 1 #define DisableGlobalIt() EA = 0 * F U N C T I O N P R O T O T Y P E S * void SetHwMasterSpi(void); void SpiWrite(uint8 spi_in); uint8 SpiReadWrite(uint8 spi_in); void SpiWriteByte(uint8 spi_in); void SpiRfWriteAddressData(uint8 address, uint8 d); uint8 SpiRfReadRegister(uint8 address); uint8 SpiReadByteFromTestcardEEPROM(uint16 address); void SpiWriteByteToTestcardEEPROM(uint16 address, uint8 d); void SpiReadSegmentFromTestcardEEPROM(uint16 start_address, uint8 * d, uint8 length); #endif

70 Rev. 0.4 11.2. C8051 Source File FILE --- C8051.c DESCRIPTION Contains all the low level, 8051 dependent functions CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com #include "C8051.h" + FUNCTION NAME: void SetHwMasterSpi(void) + DESCRIPTION: Initialize the HW SPI port + INPUT: Data + RETURN: None + NOTES: It doesn't control the nSEL pin void SetHwMasterSpi(void) SPI1CFG = 0x40; //Master SPI, CKPHA=0, CKPOL=0 SPI1CN = 0x00; //3-wire Single Master, SPI enabled SPI1CKR = (SYSCLK/(2*SPI_CLOCK))-1; SPI1EN = 1; // Enable SPI1 module //set nSEL pins to high RF_NSEL_PIN = 1;

Rev. 0.4 71 + FUNCTION NAME: void SpiWrite(uint8 spi_in) + DESCRIPTION: Sends 8 bits length data through the SPI port + INPUT: Data + RETURN: None + NOTES: It doesn't control the nSEL pin void SpiWrite(uint8 spi_in) SPI1DAT = spi_in; //write data into the SPI register while( SPIF1 == 0); //wait for sending the data S P I F 1 = 0 ; / / c l e a r i n t e r r u p t f l a g + FUNCTION NAME: uint8 SpiReadWrite(uint8 data) + DESCRIPTION: Sends and read 8 bits length data through the SPI port + INPUT: Data + RETURN: Received byte + NOTES: It doesn't control the nSEL pin uint8 SpiReadWrite(uint8 spi_in) SPI1DAT = spi_in; //write data into the SPI register while( SPIF1 == 0); //wait for sending the data S P I F 1 = 0 ; / / c l e a r i n t e r r u p t f l a g return SPI1DAT; //read received bytes + FUNCTION NAME: void SpiRf WriteAddressData(uint8 address, uint8 data1) + DESCRIPTION: Sends 16 length data through the SPI port (address and data) + INPUT: Address - register address + Data - 8bit data + RETURN: None + NOTES: It controls the nSEL pin void SpiRfWriteAddressData(uint8 address, uint8 d) RF_NSEL_PIN = 0; SpiWrite(address); SpiWrite(d); RF_NSEL_PIN = 1;

72 Rev. 0.4 + FUNCTION NAME: uint8 SpiReadRegister(uint8 address) + DESCRIPTION: Read a register of the radio + INPUT: Address - register address + RETURN: Value of the register + NOTES: It controls the nSEL pin of the radio uint8 SpiRfReadRegister(uint8 address) uint8 temp8; RF_NSEL_PIN = 0; SpiReadWrite( address ); temp8 = SpiReadWrite( 0x00 ); RF_NSEL_PIN = 1; return temp8;

Rev. 0.4 73 12. Troubleshooting Q1: My Software Development Board (SDB) displays an error message on startup. A1: Factory firmware is designed to operate with officially approved testcards. The EBID (see Figure 20, “Test Card Characteristics EEPROM (EBID),” on page 17) contain an authentication code to enab le the use of the testcard with the factory firmware. Note: The EBID is only used in conjunction with factory firmware. EBID restrictions are not implemented by default in customer firmware. Figure 67. Error Message The standard error message highlights 1. A missing testcard 2. A missing EEPROM 3. An invalid EEPROM authentication code In addition, the firmware revision is highlighted in order for technical support to assist you. Q2: After the Silicon Labs sp lash screen (which contains the firmware revision), there is an additional screen shown before the setup menu's - What is this for? A2: Authentication codes in the EBID e nable the Silicon Labs to qualify a factory firmwar e build to a particular testcard. If you received these message screens then a testcard is either an engineering testcard or is a specially modified testcard for specific customers. Customers th at have opened a technical support request and that have special requirements may have received modified testcards—in this event, a notification will be displayed.

74 Rev. 0.4 DOCUMENT CHANGE LIST Revision 0.2 to Revision 0.3  Added Lab Mode instructions.  Added software programmers guide.  Updated "7.1.3. Screen 3: Setting up Further RF Parameters" on page 14.  Updated "7.1.8. Running the Demonstration" on page 20.  Updated "7.2. Lab Mode" on page 22.  Added Table 5, “Test Cards Available for Ordering,” on page 22. Revision 0.3 to Revision 0.4  Updated SDBC package kit to reflect new contents. Antenna diversity and split card no longer supplied in the kit.

Rev. 0.4 75 NOTES:

76 Rev. 0.4 CONTACT INFORMATION Silicon Laboratories Inc.

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Product Information

SDBC-DK3UG specifications and overview.

Summary

4 buttons and 4 LEDs for custom purposes

Description

4 buttons and 4 LEDs for custom purposes

Source title SDBC-DK3UG Datasheet(PDF) - Silicon Laboratories

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