S-8423 SII | Alldatasheet
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BATTERY BACKUP IC S-8423 Series et The S-8423 Series is a CMOS IC designed for use in the switching circuits of main and backup power supplies of 3-V or 5-V operation : microcomputers. It consists of two voltage regulators, three voltage detectors, a switchover circuit, and a control circuit. In addition to being able to switch from primary to backup power supplies, the S-8423 Series has three types of voltage detection output signal corresponding to the power supply voltage. The special sequence for switch control prevents unnecessary exhaustion of the backup power supply; this feature is suitable for structuring backup systems. . ™@ Features @ Applications + Low power consumption « Video camera recorder , Normal operation: 43 zA max. (Vin=6 V) + Still video camera Backup: 2.1 ,A max. + Memory card - - Voltage requlator - SRAM backup equipment Small inpuVoutput voltage differences : 0.35 V max. (lout = 50mA) ‘ Output voltage tolerance : + 2% + Three built-in voltage detectors (CS, PREEND, RESET) Detection voltage tolerance: + 2% + Special sequence Backup voltage is not output, if the primary power supply voltage does not reach the RESET voltage that activates a CPU. ™@ Selection Guide Ta = 25° eee [swasars [325 [330 | 337 [3819 | ooo | coer | ao0s [atoo | aro7 | 2255 | 2300 | 2307 | [seas [290 | s.00 [5.10 [4507 [ 4600 [aces [aoe [719 | aaze | 2253 | 2300 | 2397 | * Vro= Vout
$-8423 Series M@ Block Diagram Vout Vin | | Veat i voltage voltage cs Vows detector detector voltage detection detector circuit i control cs? circuit . : , detection fee> circuit Vro Vss Figure 1 : Pin Assignment ‘ 8-pin SSOP - = Output pin of Cs voltage detector Vss 1 875 Vro RESET | Output pin of RESET voltage detector PREEND =%42 7 Vin [_PREEND _ | Output pin of PREEND voltage detector Veat o13 6 Vour Primary power supply input pin cs a4 5 fo RESET Backup power supply input pin Gutput pin of voltage regulator 2 Output pin of voltage regulator 1 * Mount capacitors between Vss (GND) and the Vin, Veat, Vout, and Vro pins. (See “Standard Circuit”) Figure 2 Table 1 Ta=25°C Primary power supply input voltage Vs5-0.3 to 17 Backup power supply input voltage Vss-0.3 to 17 Output voltage of voltage regulator Vs5-0.3 to Vin + 0.3
3 Ves
Output voltage of {RESET Vpeset Vss-0.3 to 17 v PREEND Vere [Powerdisipation =~ iP) | 300 SS*d Cm Operating temperature -40to +85 “a0t9 +125
™@ Electrical Characteristics 1. S-8423AFS Table 2 (Unless otherwise specified : Ta = 25°C) Test Symbol | contons | min | rye [max | une | Output voltage! [| Veo [Vin=6V.tro=30mA | 3.23 | 3.30 [337 [ Vv | VOvoltagedifferencet | Vaitr__[Iro=30mA_ | 2 03s | . i . Vin=6V 5; | bead regulation 1 Avnot [inna 100 pA to.40 mA mv - 7 =6t01 ‘S [Temperature coefficient of Veo | ta =-40°C to 85°C | — | zo | = [mvc] 2 | Vro. Ata a © [Outputvoltage2 | Your [Vin=6Vilour=50mA | 3.23 | 3.30 | 3.37 | V_| TO voltage difference? Tour=50™mA C=) 02 [oss | v ° : Vin=6V : ° — Vout Ata , power supply CS detection voRage | Vern, | DetectsVy | 3819_|_a.000 CS release voliage [+Voen [da 008 | 100 | 4.197 RESET detectionvoltage | -Vorr2__[DetectsVour__ | 2.253 [2.300 | 2.347 , . [RESET release voltage | +Voer, [2.351 | 2.420 | 2.489 v = Vi Vi a7 > [Operating voltage [Vopr [VivorVear | 20 Tt & | detection voltage RTa | Ta=-40°C to 85°C £0.33 mvrc ° a > Vos=0.5v, [Reser | 150 | 230 | — | ma | Sink current ‘sm [Vin=Vear= [PREEND | 1.50 | 230 | —~ | ma | zov [es [+50] 230 | =| ma] {estape caren | Tea ee eee Oe , Veat=2.8V Vi +Voer: | +VoeTt Vear=3V Vv Ve Vv Seapnomnwnw | wer [seat [sah [28m [th | [| $[wonenmnearo [wwe ieee P| — | Le] = . ‘i Vin = open, Vgat=3V & [Mi switch resistance value Rew [oye 1010 500 yA a |7 Vsw1 Ata Temperature coefficient of | AVswe |. _ _anectoasee | — | toa | — [mvre| s | Vsw2 Ala - _ |__tssi_Vin=6V, Untoaded | — [28 as Current consumption part Veat a tere vNEoRS, [enzrc[ — [0 | 21 | ya | unioaded’ [ra=asc | — [| — | ss | ua | supply BAT
$8423 Series 2. S-8423NFS Table 3 (Unless otherwise specified : Ta = 25°C) _ |t symbol eee ee Ouipot vonage! [Vig [Wn 36 V hos mA | Ba 3703S VJ WOvoltagedifferencei [Vai [iro=tSmA | OT co te0 mv . . Vin=3.6V | Load regulation 1 Avro | ing = 100 A to.20 mA mv RO ® [output voltage? [Vor [Viv=36V,lour=15ma [3.135 [73.200 [3.265 [7 V | VOvoltage difference 1 | Vaite [tours 15mA | T2060 mv o Vin = 3.6V & | Load regulation 2 Avourt | icyr = 100 pA to 20 mA 0 | mv & [Temperature coefficientof | AVout |7,--aorctoasrc | — | +048 | — [mvec| Vout, Ata 7 - CS detection voltage | -Voers _[DetectsVin | 3.234 [3.300 [3.366 | VV | CS release voltage [+Voen [8315 3.400 3.aas TV} | RESET detection voltage 2351 | 2400 | 2499 | v_ | ._ [Reset release vonage | +Vorn_| | 2487_[ 2528 [2.899 | v_] v Vi Vv Vi > [Operating voltage [Vopr [Vin orVear | 20 6 ~V, : [Axe |reeacwerc | — | so | — [mune] © | Temperature coefficient of {~A-Voe |7a--a0°cto as" | — | 2036 | — [mvc] © | detection voltage Ata Tas “40°C 10 85°C #08) mre
2 Agee [rsarcwere | = | ser | = [me]
° a > Vos=o.sv, [Reser | 1.50 [230 | — | ma | Sink current Miv=Vear= [PREEND [1.50 | 2.30 | — | ma} pov [es] 150] “230 |] ma] Vos=16V.Vn=tev | — | = | or | oA | - Vaat=2.8V +Voer: | +Voets | +Vpet1 Switchover voltage Vswi Detects Vin x 0.83 «0.85 x 0.87 v This Veat=3V Vout Vout Vout CS output inhibit voltage Vsw2 Detects Vour x0.93 x0.95 x0.97 v ee 2 = Temperature coefficient of | AVswi Ira- —agrcroasrc | — [soe [| = [mvec] a] Vswi Ata Temperature coefficient of Tas 40'C1wasrc | — [eee | [mvec]s | Vsw2 Ata [iss |Vi=3.6V, Unloaded =[ — | 28 [43 | A | [Tearr_|[Vaa=3V | = | 026 | 050 | A | Current consumption texte [NT oRR [Tazasc | — | xo [21 | aa | ar =3V, Unloaded’ [ra=asc | — | — | as | 4a | T , Lsupply
- S-8423LFS Table 4 (Unless otherwise specified : Ta = 25°C) Te [_ramee —|samoat | coatins [win | ve | aoe | une [i cir, Output voltage Ve6V, p= 30mA | 450 5.00_[ 510 | V_| 70 voltage difference’ Tao = 30mA [=~ [0203s v | . , Vin=6V 9 | bead regulation 1 AVRO | ia = 100 pA to 40 mA | - | » | | mv +f : z Vin=6to 16V ° Line regulation 1 AVeo2 |ro=30mA mv > [Temperature coefficient of | AVao |r, --a0-ctoas'c 2071 mvrc = | Vro ta . a“ ® [ourputvoliage? Vu=6Vilon=50mA | 490 | 500 | 510 |v _| VO voltage difference 1 lout = 50 mA { — | 02 [ o3s tv | e . Vin=6V bd Load regulation 2 Avouri lour= 100 uA to 60 mA mv -l 7 Vin=6to 16V . = | Line regulation 2 MVour2 lout = 50 mA mV . > [Temperature coefficient of | _AVout_ +3 --a9°c to a5°c | — [tom | = |mvee| Vout Ata power supply ’ CS detection voltage Detects Vin 4.507 4.600 | 4.693 Gs release vottage [vor | i 809] 79 ae | | RESET detection vokage | -Voera [DetectsVoor ___|_2.253 | 2.300 | 2307 = [ReseTreleasevoitage | +Vorre [2351 2.420 [2.489 ° i a ~Voetz ~Voetz ~Voetz ’ + PREEND detection voltage VpeT3 | Detects Vaart +o1s | +020 | +02 | Y © |PREEND -Voers | Vets | -Voers 5 [Operating voltage | Vepr__[VworVear jf 20 J =f ie Tv ; tasarcwese | — | sas | — [mvrc| © | Temperature coefficient of = 49" 2 + ® | detection voltage Ate | T2= 40°C 10 85°C | -_| £0.33 myvrc : Ange [eareware | — | s0a6 | = [ove ° a > Mos=osv, [Reser [150 [230 | — | ma | Sink current ‘sme Miw=Veat= [PREEND [| 1.50 [230 | — | ma | 2.0V [cesT 50230 [= ma | Leakage current Vos=16V, Vwstev | — | — | ot | oA | ~ Veat=2.8V +Voert | +Voer: | +Vbert Switchover voltage Vow | Detects Vin x0.75 | x0.77 | xo.79 | ¥ inhibi Veat=3V Vout Vout Vout CS output inhibit voltage Vswe Detects Vout x 0.93 x0.95 x0.97 v = i Vin=6V :aicmmeren [wwe fart | - |- 1 fale
2 Vin= open,
3 | M1 switch resistance value Rsw Veat=3V, a |7 a lout = 10to 500 pA eee! | BME fye-wewwe | — [ven | — fowr| | ‘swt Ata Temperature coefficient of AVsw2 Ta= -40°C to 85°C +0.68 mvrc Vsw2 Ata | ssi JViw=6V, Unloaded ~~ ]_— [2945 A | [Tears [Vear=3V ee Current consumption Vin= open [uA | teare yNeoper [Tazasc | — | 0 [21 | ya Unloaded’ [tases | — | — | 3s | A | Input voltage of backup power put voltag PP Vear v |7 supply
M@ Test Circuit ' > v@ | ona Vao OF Vi Vw noornour Veat Vour 100 kG | n =) Mss yer o7 | Mss ne Lt | 3. When measuring Vers, apply 6 V to Viy L | Vw Vout | —t Vour ¢5 mca Vear . — ss Mss RESET |-—{A) Measure the value after applying 5 V or more to Vin 5. 6. - Vin vn Vour Oscilloscope . FG. © | 100 KO 6v Vout Vss cs Oscilloscope @ Vs 7. 8. Vow Vw Your Veer ‘pat Iss, ¥ O@ ® @ vs ‘| 3v Vs To mesure Igarz first apply 3 V to Vga and 6 V or Open and measure the value after applying 6 Vto V, more to Vjy. Then open Viy and measure the current when Vearis 3 V. Figure 3
Operation Timing Chart (S-8423AFS) a ae Vro(V) 4 i ii i i 3 : i 9 : i ji ; F Vear(V) 3 : ; : : A ped - cstv) ar: i i : Hg podiid o—; : + Erne ot i : i RESET(V) 4b i : : iii 2 : ey HE CS, and PREEND and RESET are pulled up to Vour- Figure 4
@ Operation The S-8423 Series consists of two voltage regulators, and three voltage detectors. The voltage regulator 1 regulates input voltage Vin and outputs to Vao. The voltage regulator 2 outputs to Vout. This section describes the functions and operations of each part. 1. Voltage regulators 1 and 2 The built-in regulators have very small I/O voltage difference (Vait1 = 0.2 V typ. at IRo=30 mA). The output voltage of Vao and Vout can be selected independently between 2.8 and 3.8 V by 0.1 V step. 10 voltage difference Vauts or Vente Assume that the Vao voltage when Vin is 6 V and IRo is 30 mA is Vinitial. When the amount voltage of VO voltage difference Vgity or Vgit2 and Vinitial is applied to the Vin pin, 95% of the Vinitial voltage is output at the Vao pin. 2. Switch , _ F a Vout The switch consists of the switch control circuit, . Vsw1 and Vswe detection circuits, voltage regulator Vin ee> hit Veat . 2 and switch transistor M1. °
2.1 Vgwi detection circuit A ;
The Vswi detection circuit monitors the Vin voltage ' and sends the results of detection to the switch i [vs ‘1 e i ‘Switch Vs Vswi control circuit. In the S-8423AFS. (cs detection control det SM dete Wen voltage ranges from 4.0 to 5.0 V), detection voltage circuit circuit circuit (Vsw1) is set to 77+2% of CS release voltage +Vpet1; in the S-8423NFS (CS detection voltage . Tanges from 3.0 to 4.0 V) is set to 85+2% of CS Figure 5 Switch release voltage + VpeT1)-
2.2 Vewa detection circuit
Vswe voltage detector monitors Vout terminal voltage and keeps CS release voltage output low until Vout terminal voltage rises to Vsw2. Then CS output changes from low to high if Vin terminal voltage is more than +Vpe_t; (CS release voltage), when Vout terminal voltage rises to 95% of Vout2 (output voltage of voltage regulator 2). CS output changes from high to low regardless of Vswa, if Vin terminal voltage falls down to less than -VpeT1 (CS detection voltage). CS output holds high if Vin temrinal voltage keeps higher than -VpeT1, when Vour terminal voltage falls down to less than Vsw2 because of undershoot. 2.3 Switch contro! circuit The switch control circuit receives the signal from the Vsw1 detection circuit and controls M1 and voltage regulator 2. The switch control circuit operates in two statuses: the special and normal sequences. In the special sequence status, the circuit does not receive nor control signals according to the Vin (or Vgat) voltage sequence. In the normal sequence status, the circuit receives and controls signals. Initially, the circuit is kept in the special sequence status. When Vin increases until CS signal goes high, the circuit enters the normal sequence status. (1) Special sequence status When the Vin (or Veat) voltage rises , the switch control circuit is kept in the special sequence status until CS signal goes high. At that time, the switch control circuit turns voltage regulator 2 on and turns M1 off regardless of the status of the Vswi detection circuit. The voltage regulator 2 has a switchover function.
(2) Normal sequence status When Vin voltage increases until CS signal, which monitors Vout terminal, goes high, the switch control circuit enters the normal sequence. Once the circuit enters the normal sequence, it turns voltage regulator 2 and M1 on and off according to the Vin voltage as shown in Table 5. It takes hundreds us in the worst case until voltage regulator 2 goes ON from OFF. During this period, as both voltage regulator 2 and M1 are OFF, Vout voltage may drop. To protect this drop, do not fail to add 10 »F or more of capacitor to Vout terminal. . The circuit returns to the special sequence status, when RESET signal goes low. Table 5 Voltage [Viv>Vswi [ON oF Voure | . LViv<Vswi [OFF ONT VearVaies | . 2.4 Switch transistor M1 . Voltage regulator 2 is also used for switch from Vout Vin to Vout. Therefore, no reverse current flows es _ from Vout to Vin, when voltage regulator 2 is off. Vin nee Veat The output voltage of voltage regulator 2 can be J Mt . selected between 2.8 V and 3.8 V by 0.1 V step. L\\ The ON resistance of M1 is 100 9 or less when - lout is between 10 and 500 A. Figure 6 Definitions of Vairts Therefore, when M1 is turned on to connect Vour to Vaart, the maximum voltage drop Vgirg due to M1 is 100 X lout (output current). The minimum output at the Vout pin is Veat-Vait3 (max.). When voltage regulator 2 is on and M1 is off, the leakage current of M1 is kept below 1 yA (Vin=6 V, Ta = 25°C) with the Vgar pin connected to the ground (Vgs). 3. Voltage detector The S-8423 Series has three voltage detectors and Vgwe voltage detector. Three detectors feature high precision and low power consumption with hysteresis characteristics. And Vgw2 voltage detector inhibit CS release output. The power of CS voltage detector is supplied from the Vin and Vpat pins. Therefore, the output is stable as long as the primary or backup power supplies are within the operating voltage range (2 to 16 V). All outputs are Nch open-drains, and need about 100 kn of pull-up resistors. (1) CS voltage detector CS monitors Vin terminal voltage. The detection voltage can be selected between 3.0 and 5.0 V by 0.1 V step. The result of detection is output at the CS pin: “L” for lower voltages than the detection level and “H” for higher voltages than the release level.
$-8423 Series (2) PREEND voltage detector PREEND monitors the Vgat pin. The detection voltage can be selected between 2.2 V and 2.7 V by
0.1 V step, and also higher than RESET voltage with any difference voltage, indicating that the backup
power supply is running out. The result of detection is output at the PREEND pin: “L” for lower voltages than the detection level and “H” for higher voltages than the release level. The power of this detector is supplied from Vix terminal. The output is valid only when voitage Is supplied from Vin terminal to Vout terminal (Vin 2Vgw1) and the output when voltage is supplied from Vat terminal to Vour terminal (Vin < Vgw1) is "L.” (3) RESET voltage detector RESET monitors the Vout pin. The detection voltage can be selected between 2.0 V and 2.7 V by 0.1 V step. The result of detection is output at the RESET pin: “L" for lower voltages than the detection level and “H” for higher voltages than the release level. RESET outputs normal logic when Vout terminal voltage is 1.0 V or more terminal NOTE PREEND and RESET are detected at different pins. In practice, current is taken from the Veat i side, so consider the I/O voltage difference (Vgit3) of M1 when M1 is turned on. . Input voltage Z__. Release voltage NOU 1 Detection voltage - i ' ' i Output voltage Figure 7 Detection potentials of voltage detectors
$-8423 Series Reference data: Type I 1. lout dependency 4.1. Vout pin
1.2 Vro pin
05 0.5 “ FYE “ eae ini 0.3 ‘ingi 03 Ringing [ Ringing amount L414 amount om key TT 0 wt : Efe te | | ; encanl ; EE ETL ; eT TT Ty : 0.09 10 20 30 40 50 60 0.05 10 20 30 40 50 60 ‘ lout (mA) Tro (mA) 2. Cro dependency 2.1 Vout pin 2.2 VrRo pin 0.5 0.5 ern | eer : Taaan : ETE LL | Ringing 93 NS T_T] Ringing °° amount Po] amount ” | LS : PL Pr “ Pe. | ; Pit td : P| | tt 0.05 15 25 35 45 55 005 15 25 35 45 55 Cour (uF) Cro (uF) ——Overshoot «+++ *Undershoot
- AVin dependency AVin shows the difference between the low voltage fixed to 6 V and the high voltage. For example, AViy = 2 V means the difference between 6 V and 8 V. 3.1. Vout pin 3.2 Vro pin 0.4 0.4 lour = 50 mA Iro = 30 mA Coyt = 22 pF, Ta=25°C Cro = 22 pF, Ta= 25°C 0.3 0.3 Ringing Ringing amount amount 92 } 2 ra 4 0.1 KEL 0.4 aaeai . Ad ir i a a i. a a ay Sr Avin (V) AVin(V) 4. Temperature dependency 4.1 Vout pin 4.2 Vro pin ‘ 0.5 0.5 lout = 50 mA tro = 30 mA Cour = 22 pF Cro = 22 uF " PL EL : PEELE 0.3 > — Ri 0.3 er amount _" LEE LET _* Pete 7 nae -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Tac) —— Overshoot s+e++°Undershoot
$-0429 Series Reference data: Type II 1. lout dependency 1.1. Vour pin 1.2 Vro pin 0.5 0.5 : P| | ti : PL ttt amount amount four (mA) Jro (MA) , 2. Cro dependency . 2.1 Vour pin 2.2 Vro pin - Os 05 lour = 50 mA Ino = 30 mA Ta=25°C Ta=25°C ‘ . Pitt " Fi ti Ringing °° Ringing °3 amount on eS ce ee Ad an SO 0.05 15 25 35 45 ss 0.05 15 25 35 45 55 Cour (uF) Cro (uF) 3. Temperature dependency 3.1 Vour pin 3.2 Vro pin 05 urs 50mA 0.5 7 Or30mA Cour = 22 uF Cro = 22 pF we CLEETT Ringing 0.3 ——— Ringing 0.3 ae ere) ae SCE (0) a | (0) ae a LLL LLL . CREPE Fy 0 ao eee) | ~40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Ta(°C) —— Overshoot = ++++*Undershoot
$-8423 Series . Table 8 Parameter dependency due to output current fluctuation P Method to decrease Method to decrease ‘arameter overshoot undershoot [inputvoitage Vw fT Load capacitance Cro Output fluctuation Alour Reference data 1. Vin dependency 1.1 Vout pin 1.2 Vro pin 0.2 0.2 |_| Cour = 22 uF, Ta=25°C a Cao = 22 pF, Ta= 25°C Ringing Ringing amount amount ; i PeEPET i Baaaee | o ef | 1 | | I Vin (V) Vin (V) 2. Cour dependency 2.1 Vout pin 2.2 Vro pin 0.2 0.2 | | Vin =6.0V, Ta = 25°C | || Vin=6.0V, Ta=25°C Ringing Ringing amount amount My \\ ) ASL |_| IN. | 0.0 0.0 PTT 10 20 30 40 50 ° 10 20 30 40 50 Cour (F) Cro (uF) —— Overshoot sree+*Undershoot
- Alout Dependency . i” . Alout or Alo shows the fluctuation between the low current stabilized at 10 ~A and the high current. For example. Alout= 10 mA means the fluctuation between 10 uA and 10 mA. 3.1 Vour pin 3.2 Vpo pin Vin = 6V, Cour = 22 uf, Ta= 25°C Vin = 6V, Cro = 22 pF, Ta = 25°C 0.1 = 0.1 omer P| ee smoune BaRRES amount i ee o 9 10 20 30 40 50 60 0 10 20 30 40 50 60 Alout (mA) ‘Allg (mA) : 4. Temperature dependecy . 4.1 Vout pin 4.2 Vro pin ‘ 02 0.2 P| wae Gituand amount amount 9.4 LTT 0.05390 29 a 60 BO 100 “40-20 0 20 49, 60 80 100 a (* ——~ Overshoot s++++*Undershoot
- Merits in designing (1) A switching circuit for primary and backup power supplies is usually configured with discrete components. The S-8423 Series enables you to configure the circuit with a single chip. Some microcomputers can enter standby mode (or low clock mode) from normal mode (or high clock mode) only, and need about 3 V each time they are used. If a low voltage (such as the backup voltage) is applied to these microcomputers initially, they may run away and vast current consumption may flow. The S-8423 Series is designed to have a special sequence that stops the backup voltage until the primary power supply voltage reaches the initial voltage that trips the switch. (2) Systems can be structured easily. Three types of built-in voltage detectors (CS, PREEND, and RESET) send three types of voltage detection signal to microcomputers. (3) Battery service life are prolonged. - The I/O voltage difference of the voltage regulator 2 switch is very small, and allows the primary power . supply to be used until just before they are completely discharged. a - The current consumption during backup operation is very small (2.1 »A max.), and allows the backup power supply to have a long service life. 2. Design considerations © in applications with small Ino or Igyt, output voltages (VRo and Vout) may rise to cause the load stability to violate standards. Set IRo and lout to 10 vA or more. @ Attach the proper capacitor to the Vout pin to prevent the RESET voltage detector (which monitors the * Vout pin) from being active due to undershoot. @ Watch for overshoot and ensure it does not exceed the ratings of the IC chips and/or capacitors attached to the Varo and Vout pins. © Power dissipation of SSOP8 package is shown as Figure 20. To prevent improper oscillation of the IC, attach a capacitor of 0.014F or more to the Veo pin. @ When the Vin starts to rise from voltage that is more than Vswi. a low pulse of less than 4 ms flows through the PREEND pin even when Vpat is more than the PREEND release voltage. Thus when monitoring the PREEND pin, always make sure it is more than 4 ms after the rising of Vin. © When Viy falls to 0 V, design peripheral circuits so that Vix falls at the falling edge of 10 ms or more (Cout = 10uF, Cro = 10uF). In the case of a falling edge of 10 ms or less, the RESET pin goes “L.” ace Power 300 te SCT Po 200 eee es “COTES 0 DS 250 50 75100125 Ambient temperature Ta (°C) Figure 20 Power dissipation
- Application examples (1) When using a timer microcomputer for backup and displaying PREEND on the main CPU LiL 100 k: “ ce Vw 4 v 10 uf cc “OMEE) 5.8423 series cs a i Veat PREEND __ Timer = || microcomputer 0.1 uF v= —__ = _ aT ao ZL Ves, i . Leo Vee Sen RESET ‘ IoHCh es ICHICHSes Main cpu we iL SEGS Address and data * RESET can be delayed by Rp and Cp. ‘ Figure 21 . (2) When using rechargeable battery as a backup battery Kt + + ZL 10 we ZL 10 pF Vao Vin Your Veo a seasons ia econ = + = Bow Veer cs iw “ RESET. | | 0.1 uff 3V RESET RESET. | = Backup battery can be floating-recharged by using voltage regulator! . Figure 22
$-8423 Series ™@ Characteristics 1. Voltage regulator ($-8423AFS)
1.1 Input voltage (Vin) - Output voltage (Vo) (REG1)
(1) Ta=85°C (2) Tas 25°C 430 Ino = 10 MA, 30. mA, 50 MA, 70 mA 430 Ig = 10 mA, 30 mA, 50 mA, 70 mA ‘ho = 70 mA 230 LOZ 2.30 ZO ZA) 23 28 33 3.8 43 23 28 33 38 43 Vin (V) Vin (V) . (3) Ta=-40°C -
430 Ino = 10 mA, 30 mA, 50 mA, 70 mA
(V) 3.30 f= - ae 2.80 LA eee || : 230 LE 2.3 28 33 3.8 43 Vin (V)
1.2 Input voltage (Vix) - Output voltage (Vout) (REG2)
loyr= 10 mA, 30 mA, 50 MA, 70 mA, 90 mA lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA 3.80 3.80 ‘er sp | | vw ot LL |_| Loe A | mz tour = 90 = 23 28 33 3.8 43 23 28 33 38 43 Vin (V) Vin (V) (3) Ta=-40°C 430 lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA. 3.80 | | | |
280 FA |
Vin (V)
$-8423 Series
1.3 VO voltage difference (Vgi1) - Output voltage (REG1)
(1) Ta=85°C (2) Tas 25°C Igo = 10 mA, 30 mA, 50 mA, 70 mA Ino = 10 MA, 30 mA, 50 mA, 70 mA 1.05 1.05 1 — a a > ? > Vro_ a y Vro | a | ae OT 0.904 J A 0.90 A , Vin ~ Vinitial (V) Vin - Vinitial (V) (3) Ta=-40°C Ino = 10 MA, 30 MA, 50 mA, 70 mA 1.05 1.00 > : Vro. 7 Vinitial W064 . (6) oss AAA : 0.905“ 95 04 06 08 1.0 Vinitial : Vao value when input voltage is 6 V. Vin - Vinitial (V) 1.4 /O voltage difference (Vgit2) - Output voltage (REG2) lour= 10 mA, 30 mA, 50 mA, lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA 70 mA,90 mA 1.05 1.05 7 1.00} > ? = vor VAT V1) Vour_ "°° VT Vinitial iV VV /| Vinitial (04 (%) ogs-A, Z (%) o.9sA_A-A Nour = 90 mA 0.90 y| A A ont Z| vA 0 02 04 06 08 1.0 0 02 04 06 O08 1.0 Vin - Vinitial (V) Vin - Vinitial (V) (3) Ta=-40°C lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA. 1.05 Vour 1:99 TAN Vinitial Y Y V) /| (%) 0.95 Af VV Yroer=20ma /| | Vinitial : Vour value when input voltage is 6 V. 000 2 0s 06 08 10 Vin ~ Vinitial (V)
- 1.5 Output current (Igo) - Output voltage (Vro) 1.6 Output current (lour) - Output voltage (Vour) 3.45 3.4! re) ae] 3.40 3.40 3.35} 25°C 3.35 25°C (VY) 3.30 3.309 SSE aS = Tro (mA) lout (mA) 1.7 Output voltage (Vpo) - Temperature 1.8 Output voltage (Vour) - Temperature . 30 30 . Vin 6V, Inq = 30 mA Vin=6V, lout = 50 mA ; - 20|Based onVao voltage when Ta is 25°C 20} Based onVro voltage when Ta is 25°C I oo : avo | Ltt | TTT) am) FEET TT I | m CEE PNT LEE PN a PSST “CeCe “HEEFT w LETT . -30 -30 40-20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°c) Ta (°C) 1.9 I/O voltage difference (Vgit;) - Temperature 1.10 /O voltage difference (Vgir2) - Temperature 0.4 0.4 LL || | betsome Hanae tours 501A 0.3 0.3 M o2 o2 a 01 aa 01 2 0.0 "-40 -20 0 20 40 60 80 100 0.0.40 -20 0 20 40 60 80 100 Ta(*c) Ta(°C) 1.11 Input stability (Vgo) - Temperature 1.12 Input stability (Vout) - Temperature 0.10 0.10 SEeRECICe Tree] ETT ETT sa Ave 004 aver oo || | | TT TI wooo tt TT LTT Saar] | TTT TTT | LETT TT TT LP etry | | 0.0 CLEC 0.02—+—> STORET} SPP “+40 -20 0 20 40 60 80 100 “" -40 -20 0 20 40 60 80 100 Ta (°C) Ta (°C)
$-8423 Series 1.13 Load stability (Vgo) - Temperature 1.14 Load stability (Vour) - Temperature 140 140 ea ed ie a ea ovo “MO tee SC cw of tt TT tt tt ede a ott ttt ttt | ao _t Tt tt tt | eee i ottt |} ttt | ott. | | tt -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Ta (°C)
- 2. Voltage regulator (S-8423LFS) 2.1. Input voltage (Vin) - Output voltage (Veo) (REG1) 6.00 Ing = 10 mA, 30 mA, 50 mA, 70 mA 6.00 Ing = 10 mA, 30 mA, 50 mA, 70 mA Zan | ey | | From | |
4.00 ZA Z| 4,00 ZA
Vin (Vv) Vin (V) (3) Ta=-40°C . 6.00 Igo = 10. mA, 30 mA, 50 mA, 70 mA . 5.50 OE : Vv) 5.00 2 4.0 45 5.0 5.5 6.0 Vin (V)
2.2 Input voltage (Vix) - Output voltage (Vour) (REG2)
(1) Ta= 85°C (2) Ta=25°C 6.00 lour= 10 mA, 30 MA, 50 mA, 70 mA, 90 MA 6.09 ——lOUT= 10 MA, 30 MA, 50. mA, 70 MA, 90 mA 4.50 LF 4.50 La Vin (V) Vin (V) (3) Ta =-40°C 6.00 loyr = 10 mA, 30 mA, 50 mA, 70 mA, 90 mA. 5.50 (v) Sa 4.0 45 5.0 5.5 6.0 Vin (V)
2.3 VO voltage difference (Vyir;) - Output voltage (REG1)
(1) Ta=8s"c (2) Ta=25°C 105 Igo = 10 MA, 30 mA, 50 mA, 70 mA 105 Ino = 10 mA, 30 MA, 50 MA, 70 mA. 1.00 |} tetas 1.00 | eet Veo VEGA zB —VRo WN) Vinitial VI Vinitial 004 6) 0954414 os ZA . Wa WY - Wa vy, 4 (| ho= 70 mA Z| Z| 0905“ o2 04 06 08 1.0 0900 02 04 06 08 10 Vin — Vinitial (V) Vin - Vinitial (V) (3) Ta=-40°C Tro = 10 MA, 30 mA, 50 MA, 70 mA eee TTT Veo OLS : RO. LA Vinitial W 4 (%) 0.954544 ' ° G Ino = 70 MA 4 Vinitial : Vpo value when input voltage is 6 V. 09 0-O2 04 06 08 1.0 Vin ~ Vinitial (V)
2.4 VO voltage difference (Vgitz) - Output voltage (REG2)
(1) Ta = 85°C (2) Taz 25°C lour= 10 mA, 30 mA, 50 mA, lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA 70 mA, 90 mA 1.05 1.05 1.00 oe 1.00 > = Vout Valatalala' Vout LAA Vinitial HH Vinitial LOK | | I i ©) osha 034 ere LL Asi LLL 099 02 04 06 08 1.0 0900-O2 04 06 08 10 Vin - Vinitial (V) Vin Vinitial (V) (3) Ta=-a0°c lour= 10 mA, 30 mA, 50 mA, 70 mA, 90 mA. 1.05 “T 1.00 tL | Vinitial | (%) 0.95 Z Z| fom) | TT] | | Vinitial: Vour value when input voltage is 6V. 9900-927 04 06 08 10 Vin = Vinitial (V)
~ 2.5 Output current (Igo) - Output voltage (Veo) 2.6 Output current (louy7) - Output voltage (Vout) 5.1 5.1 5.10 az -40°C 5.104 Ta= -40°C es a aks Ng Vour °° ON RO So 0 —_—— () A en Iro (mA) lout (mA) 2.7 Output voltage (Vro) - Temperature 2.8 Output voltage (Vout) - Temperature . 20 30 . Vin= 6 V, Iro = 30 mA, Vin = 6 V, lour = 50 mA . 10 -Based onVao voltage when Ta is 25°C 20}Based onVour voltage when Ta is 25°C o TTS ro} > , avr LE INET ver LIN TTT TT LEN ELEN -20 * \\ -10 -S q] SERRREEKee a tt TT TNT T | Pt TT Tt | I Litt iT ISNT} -40 -30 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta(*c) Tac) 2.9 VO voltage difference (Vygis) - Temperature 2.10 I/O voltage difference (Vgi2) - Temperature 0.3 0.3 0.2 0.2 M o4 Mon rp “0.1 40-20 0 20 40 60 80 100 70.1 “40 -20 0 20 40 60 80 100 Ta (°C) Ta(°C) 2.11 Input stability (Vao) - Temperature 2.12 Input stability (Vour) - Temperature 0.19 0.10 BERRECCUS LL TT iewestna_ | ORRRRRRREn se | Av 004 ava oo ttt | tT I Smeg | LT TE TL | Seog LETT TT TT MELEE)" SCC LEP E T a= ee oa EO ow EET TI | w™ -40 -20 0 20 40 60 80 100 " -40 -20 0 20 40 60 80 100 Ta (°C) Tac)
$:8423 Series 2.13 Load stability (Vgo) - Temperature 2.14 Load stability (Vout) - Temperature 140 140 [ J ty TT [vn=sv | [TT Tt TT ww e=ev | 120 120 wot | | TT TT T | vot | | TT ty Tt Avro apf | | | T Tt Tt | Avour ‘gof_ | | TT TT | Tt | (vy got + | TT Tt tt ot | TT a ea a a oe a i 0 ott ti} ttt | ott TTT Tt tT -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Ta (°C)
- 3. Switch 3.1 Switch voltage (Vsw1)- Temperature 3.2 CS output prohibition voltage (Vswa) - Temperature 50 50 [ TTT pases , [TTT based onvewa volt oo; when Taig SCC when TaisdeC ol | | tT ttt tt | o ttt tit tt Aven ot + +t ttt Tt avon 0} ttt tt tt | Sve TREE wwe ESE ao] | Te. aol |] Tt TNE TT wt tt tt yt aot ttt tT ft eo aot +] | TTT TT aol | TTT Tt tT wot [I Tt tt ty eg a a so LTT TT] tt | a -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Ta (°C) . 3.3 Input voltage (Vear) - Vaart Switch resistance 3.4 Vear Switch resistance - Temperature ° 100 100 a Tete) Lt LETT
60 Rey 99 -
———- beerT itt | 20 | __ no i | | LITT Titi | Veat (V) Ta (°C)
3.5 Vear Switch leak current (ILex) - Temperature
ELL TTT | LTT (nA) SEGSEEER In “COTTA 7 ° -40 -20 0 20 40 60 80 100 Ta (°C)
$-8423 Series 4. Voltage detectors 4.1CS voltage detector (1) Detection voltage (-Vper1) ~ Temperature (2) Output current (Isinx) 50 25 Ta=25°C Based on CS (-Vper1) voltage when Ta is 25°C 20 soe = O-Voen 8 an “ st Tat 0 — mA) PTT TT La 0 2 4 750 "40 -20 0 20 40 60 80 100 ° ' 3 Ta(?) Vos (V) . (3) Output current (Isinx) - Temperature 3.0 Secoooccd } _ Lt | noe | | ee : (mA) 0-40-20 0 20 40 60 80 100 Ta (°C)
4.2 RESET voltage detector
(1) Detection voltage (-Vp_et2) - Temperature (2) Output current (Isinx)
15 Ta=25°C
Based on RESET (-Vper2) 50 na voltage when Ta is 25°C (Voer)?5 Isink || (ow) (mA) 0} et a ee LL Pret 7 eLLET TTT TT Lo |_| -50 t) -40 -20 0 20 40 60 80 100 ° 1 2 3 4 Ta (°C) Vos (V) (3) Output current (Isinx) - Temperature Tipe rna iro PT AKT TTT 3.0 i SO te EL TT AE TT ™ Ltt Trt ° FEEEEEEEE 1.0.40 -20 0 20 40 60 80 100 Ta (°C)
” 4.3 PREEND voltage detector (1) Detection voltage (-Vper3) - Temperature (2) Output current (Isinx) 10.0 50 C voltage when Ta is 25°C . [| vaszov Isnx 6.0 ct oven“) ELT TTT m | A | | a LT TT I 0 ppt soe tL ti Tit v_| [| -40 -20 0 20 40 60 80 100 ( 1 2 3 4 Ta(?C) Vos (V) (3) Output current (Isinx) - Temperature ; “o [ KI | [vn=vear=2.0v, 7 so Shores te ST nL LLL tL} tt PT ty - we Ltt TT tt | -40 -20 0 20 40 60 80 100 . Tac)
$-8423 Series 5. Current consumption 5.1 Viy=Vin current consumption (Iss1) 5.2 Vear~Veara current consumption (Ipara) 40 10 || [Le ETL epee eS / \\ Ta= 5 85°C Ipat2 ee TY 25°C (A) S51 -40°C 4 tot 2 Lhe = 25°C , LL FR setact | | 0 5 [Tota =-40orc 0 2 4 6 8 10 12 14 16 18 o 12 3 4 5 67 8 Vin (V) Vear (V) —— Veat = open - woooo> Vat =3V :
5.3 Temperature
(1) Issx (2) Ipat1 ‘ 60 400 Vin = 6.0V, Vear=3.0V naa Vin= 6.0, Vaar=3.0V - 300 40 lears aN [ttt tt (na) . @ oo “TERA CIN ALLELE “ TTA o 0 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 Ta (°C) Tac) (3) Ipat2 2.0 Sitcaceue em LET TT Lt | “CPT “CETTE 0.0 -40 -20 0 20 40 60 80 100 - Ta(’c)