S8240A

Seiko Instruments Inc

BATTERY PROTECTION IC FOR 1-CELL PACK

Manufacturer: Seiko Instruments Inc

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www.sii-ic.com BATTERY PROTECTION IC FOR 1-CELL PACK © Seiko Instruments Inc., 2015 Rev.1.1_00 Seiko Instruments Inc. 1 The S-8240A Series is a protection IC for lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy voltage detection circuits and delay circuits. The S-8240A Series is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable battery packs from overcharge, overdischarge, and overcurrent.  Features

High-accuracy voltage detection circuit Overcharge detection voltage 3.5 V to 4.6 V (5 mV step) Accuracy ±20 mV Overcharge release voltage 3.1 V to 4.6 V *1 Accuracy ±50 mV Overdischarge detection voltage 2.0 V to 3.4 V (10 mV step) Accuracy ±50 mV Overdischarge release voltage 2.0 V to 3.4 V *2 Accuracy ±100 mV Discharge overcurrent detection voltage 0. 015 V to 0.200 V (5 mV step) Accuracy ±5 mV Load short-circuiting detection voltage 0.065 V to 0.500 V (25 mV step)*3 Accuracy ±40 mV Charge overcurrent detection voltage −0.200 V to −0.015 V (5 mV step) Accuracy ±5 mV
Detection delay times are generated only by an internal circuit (external capacitors are unnecessary).
0 V battery charge function is selectable: Available, unavailable
Power-down function is selectable: Available, unavailable
Release condition of discharge overcurrent status is selectable: Load disconnection, charger connection
Release voltage of discharge overcurrent status is selectable: V RIOV, VDIOV
High-withstand voltage device is used for charger connection pins: VM pin and CO pin: Absolute maximum rating 28 V
Wide operation temperature range Ta = −40°C to +85°C
Low current consumption During operation: 1.5 μA typ., 3.0 μA max. (Ta = +25°C) During power-down: 50 nA max. (Ta = +25°C) During overdischarge: 500 nA max. (Ta = +25°C)
Lead-free (Sn 100%), halogen-free *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (Overcharge hysteresis voltage can be selected from a range of 0 V to 0.4 V in 50 mV step.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (Overdischarge hysteresis voltage can be selected from a range of 0 V to 0.7 V in 100 mV step.) *3. Load short-circuiting detection voltage = Discharge overcurrent detection voltage + 0.025 × n (n can be selected from any integer value greater or equal to 2)  Applications
Lithium-ion rechargeable battery pack
Lithium polymer rechargeable battery pack  Packages
SNT-6A
HSNT-6 (1212)

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 2  Block Diagram Discharge overcurrent detection comparator Control logic Delay circuit Oscillator VM VSS VDD CO DO Overcharge detection comparator Overdischarge detection comparator Load short-circuiting detection comparator Charge overcurrent detection comparator Figure 1

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 3  Product Name Structure 1. Product name S-8240A xx - xxxx U Package abbreviation and IC packing specifications*1 I6T1: SNT-6A, Tape A6T2: HSNT-6 (1212), Tape Serial code*2 Sequentially set from AA to ZZ Environmental code U: Lead-free (Sn 100%), halogen-free *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Packages Table 1 Package Drawing Codes Package Name Dimension Tape Reel Land SNT-6A PG006-A-P-SD PG006-A-C-SD PG006-A-R-SD PG006-A-L-SD HSNT-6 (1212) PM006-A-P-SD PM006-A- C-SD PM006-A-R-SD PM006-A-L-SD

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 4 3. Product name list 3. 1 SNT-6A Table 2 (1 / 2) Product Name Overcharge Detection Voltage [VCU] Overcharge Release Voltage [VCL] Overdischarge Detection Voltage [VDL] Overdischarge Release Voltage [VDU] Discharge Overcurrent Detection Voltage [VDIOV] Load Short- circuiting Detection Voltage [VSHORT] Charge Overcurrent Detection Voltage [VCIOV] Table 2 (2 / 2) Product Name Delay Time Combination*1

0 V Battery Charge

Function Power-down Function Release Condition of Discharge Overcurrent Status Release Voltage of Discharge Overcurrent Status S-8240AAB-I6T1U (1) Unavailable Unavailable Load disconnection VRIOV S-8240AAC-I6T1U (2) Available Unavail able Load disconnection VRIOV S-8240AAD-I6T1U (2) Unavailable Unavailable Load disconnection VRIOV S-8240AAE-I6T1U (3) Available Unavail able Load disconnection VRIOV S-8240AAF-I6T1U (4) Available Unavail able Load disconnection VRIOV S-8240AAG-I6T1U (5) Unavailable Unavailable Load disconnection VRIOV S-8240AAH-I6T1U (3) Unavailable Avail able Load disconnection VRIOV S-8240AAI-I6T1U (2) Available Unavail able Load disconnection VRIOV S-8240AAJ-I6T1U (3) Unavailable Unavailable Load disconnection VRIOV S-8240AAL-I6T1U (6) Unavailable Unavailable Load disconnection VRIOV S-8240AAM-I6T1U (4) Unavailable Unavailable Load disconnection V RIOV S-8240AAN-I6T1U (7) Available Available Load disconnection V RIOV S-8240AAQ-I6T1U (4) Available Available Load disconnection V RIOV S-8240AAR-I6T1U (4) Available Unavailable Load disconnection V RIOV *1. Refer to Table 4 about the details of the delay time combinations. Remark Please contact our sales office for the products with detection voltage value other than those specified above.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 5 3. 2 HSNT-6 (1212) Table 3 (1 / 2) Product Name Overcharge Detection Voltage [VCU] Overcharge Release Voltage [VCL] Overdischarge Detection Voltage [VDL] Overdischarge Release Voltage [VDU] Discharge Overcurrent Detection Voltage [VDIOV] Load Short- circuiting Detection Voltage [VSHORT] Charge Overcurrent Detection Voltage [VCIOV] Table 3 (2 / 2) Product Name Delay Time Combination*1

0 V Battery

Charge Function Power-down Function Release Condition of Discharge Overcurrent Status Release Voltage of Discharge Overcurrent Status S-8240AAC-A6T2U (2) Available Unavail able Load disconnection VRIOV S-8240AAD-A6T2U (2) Unavailable Unavailable Load disconnection VRIOV *1. Refer to Table 4 about the details of the delay time combinations. Remark Please contact our sales office for the products with detection voltage value other than those specified above. Table 4 Delay Time Combination Overcharge Detection Delay Time [tCU] Overdischarge Detection Delay Time [tDL] Discharge Overcurrent Detection Delay Time [tDIOV] Load Short-circuiting Detection Delay Time [tSHORT] Charge Overcurrent Detection Delay Time [tCIOV] (1) 1.0 s 32 ms 16 ms 280 μs 4 ms (2) 1.0 s 64 ms 16 ms 280 μs 8 ms (3) 1.0 s 32 ms 8 ms 280 μs 8 ms (4) 1.0 s 64 ms 8 ms 280 μs 8 ms (5) 1.0 s 64 ms 8 ms 280 μs 4 ms (6) 1.0 s 64 ms 16 ms 280 μs 16 ms (7) 1.0 s 128 ms 8 ms 280 μs 8 ms Remark The delay times can be changed within the range listed in Table 5. For details, please contact our sales office. Table 5 Delay Time Symbol Selection Range Remark Overcharge detection delay time tCU 256 ms 512 ms 1.0 s*1 Select a value from the left. Overdischarge detection delay time tDL 32 ms 64 ms*1 128 ms Select a value from the left. Discharge overcurrent detection delay time t DIOV 4 ms 8 ms*1 16 ms Select a value from the left. Load short-circuiting detection delay Time t SHORT 280 μs*1 530 μs − Select a value from the left. Charge overcurrent detection delay time t CIOV 4 ms 8 ms*1 16 ms Select a value from the left. *1. This value is the delay time of the standard product.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 6  Pin Configurations 1. SNT-6A Top view Figure 2 Table 6 Pin No. Symbol Description

1 NC*1 No connection

2 CO Connection pin of charge control FET gate

(CMOS output)

3 DO Connection pin of discharge control FET gate

(CMOS output)

4 VSS Input pin for negative power supply

5 VDD Input pin for positive power supply

6 VM Voltage detection pin between VM pin and VSS pin

(Overcurrent / charger detection pin) *1. The NC pin is electrically open. The NC pin can be connected to VDD pin or VSS pin. 2. HSNT-6 (1212) Top view Bottom view *1. Connect the heat sink of backside at shadowed area to the board, and set electric potential open or VDD. However, do not use it as the function of electrode. Figure 3 Table 7 Pin No. Symbol Description (CMOS output) (CMOS output) (Overcurrent / charger detection pin) *1. The NC pin is electrically open. The NC pin can be connected to VDD pin or VSS pin.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 7  Absolute Maximum Ratings Table 8 (Ta = +25°C unless otherwise specified) Item Symbol Applied Pin Absolute Maximum Rating Unit Input voltage between VDD pin and VSS pin V DS VDD VSS − 0.3 to VSS + 6 V VM pin input voltage VVM VM V DD − 28 to VDD + 0.3 V DO pin output voltage VDO DO V SS − 0.3 to VDD + 0.3 V CO pin output voltage VCO CO V VM − 0.3 to VDD + 0.3 V Power dissipation SNT-6A PD − 400*1 mW HSNT-6 (1212) − 480*1 mW Operation ambient temperature Topr − −40 to +85 °C Storage temperature Tstg − −55 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 0 50 100 150 400 200 Power Dissipation (PD) [mW] Ambient Temperature (Ta) [°C] 700 300 100 500 600 SNT-6A HSNT-6 (1212) Figure 4 Power Dissipation of Package (When Mounted on Board)

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 8  Electrical Characteristics 1. Ta = +25°C Table 9 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Detection Voltage Overcharge detection voltage VCU − V CU − 0.020 V CU V CU + 0.020 V 1 Ta = −10°C to +60°C*1 VCU − 0.025 V CU V CU + 0.025 V 1 Overcharge release voltage VCL VCL ≠ VCU V CL − 0.050 V CL V CL + 0.050 V 1 VCL = VCU V CL − 0.025 V CL V CL + 0.020 V 1 Overdischarge detection voltage VDL − V DL − 0.050 V DL V DL + 0.050 V 2 Overdischarge release voltage VDU VDL ≠ VDU V DU − 0.100 V DU V DU + 0.100 V 2 VDL = VDU V DU − 0.050 V DU V DU + 0.050 V 2 Discharge overcurrent detection voltage VDIOV − V DIOV − 0.005 V DIOV V DIOV + 0.005 V 2 Load short-circuiting detection voltage VSHORT − V SHORT − 0.040 V SHORT V SHORT + 0.040 V 2 Charge overcurrent detection voltage VCIOV − V CIOV − 0.005 V CIOV V CIOV + 0.005 V 2 Discharge overcurrent release voltage VRIOV − V DD − 1.2 V DD − 0.8 V DD − 0.5 V 2

0 V Battery Charge Function

0 V battery charge starting charger voltage V0CHA 0 V battery charge function

"available" 0.0 0.7 1.5 V 2

0 V battery charge inhibition battery voltage V0INH 0 V battery charge function

"unavailable" 0.9 1.2 1.5 V 2 Internal Resistance Resistance between VDD pin and VM pin RVMD V DD = 1.8 V, VVM = 0 V 750 1500 3000 kΩ 3 Resistance between VM pin and VSS pin RVMS V DD = 3.4 V, VVM = 1.0 V 10 20 30 k Ω 3 Input Voltage Operation voltage between VDD pin and VSS pin V DSOP1 − 1.5 − 6.0 V − Operation voltage between VDD pin and VM pin V DSOP2 − 1.5 − 28 V − Input Current Current consumption during operation IOPE V DD = 3.4 V, VVM = 0 V − 1.5 3.0 μA 3 Current consumption during power-down IPDN V DD = VVM = 1.5 V − − 50 nA 3 Current consumption during overdischarge IOPED V DD = VVM = 1.5 V − − 0.5 μA 3 Output Resistance CO pin resistance "H" RCOH − 5 10 20 kΩ 4 CO pin resistance "L" RCOL − 5 10 20 kΩ 4 DO pin resistance "H" RDOH − 5 10 20 kΩ 4 DO pin resistance "L" RDOL − 5 10 20 kΩ 4 Delay Time Overcharge detection delay time tCU − t CU × 0.7 tCU tCU × 1.3 − 5 Overdischarge detection delay time tDL − tDL × 0.7 tDL tDL × 1.3 − 5 Discharge overcurrent detection delay time tDIOV − tDIOV × 0.7 tDIOV tDIOV × 1.3 − 5 Load short-circuiting detection delay time tSHORT − tSHORT × 0.7 tSHORT tSHORT × 1.3 − 5 Charge overcurrent detection delay time tCIOV − tCIOV × 0.7 tCIOV tCIOV × 1.3 − 5 *1. Since products are not screened at high and low temperature, the specif ication for this temperatur e range is guaranteed by design, not tested in production.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 9 2. Ta = −40°C to +85°C*1 Table 10 (Ta = −40°C to +85°C*1 unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Detection Voltage Overcharge detection voltage VCU − V CU − 0.045 V CU V CU + 0.030 V 1 Overcharge release voltage VCL VCL ≠ VCU V CL − 0.080 V CL V CL + 0.060 V 1 VCL = VCU V CL − 0.050 V CL V CL + 0.030 V 1 Overdischarge detection voltage VDL − V DL − 0.080 V DL V DL + 0.060 V 2 Overdischarge release voltage VDU VDL ≠ VDU V DU − 0.130 V DU V DU + 0.110 V 2 VDL = VDU V DU − 0.080 V DU V DU + 0.060 V 2 Discharge overcurrent detection voltage VDIOV − V DIOV − 0.005 V DIOV V DIOV + 0.005 V 2 Load short-circuiting detection voltage VSHORT − V SHORT − 0.040 V SHORT V SHORT + 0.040 V 2 Charge overcurrent detection voltage VCIOV − V CIOV − 0.005 V CIOV V CIOV + 0.005 V 2 Discharge overcurrent release voltage VRIOV − V DD − 1.4 V DD − 0.8 V DD − 0.3 V 2 "available" 0.0 0.7 1.7 V 2 "unavailable" 0.7 1.2 1.7 V 2 Internal Resistance Resistance between VDD pin and VM pin RVMD V DD = 1.8 V, VVM = 0 V 500 1500 6000 kΩ 3 Resistance between VM pin and VSS pin RVMS V DD = 3.4 V, VVM = 1.0 V 7.5 20 40 k Ω 3 Input Voltage Operation voltage between VDD pin and VSS pin V DSOP1 − 1.5 − 6.0 V − Operation voltage between VDD pin and VM pin V DSOP2 − 1.5 − 28 V − Input Current Current consumption during operation IOPE V DD = 3.4 V, VVM = 0 V − 1.5 4.0 μA 3 Current consumption during power-down IPDN V DD = VVM = 1.5 V − − 150 nA 3 Current consumption during overdischarge IOPED V DD = VVM = 1.5 V − − 1.0 μA 3 Output Resistance CO pin resistance "H" RCOH − 2.5 10 30 k Ω 4 CO pin resistance "L" RCOL − 2.5 10 30 k Ω 4 DO pin resistance "H" RDOH − 2.5 10 30 k Ω 4 DO pin resistance "L" RDOL − 2.5 10 30 kΩ 4 Delay Time Overcharge detection delay time tCU − tCU × 0.5 tCU tCU × 2.5 − 5 Overdischarge detection delay time tDL − tDL × 0.5 tDL tDL × 2.5 − 5 Discharge overcurrent detection delay time tDIOV − tDIOV × 0.5 tDIOV tDIOV × 2.5 − 5 Load short-circuiting detection delay time tSHORT − tSHORT × 0.5 tSHORT tSHORT × 2.5 − 5 Charge overcurrent detection delay time tCIOV − tCIOV × 0.5 tCIOV tCIOV × 2.5 − 5 *1. Since products are not screened at high and low temperature, the specif ication for this temperatur e range is guaranteed by design, not tested in production.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 10  Test Circuits Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (V CO) and DO pin (V DO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to V VM and the DO pin level with respect to VSS. 1. Overcharge detection voltage, overcharge release voltage (Test circuit 1) Overcharge detection voltage (VCU) is defined as the voltage V1 at which V CO goes from "H" to "L" when the voltage V1 is gradually increased from the starting conditi on of V1 = 3.4 V. Over charge release voltage (V CL) is defined as the voltage V1 at which V CO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between VCU and VCL. 2. Overdischarge detection voltage, overdischarge release voltage (Test circuit 2) Overdischarge detection voltage (VDL) is defined as the voltage V1 at which V DO goes from "H" to "L" when the voltage V1 is gradually decreased from the star ting conditions of V1 = 3.4 V, V2 = 0 V. Overdischarge release voltage (V DU) is defined as the voltage V1 at which V DO goes from "L" to "H" when setting V2 = 0.01 V and when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference between VDU and VDL. 3. Discharge overcurrent detection voltage, discharge overcurrent release voltage (Test circuit 2) 3. 1 Release voltage of discharge overcurrent status "VDIOV" Discharge overcurrent detection voltage (V DIOV) is defined as the voltage V2 whose delay time for changing V DO from "H" to "L" is discharge overcurrent detection delay time (t DIOV) when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 3. 2 Release voltage of discharge overcurrent status "VRIOV" VDIOV is defined as the voltage V2 whose delay time for changing VDO from "H" to "L" is tDIOV when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = 0 V. Discharge overcurrent release voltage (VRIOV) is defined as the voltage V2 at which V DO goes from "L" to "H" when the voltage V2 is then gradually decreased from the starting condition of V1 = 3.4 V. 4. Load short-circuiting detection voltage (Test circuit 2) Load short-circuiting detection voltage (V SHORT) is defined as the voltage V2 whose delay time for changing V DO from "H" to "L" is load short-circuiting detection delay time (t SHORT) when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 5. Charge overcurrent detection voltage (Test circuit 2) Charge overcurrent detection voltage (VCIOV) is defined as the voltage V2 whose delay time for changing VCO from "H" to "L" is charge overcurrent detection delay time (tCIOV) when the voltage V2 is decreased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 6. Current consumption during operation (Test circuit 3) The current consumption during operation (I OPE) is the current that flows through the VDD pin (I DD) under the set conditions of V1 = 3.4 V and V2 = 0 V.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 11 7. Current consumption during power-down, current consumption during overdischarge (Test circuit 3) 7. 1 With power-down function The current consumption during power-down (IPDN) is IDD under the set conditions of V1 = V2 = 1.5 V. 7. 2 Without power-down function The current consumption during overdischarge (IOPED) is IDD under the set conditions of V1 = V2 = 1.5 V. 8. Resistance between VDD pin and VM pin (Test circuit 3) RVMD is the resistance between VDD pin and VM pin under the set conditions of V1 = 1.8 V, V2 = 0 V. 9. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status "load disconnection") (Test circuit 3) RVMS is the resistance between VM pin and VSS pin under the set conditions of V1 = 3.4 V, V2 = 1.0 V. 10. CO pin resistance "H" (Test circuit 4) The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V, V2 = 0 V, V3 = 3.0 V. 11. CO pin resistance "L" (Test circuit 4) The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.7 V, V2 = 0 V, V3 = 0.4 V. 12. DO pin resistance "H" (Test circuit 4) The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V, V2 = 0 V, V4 = 3.0 V. 13. DO pin resistance "L" (Test circuit 4) The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V, V2 = 0 V, V4 = 0.4 V. 14. Overcharge detection delay time (Test circuit 5) The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases and exceeds VCU under the set conditions of V1 = 3.4 V, V2 = 0 V. 15. Overdischarge detection delay time (Test circuit 5) The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and falls below VDL under the set conditions of V1 = 3.4 V, V2 = 0 V.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 12 16. Discharge overcurrent detection delay time (Test circuit 5) The discharge overcurrent detection delay time (t DIOV) is the time needed for V DO to go to "L" after the voltage V2 increases and exceeds VDIOV under the set conditions of V1 = 3.4 V, V2 = 0 V. 17. Load short-circuiting detection delay time (Test circuit 5) The load short-circuiting detection delay time (t SHORT) is the time needed for V DO to go to "L" after the voltage V2 increases and exceeds VSHORT under the set conditions of V1 = 3.4 V, V2 = 0 V. 18. Charge overcurrent detection delay time (Test circuit 5) The charge overcurrent detection delay time (t CIOV) is the time needed for V CO to go to "L" after the voltage V2 decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = 0 V. 19. 0 V battery charge starting charger voltage (0 V battery charge function "available") (Test circuit 2) The 0 V battery charge starting charger voltage (V 0CHA) is defined as the absolute va lue of voltage V2 at which V CO goes to "H" (VCO = VDD) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = 0 V. 20. 0 V battery charge inhibition battery voltage (0 V battery charge function "unavailable") (Test circuit 2) The 0 V battery charge inhibition battery voltage (V 0INH) is defined as the voltage V1 at which V CO goes to "L" (V CO = VVM) when the voltage V1 is gradually decreased, after setting V1 = 1.9 V, V2 = −4.0 V.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 14  Operation Remark 1. Refer to " Battery Protection IC Connection Example". 2. Unless otherwise specified, the VM pin voltage is based on VSS. 1. Normal status The S-8240A Series monitors the voltage of the battery connected between VDD pin and VSS pin, the voltage between VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from overdischarge detection voltage (V DL) to overcharge detection voltage (V CU), and the VM pin voltage is in the range from charge overcurrent detection voltage (V CIOV) to discharge overcurrent detection voltage (V DIOV), the S-8240A Series turns both the charge and discharge control FETs on. This condition is ca lled the normal status, and in this condition charging and discharging can be carried out freely. The resistance between VDD pin and VM pin (R VMD), and the resistance bet ween VM pin and VSS pin (R VMS) are not connected in the normal status. Caution When the battery is connected for the first time, the S-8240A Series may not be in the normal status. In this case, short VM pin and VSS pin, or set the VM pin voltage at the level of V CIOV or more and at the level of VDIOV or less by connecting the charger. The S-8240A Series then becomes the normal status. 2. Overcharge status 2. 1 VCL ≠ VCU (Product in which overcharge release voltage differs from overcharge detection voltage) When the battery voltage becomes higher than V CU during charging in the normal status and the condition continues for the overcharge detection delay time (t CU) or longer, the S-8240A Series turn s the charge control FET off to stop charging. This condition is called the overcharge status. The overcharge status is released in the following two cases. (1) In the case that the VM pin voltage is lower than VDIOV, the S-8240A Series releases the overcharge status when the battery voltage falls below overcharge release voltage (VCL). (2) In the case that the VM pin vo ltage is equal to or higher than V DIOV, the S-8240A Series releases the overcharge status when the battery voltage falls below V CU. When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf voltage of the parasitic diode than the VSS pin voltage, be cause the discharge current flows through the parasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than V DIOV, the S-8240A Series releases the overcharge status when the battery voltage is equal to or lower than VCU. Caution If the battery is charged to a voltage higher than V CU and the battery voltage does not fall below V CU even when a heavy load is connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below V CU. Since an actual battery has an internal impedance of tens of m Ω, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting detection function. 2. 2 V CL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage) When the battery voltage becomes higher than V CU during charging in the normal status and the condition continues for the overcharge detection delay time (t CU) or longer, the S-8240A Series turn s the charge control FET off to stop charging. This condition is called the overcharge status. In the case that the VM pin voltage is equal to or higher than 0 V typ., the S-8240A Series releases the overcharge status when the battery voltage falls below VCU. Caution 1. If the battery is charged to a voltage higher than V CU and the battery voltage does not fall below VCU even when a heavy load is connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below V CU. Since an actual battery has an internal impedance of tens of m Ω, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting detection function. 2. When a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below V CL. The overcharge status is released when the VM pin voltage goes over 0 V typ. by removing the charger.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 15 3. Overdischarge status When the battery voltage falls below V DL during discharging in the normal status and the condition continues for the overdischarge detection delay time (t DL) or longer, the S-8240A Series turns the discharge control FET off to stop discharging. This condition is called the overdischarge status. Under the overdischarge status, VDD pin and VM pin are shorted by R VMD in the S-8240A Series. The VM pin voltage is pulled up by RVMD. RVMS is not connected in the overdischarge status. 3. 1 With power-down function Under the overdischarge status, when voltage difference betw een VDD pin and VM pin is 0.8 V typ. or lower, the power-down function works and the current consumption is reduced to the current consumption during power-down (IPDN). By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or lower.

When a battery is not connected to a charger and the VM pin voltage ≥ 0.7 V typ., the S-8240A Series maintains the overdischarge status even when the battery voltage reaches VDU or higher.
When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage reaches VDU or higher and the S-8240A Series releases the overdischarge status.
When a battery is connect ed to a charger and 0 V typ. ≥ the VM pin voltage, the battery voltage reaches V DL or higher and the S-8240A Series releases the overdischarge status. 3. 2 Without power-down function The power-down function does not work even when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower.
When a battery is not connected to a charger and the VM pin voltage ≥ 0.7 V typ., the battery voltage reaches V DU or higher and the S-8240A Series releases the overdischarge status.
When a battery is connected to a charger and 0.7 V typ. > the VM pin voltage > 0 V typ., the battery voltage reaches VDU or higher and the S-8240A Series releases the overdischarge status.
When a battery is connected to a charger and 0 V typ. ≥ the VM pin voltage, the battery voltage reaches V DL or higher and the S-8240A Series releases the overdischarge status. 4. Discharge overcurrent status (discharge overcurrent, load short-circuiting) When a battery in the normal status is in the status where the VM pin vo ltage is equal to or higher than V DIOV because the discharge current is equal to or hi gher than the specified val ue and the status lasts fo r the discharge overcurrent detection delay time (t DIOV) or longer, the discharge control FET is turned off and discharging is stopped. This status is called the discharge overcurrent status. 4. 1 Release condition of discharge overcurrent status "load disconnection" and relea se voltage of discharge overcurrent status "VDIOV" Under the discharge overcurrent status , VM pin and VSS pin are shorted by R VMS in the S-8240A Series. However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is co nnected. When the load is disconnected, VM pin returns to the VSS pin voltage. When the VM pin voltage returns to VDIOV or lower, the S-8240A Series releases the discharge overcurrent status. RVMD is not connected in the discharge overcurrent status. 4. 2 Release condition of discharge overcurrent status "load disconnection" and relea se voltage of discharge overcurrent status "VRIOV" Under the discharge overcurrent status , VM pin and VSS pin are shorted by R VMS in the S-8240A Series. However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When the load is disconnected, VM pin returns to the VSS pin voltage. When the VM pin voltage returns to VRIOV or lower, the S-8240A Series releases the discharge overcurrent status. RVMD is not connected in the discharge overcurrent status. 4. 3 Release condition of discharge overcurrent status "charger connection" Under the discharge overcurrent status, VM pin and VDD pin are shorted by RVMD in the S-8240A Series. When a battery is connected to a charger and the VM pin voltage returns to V DIOV or lower, the S-8240A Series releases the discharge overcurrent status. R VMS is not connected in the discharge overcurrent status.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 16 5. Charge overcurrent status When a battery in the normal status is in the status where the VM pin voltage is equal to or lower than VCIOV because the charge current is equal to or higher th an the specified value and the status lasts for the charge overcurrent detection delay time (tCIOV) or longer, the charge control FET is turned off and char ging is stopped. This status is called the charge overcurrent status. The S-8240A Series releases the charge over current status when the VM pin voltag e returns to 0 V typ. or higher by removing the charger. The charge overcurrent detection function does not work in the overdischarge status. 6. 0 V battery charge function "available" This function is used to recharge a battery whose voltage is 0 V due to self-discharge. When the 0 V battery charge starting charger voltage (V 0CHA) or a higher voltage is applied between the EB + and EB− pins by connecting a charger, the charge control FET gate is fixed to the VDD pin voltage. When the voltage between the gate and source of the charge control FET becomes equal to or higher than the threshold voltage due to the charger voltage, the charge control FET is turned on to st art charging. At this time, the discharge control FET is off and the charging current flows through t he internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than VDU, the S-8240A Series enters the normal status. Caution 1. Some battery providers do not recommend charging for a completely self-discharged lithium-ion rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 2. The 0 V battery charge function has higher priority than the charge overcurrent detection function. Consequently, a product in which use of the 0 V battery charge function is enabled charges a battery forcibly and the charge overcurrent cannot be detected when the battery voltage is lower than V DL. 7. 0 V battery charge function "unavailable" This function inhibits recharging when a battery that is inte rnally short-circuited (0 V ba ttery) is connected. When the battery voltage is the 0 V battery charge inhibition battery voltage (V 0INH) or lower, the charge control FET gate is fixed to the EB− pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be performed. Caution Some battery providers do not recommend charging for a completely self-discharged lithium-ion rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 17 8. Delay circuit The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter. Remark tDIOV and t SHORT start when V DIOV is detected. When V SHORT is detected over t SHORT after V DIOV, the S-8240A Series turns the discharge control FET off within tSHORT from the time of detecting VSHORT. DO pin voltage VM pin voltage VDD VDD Time VDIOV VSS VSS VSHORT tSHORT Time tD 0 ≤ tD ≤ tSHORT Figure 10

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 18  Timing Charts 1. Overcharge detection, overdischarge detection VCU VDU (VDL + VHD) VDL VCL (VCU − VHC) Battery voltage VSS CO pin voltage VDD DO pin voltage VSS Charger connection Load connection Status*1 VDIOV VSS VM pin voltage VDD VEB− VDD VCIOV VEB− Overdischarge detection delay time (tDL) Overcharge detection delay time (tCU) *1. (1): Normal status (2): Overcharge status (3): Overdischarge status Figure 11

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 19 2. Discharge overcurrent detection 2. 1 Release condition of discharge overcurrent status "load disconnection" VRIOV VDD VSS VSHORT (1) (2) (1) (1)(2) VDIOV VCU VDU (VDL + VHD) VDL VCL (VCU − VHC) Battery voltage VSS CO pin voltage VDD DO pin voltage VSS Load connection Status*1 VM pin voltage VDD Discharge overcurrent detection delay time (tDIOV) Load short-circuiting detection delay time (tSHORT) *1. (1): Normal status (2): Discharge overcurrent status Figure 12

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 20 2. 2 Release condition of discharge overcurrent status "charger connection" VDD VSS VSHORT VDIOV VCU VDU (VDL + VHD) VDL VCL (VCU − VHC) Battery voltage VSS CO pin voltage VDD DO pin voltage VSS Load connection VM pin voltage VDD VCIOV Charger connection VEB− (1) (2) (1) (1)(2) Status*1 VRIOV Discharge overcurrent detection delay time (tDIOV) Load short-circuiting detection delay time (tSHORT) *1. (1): Normal status (2): Discharge overcurrent status Figure 13

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 21 3. Charge overcurrent detection (2) Load connection Overdischarge detection delay time (tDL) (1) (1) (2) VDD DO pin voltage VSS VDD VSS CO pin voltage VDD VSS VM pin voltage VCIOV Status*1 (3)(1) Charger connection VEB− VEB− Charge overcurrent detection delay time (tCIOV) VCU VDU (VDL + VHD) VDL VCL (VCU − VHC) Battery voltage Charge overcurrent detection delay time (tCIOV) *1. (1): Normal status (2): Charge overcurrent status (3): Overdischarge status Figure 14

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 22  Battery Protection IC Connection Example Battery C1 VSS DO VDD CO VM S-8240A Series FET1 FET2 EB− EB+ Figure 15 Table 11 Constants for External Components Symbol Part Purpose Min. Typ. Max. Remark FET1 N-channel MOS FET Discharge control − − − Threshold voltage ≤ Overdischarge detection voltage*1 FET2 N-channel MOS FET Charge control − − − Threshold voltage ≤ Overdischarge detection voltage R1 Resistor ESD protection, For power fluctuation 270 Ω 330 Ω 1 k Ω − C1 Capacitor For power fluctuation 0.068 μF 0.1 μF1 . 0 μF Caution should be exercised when setting VDIOV ≤ 20 mV, VCIOV ≥ −20 mV.*2 R2 Resistor ESD protection, Protection for reverse connection of a charger 300 Ω 1 k Ω 4 k Ω − *1. If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stopped before overdi scharge is detected. *2. When setting V DIOV ≤ 20 mV, VCIOV ≥ −20 mV for power fluctuation protection, the condition of R1 × C1 ≥ 47 μF • Ω should be met. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 23  Precautions

The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 24  Characteristics (Typical Data) 1. Current consumption 1. 1 IOPE vs. Ta 1. 2 IPDN vs. Ta 4.0 IOPE [A] 40 85 75 50 25 025 Ta [C] 0.0 3.0 2.0 1.0 0.15 IPDN [A] 40 85 75 50 25 025 Ta [C] 0.00 0.10 0.05 1. 3 IOPED vs. Ta 1.0 IOPED [A] 40 85 75 50 25 025 Ta [C] 0.0 0.8 0.6 0.4 0.2 1. 4 IOPE vs. VDD 1. 4. 1 With power-down function 1. 4. 2 Without power-down function 4.0 IOPE [A] VDD [V] 0.0 3.0 2.0 1.0 5 4 3 2 1 4.0 IOPE [A] VDD [V] 0.0 3.0 2.0 1.0 5 4 3 2 1

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 25 2. Detection voltage 2. 1 VCU vs. Ta 2. 2 VCL vs. Ta 4.51 VCU [V] 40 85 75 50 25 025 Ta [C] 4.43 4.49 4.47 4.45 4.34 VCL [V] 40 85 75 50 25 025 Ta [C] 4.19 4.22 4.31 4.28 4.25 2. 3 VDL vs. Ta 2. 4 VDU vs. Ta 2.58 VDL [V] 40 85 75 50 25 025 Ta [C] 2.42 2.54 2.50 2.46 3.01 VDU [V] 40 85 75 50 25 025 Ta [C] 2.77 2.95 2.89 2.83 2. 5 VDIOV vs. Ta 2. 6 VSHORT vs. Ta 0.070VDIOV [V] 40 85 75 50 25 025 Ta [C] 0.060 0.064 0.066 0.068 0.062 0.23 VSHORT [V] 40 85 75 50 25 025 Ta [C] 0.15 0.21 0.19 0.17 2. 7 VCIOV vs. Ta 0.045VCIOV [V] 40 85 75 50 25 025 Ta [C] 0.055 0.047 0.049 0.053 0.051

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 26 3. Delay time 3. 1 tCU vs. Ta 3. 2 tDL vs. Ta 2.5 tCU [s] 40 85 75 50 25 025 Ta [C] 0.5 2.0 1.5 1.0 tDL [ms] 40 85 75 50 25 025 Ta [C] 3. 3 tDIOV vs. VDD 3. 4 tDIOV vs. Ta tDIOV [ms] VDD [V] 5432 tDIOV [ms] 40 85 75 50 25 025 Ta [C] 3. 5 tSHORT vs. VDD 3. 6 tSHORT vs. Ta 700 tSHORT [s] 140 VDD [V] 5432 560 420 280 700 40 85 75 50 25 025 Ta [C] 140 560 420 280 tSHORT [s] 3. 7 tCIOV vs. VDD 3. 8 tCIOV vs. Ta tCIOV [ms] VDD [V] 5432 40 85 75 50 25 025 Ta [C] tCIOV [ms]

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 27 4. Output resistance 4. 1 RCOH vs. VCO 4. 2 RCOL vs. VCO RCOH [k] VCO [V] 4 3 2 1 RCOL [k] VCO [V] 4 3 2 1 4. 3 RDOH vs. VDO 4. 4 RDOL vs. VDO RDOH [k] VDO [V] 4 3 2 1 RDOL [k] VDO [V] 4 3 2 1

BATTERY PROTECTION IC FOR 1-CELL PACK S-8240A Series Rev.1.1_00 Seiko Instruments Inc. 28  Marking Specifications 1. SNT-6A Top view 13 2 64 5 (1) (2) (3) (4) (5) (6) (1) to (3): Product code (refer to Product name vs. Product code) (4) to (6): Lot number Product name vs. Product code Product Name Product Code (1) (2) (3) S-8240AAB-I6T1U 4 7 B S-8240AAC-I6T1U 4 7 C S-8240AAD-I6T1U 4 7 D S-8240AAE-I6T1U 4 7 E S-8240AAF-I6T1U 4 7 F S-8240AAG-I6T1U 4 7 G S-8240AAH-I6T1U 4 7 H S-8240AAI-I6T1U 4 7 I S-8240AAJ-I6T1U 4 7 J S-8240AAL-I6T1U 4 7 L S-8240AAM-I6T1U 4 7 M S-8240AAN-I6T1U 4 7 N S-8240AAQ-I6T1U 4 7 Q S-8240AAR-I6T1U 4 7 R

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.1.1_00 S-8240A Series Seiko Instruments Inc. 29 2. HSNT-6 (1212) 13 2 465 Top view (1) (2) (3) (4) (5) (1) to (3): Product code (refer to Product name vs. Product code) (4), (5): Lot number Product name vs. Product code Product Name Product Code (1) (2) (3) S-8240AAC-A6T2U 4 7 C S-8240AAD-A6T2U 4 7 D

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Product Information

S8240A specifications and overview.

Summary

BATTERY PROTECTION IC FOR 1-CELL PACK

Description

BATTERY PROTECTION IC FOR 1-CELL PACK

Source title S8240A Datasheet(PDF) - Seiko Instruments Inc

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