S8239A

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www.sii-ic.com OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK © Seiko Instruments Inc., 2013-2014 Rev.1.4_00 Seiko Instruments Inc. 1 The S-8239A Series is an overcurrent monitoring IC for mult i-serial-cell pack including high-accuracy voltage detection circuits and delay circuits. The S-8239A Series is suitable for protection of lithium-ion / lithium polymer rechargeable battery packs from overcurrent.  Features

• Built-in high-accuracy voltage detection circuit Overcurrent 1 detection voltage*1 0.04 V to 0.30 V (10 mV step) Accuracy ±15 mV Overcurrent 2 detection voltage 0.1 V to 0.7 V (100 mV step) Accuracy ±100 mV Overcurrent 3 detection voltage 1.2 V (Fixed) Accuracy ±300 mV
• Built-in three-step overcurrent detection circuit: Overcurrent 1, overcurrent 2, overcurrent 3
• Overcurrent 3 detection function is selectable: Available, unavailable
• UVLO (under voltage lock out) function UVLO detection voltage 2.0 V (Fixed) Accuracy ±100 mV
• High-withstand voltage device is used: VM pin, DO pin: Absolute maximum rating 28 V
• Delay times are generated only by an internal circuit (External capacitors are unnecessary).
• Low current consumption During normal operation: 7.0 μA max. During UVLO operation: 6.0 μA max.
• Output logic: Acti ve "L", Active "H"
• Wide operation temperature range: Ta = −40°C to +85°C
• Lead-free (Sn 100%), halogen-free *1. Overcurrent 1 detection voltage ≤ 0.06 V should be satisfied in the case of overcurrent 2 detection voltage = 0.1 V. Overcurrent 1 detection voltage ≤ 0.85 × overcurrent 2 detection voltage − 0.05 V should be satisfied in the case of overcurrent 2 detection voltage ≥ 0.2 V.  Applications
• Lithium-ion rechargeable battery pack
• Lithium polymer rechargeable battery pack  Package
• SOT-23-6

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 2  Block Diagram VM DO DP VDD Overcurrent 1 detection comparator VSS Overcurrent 2 detection comparator Overcurrent latch comparator RVMS UVLO detection comparator Delay circuit output control circuit VINI Overcurrent 3 detection comparator Remark All the diodes shown in the figure are parasitic diodes. Figure 1

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 3  Product Name Structure 1. Product name S-8239A xx - M6T1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and IC packing specifications*1 M6T1: SOT-23-6, Tape Serial code*2 Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel SOT-23-6 MP006-A-P-SD MP006-A-C-SD MP006-A-R-SD 3. Product name list Table 2 Product Name Overcurrent 1 Detection Voltage [VDIOV1] Overcurrent 2 Detection Voltage [VDIOV2] Overcurrent 1 Detection Delay Time [tDIOV1] Overcurrent 2 Detection Delay Time [tDIOV2] Overcurrent 3 Detection Function Output Logic S-8239AAA-M6T1U 0.08 V 0. 4 V 1150 ms 1.12 ms Unavailable Active "L" S-8239AAB-M6T1U 0.10 V 0.5 V 115 0 ms 0.28 ms Unavailable Active "L" S-8239AAC-M6T1U 0.10 V 0.3 V 18.0 ms 0.28 ms Unavailable Active "L" S-8239AAD-M6T1U 0.10 V 0.2 V 290 ms 0.56 ms Unavailable Active "L" S-8239AAE-M6T1U 0.10 V 0.7 V 18. 0 ms 0.56 ms Unavailable Active "L" S-8239AAF-M6T1U 0.04 V 0.3 V 4600 ms 0.28 ms Unavailable Active "L" S-8239AAG-M6T1U 0.10 V 0.2 V 1150 ms 1.12 ms Available Active "L" S-8239AAH-M6T1U 0.06 V 0.1 V 290 ms 0.56 ms Unavailable Active "L" S-8239AAI-M6T1U 0.10 V 0.3 V 290 ms 0.28 ms Unavailable Active "L" S-8239AAJ-M6T1U 0.11 V 0.3 V 4600 ms 2.24 ms Available Active "L" S-8239AAK-M6T1U 0.10 V 0.3 V 290 ms 1.12 ms Available Active "H" Remark Contact our sales office for the products with detection voltage value other than those specified above.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 4  Pin Configuration 1. SOT-23-6 13 2 546 Top view Figure 2 Table 3 Pin No. Symbol Description

1 VINI Voltage detection pin between VINI pin and VSS pin

(Overcurrent detection pin)

2 VM Overcurrent latch pin

3 DO Connection pin of discharge control FET gate

4 DP*1 Test pin for delay time measurement

5 VDD Input pin for positive power supply

6 VSS Input pin for negative power supply

*1. The DP pin should be open.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 5  Absolute Maximum Ratings Table 4 (Ta = +25°C unless otherwise specified) Item Symbol Applied pin Absolute Maximum Rating Unit Input voltage between VDD pin and VSS pin V DS VDD V SS − 0.3 to VSS +12 V VM pin input voltage V VM VM V DD − 28 to VDD + 0.3 V VINI pin input voltage V VINI VINI V SS − 0.3 to VSS + 12 V DO pin output voltage V DO DO V SS − 0.3 to VSS + 28 V Power dissipation P D − 650*1 mW Operation ambient temperature T opr − −40 to +85 °C Storage temperature T stg − −55 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution 1. The DP pin should be open. 2. The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 600 400 200 0 50 100 150 500 300 100 700Power dissipation (P D) [mW] Ambient temperature (Ta) [ °C] Figure 3 Power Dissipation of Package (When Mounted on Board)

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 6  Electrical Characteristics 1. Ta = +25°C Table 5 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Condition Test Circuit Detection Voltage Overcurrent 1 detection voltage V DIOV1 − VDIOV1 − 0.015 VDIOV1 VDIOV1 + 0.015 V 1 1 Overcurrent 2 detection voltage*1 VDIOV2 − VDIOV2 − 0.100 VDIOV2 VDIOV2 + 0.100 V 1 1 Overcurrent 3 detection voltage V DIOV3 Overcurrent 3 detection function "available" 0.90 1.20 1.50 V 1 1 UVLO detection voltage V UVLO − 1.90 2.00 2.10 V 1 1 Release Voltage Overcurrent release voltage V RIOV V DD criteria, VDD = 3.5 V 0.7 1.2 1.5 V 1 1 Input Voltage, Operation Voltage Operation voltage between VDD pin and VSS pin VDSOP Output logic is determined*2 1.5 − 8 V − − Current Consumption Current consumption during normal operation IOPE V DD = 3.5 V, VVM = 0 V 1.0 3.5 7.0 μA 2 2 Current consumption during UVLO operation IUVLO V DD = VVM = 1.5 V 0.7 3.0 6.0 μA 2 2 Internal Resistance Internal resistance between VM pin and VSS pin RVMS V DD = VVM = 3.5 V 210 300 390 kΩ 3 3 Output Resistance (Active "L") DO pin resistance "L" R DOL V DD = VVINI = 3.5 V, VDO = 0.5 V 2.5 5 10 kΩ 4 4 Output Resistance (Active "H") DO pin resistance "L" R DOL VDD = 3.5 V, VVINI = 0 V VDO = 0.5 V 2.5 5 10 kΩ 4 4 Delay Time Overcurrent 1 detection delay time tDlOV1 − tDIOV1 × 0.6 tDIOV1 tDIOV1 × 1.4 ms 5 5 Overcurrent 2 detection delay time tDlOV2 − tDIOV2 × 0.6 tDIOV2 tDIOV2 × 1.4 ms 5 5 Overcurrent 3 detection delay time tDlOV3 Overcurrent 3 detection function "available" 168 280 392 μs 5 5 UVLO detection delay time t UVLO − 2.94 4.90 6.86 s 5 5 *1. Even if overcurrent 1 detection voltage and overcurrent 2 detection voltage are in the same range, V DIOV1 is lower than VDIOV2. *2. It indicates that DO pin output logic is determined.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 7 2. Ta = −40°C to +85°C*1 Table 6 (Ta = −40°C to +85°C*1 unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Condition Test Circuit Detection Voltage Overcurrent 1 detection voltage V DIOV1 − VDIOV1 − 0.021 VDIOV1 VDIOV1 + 0.021 V 1 1 Overcurrent 2 detection voltage*2 VDIOV2 − VDIOV2 − 0.130 VDIOV2 VDIOV2 + 0.130 V 1 1 Overcurrent 3 detection voltage V DIOV3 Overcurrent 3 detection function "available" 0.70 1.20 1.70 V 1 1 UVLO detection voltage V UVLO − 1.85 2.00 2.15 V 1 1 Release Voltage Overcurrent release voltage V RIOV V DD criteria, VDD = 3.5 V 0.5 1.2 1.7 V 1 1 Input Voltage, Operation Voltage Operation voltage between VDD pin and VSS pin VDSOP Output logic is determined*3 1.5 − 8 V − − Current Consumption Current consumption during normal operation IOPE V DD = 3.5 V, VVM = 0 V 0.7 3.5 8.0 μA 2 2 Current consumption during UVLO operation IUVLO V DD = VVM = 1.5 V 0.5 3.0 7.0 μA 2 2 Internal Resistance Internal resistance between VM pin and VSS pin RVMS V DD = VVM = 3.5 V 150 300 450 kΩ 3 3 Output Resistance (Active "L") DO pin resistance "L" R DOL V DD = VVINI = 3.5 V, VDO = 0.5 V 1.2 5 15 kΩ 4 4 Output Resistance (Active "H") DO pin resistance "L" R DOL VDD = 3.5 V, VVINI = 0 V VDO = 0.5 V 1.2 5 15 kΩ 4 4 Delay Time Overcurrent 1 detection delay time tDlOV1 − tDIOV1 × 0.2 tDIOV1 tDIOV1 × 1.8 ms 5 5 Overcurrent 2 detection delay time tDlOV2 − tDIOV2 × 0.2 tDIOV2 tDIOV2 × 1.8 ms 5 5 Overcurrent 3 detection delay time tDlOV3 Overcurrent 3 detection function "available" 56 280 504 μs 5 5 UVLO detection delay time t UVLO − 0.98 4.90 8.82 s 5 5 *1. Since products are not screened at high and low temperat ures, the specification for this temperature range is guaranteed by design, not tested in production. *2. Even if overcurrent 1 detection voltage and overcurrent 2 detection voltage are in the same range, V DIOV1 is lower than VDIOV2. *3. It indicates that DO pin output logic is determined.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 8  Test Circuits Caution Unless otherwise specified, the output voltage levels "H" and "L" at the DO pin (V DO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the DO pin level with respect to VSS. 1. Overcurrent 1 detection voltage, overcurrent 2 detection voltage, overcurrent release voltage, UVLO detection voltage (Test condition 1, test circuit 1) 1. 1 Active "L" The overcurrent 1 detection voltage (V DIOV1) is defined as the voltage V2 whose delay time for changing V DO from "H" to "L" lies between the minimum and the maximum value of the overcurrent 1 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. The overcurrent 2 detection voltage (V DIOV2) is defined as the voltage V2 whose delay time for changing V DO from "H" to "L" lies between the minimum and the maximum value of the overcurrent 2 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. The overcurrent release voltage (V RIOV) is defined as the voltage V3 at which V DO goes from "L" to "H" after decreasing V2 to 0 V and the voltage V3 is increased gradually from the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. The UVLO detection voltage (V UVLO) is defined as the voltage V1 at which V DO goes from "H" to "L" after the voltages V1 and V3 are decreased gradually from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. 1. 2 Active "H" The overcurrent 1 detection voltage (V DIOV1) is defined as the voltage V2 whose delay time for changing V DO from "L" to "H" lies between the minimum and the maximum value of the overcurrent 1 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. The overcurrent 2 detection voltage (V DIOV2) is defined as the voltage V2 whose delay time for changing V DO from "L" to "H" lies between the minimum and the maximum value of the overcurrent 2 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. The overcurrent release voltage (V RIOV) is defined as the voltage V3 at which V DO goes from "H" to "L" after decreasing V2 to 0 V and the voltage V3 is increased gradually from the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. The UVLO detection voltage (V UVLO) is defined as the voltage V1 at which V DO goes from "L" to "H" after the voltages V1 and V3 are decreased gradually from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. 2. Overcurrent 3 detection voltage (Overcurrent 3 detection function "available") (Test condition 1, test circuit 1) 2. 1 Active "L" The overcurrent 3 detection voltage (V DIOV3) is defined as the voltage V2 whose delay time for changing V DO from "H" to "L" lies between the minimum and the maximum value of the overcurrent 3 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. 2. 2 Active "H" The overcurrent 3 detection voltage (V DIOV3) is defined as the voltage V2 whose delay time for changing V DO from "L" to "H" lies between the minimum and the maximum value of the overcurrent 3 detection delay time after the voltage V2 is increased instantaneously (within 10 μs) from the set conditions of V1 = V3 = 3.5 V, V2 = 0 V. 3. Current consumption during normal operation, current consumption during UVLO operation (Test condition 2, test circuit 2) The current consumption during normal operation (I OPE) is the current that flows through the VDD pin (I DD) under the set conditions of V1 = 3.5 V, V2 = 0 V. The current consumption during UVLO operation (I UVLO) is IDD under the set conditions of V1 = V2 = 1.5 V. 4. Internal resistance between VM pin and VSS pin (Test condition 3, test circuit 3) The internal resistance between the VM pin and the VSS pin (R VMS) is the resistance between the VM pin and the VSS pin under the set condition of V1 = V2 = V3 = 3.5 V.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 9 5. DO pin resistance "L" (Test condition 4, test circuit 4) 5. 1 Active "L" The DO pin resistance "L" (RDOL) is the DO pin resistance under the set conditions of V1 = V2 = 3.5 V, V3 = 0.5 V. 5. 2 Active "H" The DO pin resistance "L" (R DOL) is the DO pin resistance under the set conditions of V1 = 3.5 V, V2 = 0 V, V3 = 0.5 V. 6. Overcurrent 1 detection delay time (Test condition 5, test circuit 5) 6. 1 Active "L" 6. 1. 1 VDIOV2 = 0.1 V The overcurrent 1 detection delay time (t DIOV1) is the time period from when the voltage V2 exceeds V DIOV1 to when VDO goes to "L", after V2 is increased to 0.08V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 6. 1. 2 VDIOV2 ≥ 0.2 V The overcurrent 1 detection delay time (t DIOV1) is the time period from when the voltage V2 exceeds V DIOV1 to when VDO goes to "L", after V2 is increased to V DIOV1 max. + 0.01 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 6. 2 Active "H" 6. 2. 1 VDIOV2 = 0.1 V The overcurrent 1 detection delay time (t DIOV1) is the time period from when the voltage V2 exceeds V DIOV1 to when VDO goes to "H", after V2 is increased to 0.08V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 6. 2. 2 VDIOV2 ≥ 0.2 V The overcurrent 1 detection delay time (t DIOV1) is the time period from when the voltage V2 exceeds V DIOV1 to when VDO goes to "H", after V2 is increased to V DIOV1 max. + 0.01 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 7. Overcurrent 2 detection delay time, UVLO detection delay time (Test condition 5, test circuit 5) 7. 1 Active "L" The overcurrent 2 detection delay time (tDIOV2) is the time period from when the voltage V2 exceeds V DIOV2 to when VDO goes to "L", after V2 is increased to 0.9 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. The UVLO detection delay time (t UVLO) is the time period from when the voltage V1 falls below V UVLO to when V DO goes to "L", after V1 is decreased to 1.8 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 7. 2 Active "H" The overcurrent 2 detection delay time (tDIOV2) is the time period from when the voltage V2 exceeds V DIOV2 to when VDO goes to "H", after V2 is increased to 0.9 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. The UVLO detection delay time (t UVLO) is the time period from when the voltage V1 falls below V UVLO to when V DO goes to "H", after V1 is decreased to 1.8 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 10 8. Overcurrent 3 detection delay time (Overcurrent 3 detection function "available") (Test condition 5, test circuit 5) 8. 1 Active "L" The overcurrent 3 detection delay time (tDIOV3) is the time period from when the voltage V2 exceeds V DIOV3 to when VDO goes to "L", after V2 is increased to 1.6 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V. 8. 2 Active "H" The overcurrent 3 detection delay time (tDIOV3) is the time period from when the voltage V2 exceeds V DIOV3 to when VDO goes to "H", after V2 is increased to 1.6 V instantaneously (within 10 μs) under the set conditions of V1 = 3.5 V, V2 = 0 V.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 12  Operation 1. Normal status The S-8239A Series monitors the voltage between the VINI pin and the VSS pin to control discharging. When the VINI pin voltage is equal to or lower than the overcurrent 1 detection voltage (V DIOV1), the DO pin becomes "High-Z" (Active "L") or VSS potential (Active "H"). This status is called the normal status. Caution When a battery is connected for the first time, the S-8239A Series may not be in the normal status. In this case, short the VM pin and VSS pin or connect the charger. The S-8239A Series then becomes the normal status. 2. Overcurrent status (Overcurrent 1, overcurrent 2, overcurrent 3) When a battery is in the normal status, if the VINI pin volt age is equal to or higher than the overcurrent detection voltage because the discharge current is equal to or higher than the specified value and the status continues for the overcurrent detection delay time or longer, the DO pin becomes V SS potential (Active "L") or "High-Z" (Active "H"). This status is called the overcurrent status. The overcurrent status is retained when the voltage between the VDD pin and the VM pin is equal to or lower than the overcurrent release voltage (VRIOV). In the overcurrent status, the VM pin and VSS pin are shor ted by the internal resistor between the VM pin and the VSS pin (RVMS) in the S-8239A Series. However, the VM pin is at VDD potential due to the external load as long as the external load is connected. When the external load is disconnected completely, the VM pin returns to VSS potential. The overcurrent status is re leased when the voltage between the VDD pin a nd the VM pin is equa l to or higher than VRIOV. 3. UVLO status The S-8239A Series includes a UVLO (under voltage lock out) function to prevent the IC malfunction due to the decrease of the battery voltage when detecting the overcurrent. When the battery voltage in the normal status is equal to or lower than the UVLO detection voltage (V UVLO) and the status continues for the UVLO detection delay time (tUVLO) or longer, the DO pin becomes V SS potential (Active "L") or "High-Z" (Active "H"). This status is called the UVLO status. In the UVLO status, the VM pin and VSS pin are shorted by R VMS between the VM pin and the VSS pin in the S-8239A Series. After that, the UVLO status is released if the battery voltage becomes equal to or higher than V UVLO.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 13 4. Delay circuit The detection delay times are determined by dividing a clock of approximately 3.5 kHz with the counter. Remark The overcurrent 2 detection delay time (t DIOV2) starts when the overcurrent 1 detection voltage (V DIOV1) is detected. When the overcurrent 2 detection voltage (V DIOV2) is detected over t DIOV2 after the detection of VDIOV1, the S-8239A Series becomes the overcurrent status within tDIOV2 from the time of detecting VDIOV2. DO pin VINI pin High-Z Time VDIOV1 VSS VSS VDIOV2 tDIOV2 Time tD 0 ≤ tD ≤ tDIOV2 Figure 9 5. DP pin The DP pin is a test pin for delay time measurement and it should be open in the actual application. If a capacitor whose capacitance is 1000 pF or more or a resistor whose resistance is 1 M Ω or less is connected to this pin, error may occur in the delay times or in the detection voltages.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 14  Timing Charts 1. Overcurrent detection 1. 1 Active "L" 1. 1. 1 Overcurrent 3 detection function "available" VINI pin DO pin VM pin VSS Status*1 VSS VSS VDIOV1 VDIOV2 High-Z High-Z High-Z VDD VRIOV VDIOV3 High-Z (2) (1) Overcurrent 1 detection delay time (tDIOV1) Overcurrent 2 detection delay time (t DIOV2) Overcurrent 3 detection delay time (t DIOV3) External load connection *1. (1): Normal status (2): Overcurrent status Figure 10

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 15 1. 1. 2 Overcurrent 3 detection function "unavailable" (1) (2)(1)(2) (1) VINI pin DO pin External load connection Overcurrent 2 detection delay time (tDIOV2) VM pin Overcurrent 1 detection delay time (t DIOV1) VSS Status*1 VSS VSS VDIOV1 VDIOV2 High-Z High-Z High-Z VDD VRIOV *1. (1): Normal status (2): Overcurrent status Figure 11

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 16 1. 2 Active "H" 1. 2. 1 Overcurrent 3 detection function "available" (1)(2)(1)(2) (1) VINI pin DO pin VM pin VSS Status*1 VSS VSS VDIOV1 VDIOV2 VDD VRIOV VDIOV3 (2) (1) External load connection Overcurrent 1 detection delay time (t DIOV1) Overcurrent 2 detection delay time (tDIOV2) Overcurrent 3 detection delay time (tDIOV3) High-Z High-Z High-Z *1. (1): Normal status (2): Overcurrent status Figure 12

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 17 1. 2. 2 Overcurrent 3 detection function "unavailable" (1) (2)(1)(2) (1) VINI pin DO pin VM pin VSS VSS VSS VDIOV1 VDIOV2 VDD VRIOV External load connection Status*1 Overcurrent 1 detection delay time (t DIOV1) Overcurrent 2 detection delay time (tDIOV2) High-Z High-Z *1. (1): Normal status (2): Overcurrent status Figure 13

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 18 2. UVLO detection 2. 1 Active "L" (1) VSS VSS VUVLO VDD (2) (1) High-Z High-Z DO pin VM pin Battery voltage Status*1 External load connection Charger connection UVLO detection delay time (tUVLO) *1. (1): Normal status (2): UVLO status Remark The charger is assumed to charge with a constant current. Figure 14

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 19 2. 2 Active "H" (1) VSS VSS VUVLO VDD (2) (1) High-ZDO pin VM pin Battery voltage Charger connection External load connection Status*1 UVLO detection delay time (tUVLO) *1. (1): Normal status (2): UVLO status Remark The charger is assumed to charge with a constant current. Figure 15

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 21 Table 7 Constants for External Components Symbol Min. Typ. Max. Unit RVDD 300 470 1000 Ω RVINI 1 − − k Ω RSENSE 0 − − m Ω RVM 1 5.1 51 k Ω RDO *3 − 5.1 − k Ω RDOP 330 510 2000 k Ω CVDD 0.022 0.1 1 μF *1. Refer to the data sheet of the S-8225A Series for the recommended value for external components of the S-8225A Series. *2. Use the products with the same model number for FET1 and FET2. *3. Set up the optimal constant according to the FET in use. Caution 1. The above constants may be changed without notice. 2. The example of connection shown above and the constants do not gua rantee proper operation. Perform thorough evaluation using the actual application to set the constant. 3. The DP pin should be open.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 22  Precautions

• The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation.
• Do not apply an electrostatic discharge to this IC that ex ceeds the performance ratings of the built-in electrostatic protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 23  Characteristics (Typical Data) 1. Current consumption 1. 1 IOPE vs. Ta 1. 2 I OPE vs. VDD IOPE [μA] −40 0 +25 +50 +75 + 85−25 Ta [°C] IOPE [μA] VDD [V] 642 1. 3 IUVLO vs. Ta IUVLO [μA] −40 0 +25 +50 +75 + 85−25 Ta [°C] 2. Overcurrent detection / release voltage, UVLO function and delay times 2. 1 VDIOV1 vs. Ta VDIOV1 = 0.08 V 2. 2 VDIOV2 vs. Ta VDIOV2 = 0.4 V VDIOV1 [V] 0.06 0.10 −40 0 25 50 +75 + 85−25 Ta [°C] 0.09 0.08 0.07 VDIOV2 [V] 0.2 0.6 −40 0 25 50 +75 + 85−25 Ta [°C] 0.5 0.4 0.3 2. 3 VDIOV3 vs. Ta 2. 4 V RIOV vs. Ta VDIOV3 [V] −40 0 25 50 +75 + 85−25 Ta [°C] 0.9 1.5 1.3 1.4 1.2 1.1 1.0 VRIOV [V] 0.6 1.8 −40 0 +25 +50 +75 +85−25 Ta [°C] 1.5 1.2 0.9

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 24 2. 5 VDIOV1 vs. VDD VDIOV1 = 0.08 V 2. 6 VDIOV2 vs. VDD VDIOV2 = 0.4 V VDIOV1 [V] VDD [V] 0.06 0.10 0.09 0.08 0.07 76543 VDIOV2 [V] VDD [V] 0.2 0.6 0.5 0.4 0.3 76543 2. 7 VDIOV3 vs. VDD 2. 8 V RIOV vs. VDD VDIOV3 [V] VDD [V] 0.9 1.5 1.3 1.4 1.2 1.1 1.0 76543 VRIOV [V] VDD [V] 0.6 1.8 1.5 1.2 0.9 76543 2. 9 tDIOV1 vs. Ta tDIOV1 = 1150 ms 2. 10 tDIOV2 vs. Ta tDIOV2 = 1.12 ms tDIOV1 [s] 0.8 1.6 −40 0 +25 +50 +75 +85−25 Ta [°C] 1.4 1.2 1.0 tDIOV2 [ms] 0.8 1.6 −40 0 +25 +50 +75 +85−25 Ta [°C] 1.4 1.2 1.0 2. 11 tDIOV3 vs. Ta 2. 12 tDIOV1 vs. VDD tDIOV1 = 1150 ms tDIOV3 [μs] 160 400 −40 0 +25 +50 +75 +85−25 Ta [°C] 340 280 220 tDIOV1 [s] VDD [V] 0.8 1.6 1.4 1.2 1.0 76543

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK Rev.1.4_00 S-8239A Series Seiko Instruments Inc. 25 2. 13 tDIOV2 vs. VDD tDIOV2 = 1.12 ms 2. 14 tDIOV3 vs. VDD tDIOV2 [ms] VDD [V] 0.8 1.6 1.4 1.2 1.0 76543 tDIOV3 [μs] VDD [V] 160 400 340 280 220 76543 2. 15 VUVLO vs. Ta 2. 16 t UVLO vs. VDD VUVLO [V] 1.8 2.2 −40 0 25 50 +75 +85−25 Ta [°C] 2.1 2.0 1.9 tUVLO [s] 2.0 VDD [V] 1.5 3.0 6.0 1.91.81.71.6 5.5 5.0 4.5 4.0 3.5 3. Output Resistance 3. 1 RDOL vs. Ta RDOL [k] 0.0 8.0 Ta [C] 6.0 4.0 2.0 10.0

OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK S-8239A Series Rev.1.4_00 Seiko Instruments Inc. 26  Marking Specification 1. SOT-23-6 123 465 Top view (1) (2) (3) (4) (1) to (3): Product code (Refer to Product name vs. Product code) (4): Lot number Product name vs. Product code Product Name Product Code (1) (2) (3) S-8239AAA-M6T1U 3 S A S-8239AAB-M6T1U 3 S B S-8239AAC-M6T1U 3 S C S-8239AAD-M6T1U 3 S D S-8239AAE-M6T1U 3 S E S-8239AAF-M6T1U 3 S F S-8239AAG-M6T1U 3 S G S-8239AAH-M6T1U 3 S H S-8239AAI-M6T1U 3 S I S-8239AAJ-M6T1U 3 S J S-8239AAK-M6T1U 3 S K

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