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www.sii-ic.com FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) © Seiko Instruments Inc., 2013-2015 Rev.1.5_00 Seiko Instruments Inc. 1 The S-8235A Series, for automotive use, is utilized for secondary protection of lithium-ion rechargeable batteries, and incorporates high-accuracy voltage detection circuits and delay circuits. Short-circuiting between cells makes it possible for serial connection of 3-cell to 5-cell. By connecting in cascade, the S-8235A Series protects 6-serial or more cells lithium-ion rechargeable battery pack. The S-8235A Series performs a self-test operation to confirm overcharge detection. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to SII is indispensable.  Features

  • High-accuracy voltage detection circuit for each cell Overcharge detection voltage n (n = 1 to 5) 3.60 V to 4.50 V (50 mV step) Accuracy ±20 mV (Ta = +25°C) Accuracy ±30 mV (Ta = −5°C to +55°C) Overcharge hysteresis voltage n (n = 1 to 5) 0.0 mV to −550 mV (50 mV step) −300 mV to −550 mV Accuracy ±20% −100 mV to −250 mV Accuracy ±50 mV 0.0 mV to −50 mV Accuracy ±25 mV
  • Self-test operation to confirm over charge detection is available.
  • Cascade connection is available.
  • Delay times for overcharge detection can be set by an inte rnal circuit only (External capacitors are unnecessary).
  • High-withstand voltage device: Absolute maximum rating 26 V
  • Wide operation voltage range: 6 V to 24 V
  • Wide operation temperature range: Ta = −40°C to +85°C
  • Low current consumption At V CUn − 1.0 V for each cell: 10 μA max. (Ta = +25°C) At 2.3 V for each cell: 8 μA max. (Ta = +25°C)
  • Lead-free (Sn 100%), halogen-free
  • AEC-Q100 qualified *1 *1. Contact our sales office for details.  Application
  • Lithium-ion rechargeable battery pack (for secondary protection)  Package
  • 16-Pin TSSOP

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 2  Block Diagram VC1 VC2 VC3 VC4 VC5 CLKI RSTI VSS CAI VDD NPI CTL CO CLKO RSTO CAO Delay circuit Overcharge control circuit Self-test control circuit Remark The diodes in the figure are parasitic diodes. Figure 1

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 3  AEC-Q100 Qualified This IC supports AEC-Q100 for the operation temperature grade 3. Contact our sales office for details of AEC-Q100 reliability specification.  Product Name Structure 1. Product name S-8235A xx - TCT1 U Package abbreviation and IC packing specifications*1 TCT1: 16-Pin TSSOP, Tape Serial code*2 Sequentially set from AA to ZZ Environmental code U: Lead-free (Sn 100%), halogen-free *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel 16-Pin TSSOP FT016-A-P-SD FT016-A-C-SD FT016-A-R-S1 3. Product name list Table 2 Product Name Overcharge Detection Voltage [VCU] Overcharge Hysteresis Voltage [VHC] Overcharge Detection Delay Time*1 [tCU] S-8235AAA-TCT1U 4.050 V −0.050 V 1.0 s S-8235AAB-TCT1U 4.050 V −0.250 V 1.0 s S-8235AAC-TCT1U 4.250 V −0.250 V 2.0 s S-8235AAD-TCT1U 4.350 V −0.150 V 2.0 s S-8235AAE-TCT1U 4.350 V −0.150 V 1.0 s Remark Please contact our sales office for products with detection voltage values other than those specified above.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 4  Pin Configuration 1. 16-Pin TSSOP Top view Figure 2 Table 3 Pin No. Symbol Description

1 VDD Input pin for positive power supply

2 VC1 Positive voltage monitoring pin of battery 1

3 VC2 Negative voltage monitoring pin of battery 1,

Positive voltage monitoring pin of battery 2

4 VC3 Negative voltage monitoring pin of battery 2,

Positive voltage monitoring pin of battery 3

5 VC4 Negative voltage monitoring pin of battery 3,

Positive voltage monitoring pin of battery 4

6 VC5 Negative voltage monitoring pin of battery 4,

Positive voltage monitoring pin of battery 5

7 VSS Negative voltage monitoring pin of battery 5

8 NPI Input pin for negative power supply

9 CO Connection pin of charge control FET gate

10 CAO Output pin for chip active signal

11 CLKI Input pin for clock signal

12 RSTI Input pin for reset signal

13 RSTO Output pin for reset signal

14 CLKO Output pin for clock signal

15 CAI Input pin for chip active signal

16 CTL Input pin for charge control

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 5  Absolute Maximum Ratings Table 4 (Ta = +25°C unless otherwise specified) Item Symbol Applied Pin Absolute Maximum Rating Unit Input voltage between VDD pin and VSS pin V DS VDD V SS − 0.3 to VSS + 26 V Input voltage between VDD pin and NPI pin V DN VDD V NPI − 0.3 to VNPI + 26 V Input pin voltage V IN VC1 V SS − 0.3 to VSS + 26 V VC2, VC3, CLKI, RSTI, CAI, CTL V SS − 0.3 to VDD + 0.3 V VC4, VC5 V DD − 26 to VDD + 0.3 V Output pin voltage V OUT CO, CAO, CLKO, RSTO V SS − 0.3 to VDD + 0.3 V Power dissipation PD − 1100*1 mW Operation ambient temperature T opr − −40 to +85 °C Storage temperature T stg − −40 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 0 50 100 150 800 400 Power dissipation (PD) [mW] Ambient temperature (Ta) [°C] 1000 600 200 1200 Figure 3 Power Dissipation of Package (When Mounted on Board)

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 6  Electrical Characteristics Table 5 (Ta = +25°C, VDS = VDD − VSS = V1 + V2 + V3 + V4 + V5, unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Detection Voltage Overcharge detection voltage n VCUn − VCU − 0.020 VCU VCU + 0.020 V Ta = −5°C ~ +55°C*1 VCU − 0.030 VCU VCU + 0.030 V Overcharge hysteresis voltage n VHCn −550 mV ≤ VHC ≤ −300 mV V HC × 0.8 VHC VHC × 1.2 V −250 mV ≤ VHC ≤ −100 mV VHC − 0.050 VHC VHC + 0.050 V VHC = −50 mV, 0 mV VHC − 0.025 VHC VHC + 0.025 V Input Voltage Operation voltage between VDD pin and NPI pin VDNOP − 6 − 24 V CLKI pin voltage "H" V CLKIH VDN = 17.5 V VNPI + 0.5 − − V CLKI pin voltage "L" V CLKIL VDN = 17.5 V − − VNPI + 0.05 V RSTI pin voltage "H" V RSTIH VDN = 17.5 V VNPI + 0.5 − − V RSTI pin voltage "L" V RSTIL VDN = 17.5 V − − VNPI + 0.05 V CAI pin voltage "H" V CAIH VDN = 17.5 V VDD − 0.05 − − V CAI pin voltage "L" V CAIL VDN = 17.5 V − − VDD − 0.5 V CTL pin voltage "H" V CTLH VDN = 17.5 V VDD − 0.05 − − V CTL pin voltage "L" V CTLL VDN = 17.5 V − − VDD − 0.5 V Input Current Current consumption during operation IOPE V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V − 5 10 μA Current consumption during overdischarge IOPED V1 = V2 = V3 = V4 = V5 = 2.3 V − 4 8 μA VCn pin current (n = 1, 2, 3, 4, 5) IVCn V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V −1.0 0 1.0 μA VCn pin pull-down current (n = 2, 3) IVCLn V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V 0.9 1.0 1.1 mA VCn pin pull-up current (n = 3, 4, 5) IVCHn V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V −1.1 −1.0 −0.9 mA CLKI pin current "H" I CLKIH − 3.0 10 20 μA CLKI pin current "L" I CLKIL − −1.0 −0.7 −0.4 μA RSTI pin current "H" I RSTIH − 3.0 10 20 μA RSTI pin current "L" I RSTIL − −1.0 −0.7 −0.4 μA CAI pin current "H" I CAIH − 0.4 0.7 1.0 μA CAI pin current "L" I CAIL − −20 −10 −3.0 μA CTL pin current "H" I CTLH − 0.4 0.7 1.0 μA CTL pin current "L" I CTLL − −20 −10 −3.0 μA Output Current CO pin source current ICOH − − − −20 μA CO pin sink current ICOL − 400 − − μA CAO pin source current ICAOH − − − −10 μA CAO pin sink current ICAOL − 10 − − μA RSTO pin source current IRSTOH − − − −10 μA RSTO pin sink current IRSTOL − 10 − − μA CLKO pin source current ICLKOH − − − −10 μA CLKO pin sink current ICLKOL − 10 − − μA Delay Time Overcharge detection delay time tCU − t CU × 0.8 tCU tCU × 1.2 s Overcharge timer reset delay time tTR − 6 12 20 ms *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 7  Test Circuit In Figure 4, the following statuses are the initial statuses 1 to 4. Initial status 1: Set V1 = V2 = V3 = V4 = V5 = 2.8 V, SW CO = SWCAO = SWRSTO = SWCLKO = OFF, V8 = 0 V, V9 = 5 V, V12 = V13 = 0 V. Initial status 2: Set V1 = V2 = V3 = V4 = V5 = 3.5 V in initial status 1. Initial status 3: Set V9 = 0 V in initial status 2, and output 8 clocks*1 from V8. Initial status 4: Set V1 = V2 = V3 = V4 = V5 = 2.8 V, V8 = 0 V, V9 = 0 V, V12 = V13 = 0 V. *1. 1 clock is defined as follows. "H": Output of 5 V for 50 ms or more "L": Output of 0 V for 50 ms or more

3 VC2

4 VC3

5 VC4

6 VC5

7 VSS

V8 V9 V12 V13 V6 V7 V10 V11 A SWCO V A V SWCAO A A A SWRSTO V A SWCLKO V A A A A A A A A Figure 4 Test Circuit

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 8 1. Overcharge detection voltage n (VCUn), Overcharge hysteresis voltage n (VHCn) Set V1 = V2 = V3 = V4 = V5 = V CU − 0.050 V in initial status 1. V CU1 is defined as the volt age V1 when the CO pin output changes after the V1 voltage is gradually increased. VCUn (n = 2 to 5) can also be defined in the same way as VCU1. Moreover, set V1 = V CU + 0.050 V, V2 = V3 = V4 = V5 = 2.8 V in initial status 1. V HC1 is defined as the difference between V1 and V HC1 when the CO pin output changes again after the V1 voltage is gradually decreased. V HCn (n = 2 to 5) can also be defined in the same way as VHC1. 2. CLKI pin voltage "H" (VCLKIH), CLKI pin voltage "L" (VCLKIL), RSTI pin voltage "L" (VRSTIL), RSTI pin voltage "H" (V RSTIH) VCLKIH is defined as the voltage V8 when the CLKO pin output changes after the voltage V8 is gradually increased in initial status 3. After that, V CLKIL is defined as the voltage V8 when the CLKO pin output changes again after the voltage V8 is gradually decreased. V RSTIL is defined as the voltage V9 when the CLKO pin output changes after the voltage V9 is gradually decreased in initial status 2. After that, V RSTIH is defined as the voltage V9 when the CLKO pin output changes again after the voltage V9 is gradually increased. 3. CAI pin voltage "H" (VCAIH), CAI pin voltage "L" (VCAIL) Set V12 = VDN − 0.5 V, V9 = 0 V in initial status 2. Repeat increasing the voltage V12 and outputting 9 clocks from V8. VCAIH is defined as the minimum voltage V12 when the CAO pin output changes. Set V12 = VDN, V9 = 0 V in initial status 2. Repeat decreasing the voltage V12 and outputting 9 clocks from V8. VCAIL is defined as the maximum voltage V12 when the CAO pin output does not change. 4. CTL pin voltage "H" (VCTLH), CTL pin voltage "L" (VCTLL) Set V13 = VDN − 0.5 V in initial status 2. VCTLH is defined as the voltage V13 when the CO pin output changes after the voltage V13 is gradually increased. Set V13 = V DN in initial status 2. VCTLL is defined as the voltage V13 when the CO pin output changes again after the voltage V13 is gradually decreased. 5. Current consumption during operation (IOPE), Current consumption during overdischarge (IOPED) Set V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V, V8 = V9 = VDN in initial status 1. IOPE is defined as the total current which flows in the VDD pin and the VC1 pin. Set V1 = V2 = V3 = V4 = V5 = 2.3 V, V8 = V9 = V DN in initial status 1. IOPED is defined as the total current which flows in the VDD pin and the VC1 pin. 6. VCn pin current (IVCn) Set V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V in initial status 1. IVCn is defined as the current which flows in the VCn pin (n = 1 to 5), respectively. 7. VCn pin pull-down current (IVCLn), VCn pin pull-up current (IVCHn) Set V1 = V2 = V3 = V4 = V5 = VCU − 1.0 V, V9 = 0 V in initial status 1. IVCL2 is defined as the current which flows in the VC2 pin after increasing the voltage V8 up to 5 V. I VCL3 is defined as the current which fl ows in the VC3 pin subsequently after decreasing the voltage V8 down to 0 V and increasing the voltage V8 up to 5 V. After that, each time increasing the voltage V8 up to 5 V from 0 V, the current which flows in the VCn pin (n = 3 to 5) is defined in order of IVCH3, IVCH4, and IVCH5, respectively. 8. CLKI pin current "H" (ICLKIH), CLKI pin current "L" (ICLKIL) Set V8 = VDN − 2.0 V, V9 = 0 V in initial status 2. ICLKIH is defined as the maximum current which flows in the CLKI pin when voltage V8 is gradually increased. ICLKIL is defined as the current which flows in the CLKI pin after setting V9 = 0 V in initial status 2.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 9 9. RSTI pin current "H" (IRSTIH), RSTI pin current "L" (IRSTIL) Set V9 = VDN − 2.0 V in initial status 2. IRSTIH is defined as the maximum current which flows in the RSTI pin when the voltage V9 is gradually increased. IRSTIL is defined as the current which flows in the RSTI pin after setting V9 = 0 V in initial status 2. 10. CAI pin current "H" (ICAIH), CAI pin current "L" (ICAIL) ICAIH is defined as the current which flows in the CAI pin after setting V9 = 0 V, V12 = VDN in initial status 2. Set V12 = 2.0 V, V9 = 0 V. ICAIL is defined as the minimum current which flows in the CAI pin when the voltage V12 is gradually increased. 11. CTL pin current "H" (ICTLH), CTL pin current "L" (ICTLL) ICTLH is defined as the current which flows in the CTL pin after setting V13 = VDN in initial status 2. Set V13 = 2.0 V, V9 = 0 V in initial status 2. ICTLL is defined as the minimum current which flows in the CTL pin when the voltage V13 is gradually increased. 12. CO pin sink current (ICOL), CO pin source current (ICOH) ICOL is defined as the current which flows in the CO pin after setting SWCO = ON, V6 = 0.5 V in initial status 2. ICOH is defined as the current which flows in the CO pin after setting SWCO = ON, V13 = VDN, V6 = VDN − 0.5 V in initial status 2. 13. CAO pin sink current (ICAOL), CAO pin source current (ICAOH) ICAOL is the current which flows in the CAO pin after setting SWCAO = ON, V7 = 0.5 V in initial status 2. ICAOH is the current which flows in the CAO pin after setting SW CAO = ON, V9 = 0.5 V, V8 = 5 V, V7 = V DN − 0.5 V in initial status 2. 14. RSTO pin sink current (IRSTOL), RSTO pin source current (IRSTOH) IRSTOL is defined as the current which flows in the RSTO pin after setting SWRSTO = ON, V10 = 0.5 V in initial status 3. IRSTOH is defined as the current which flows in the RSTO pin after setting SW RSTO = ON, V10 = V DN − 0.5 V in initial status 2. 15. CLKO pin sink current (ICLKOL), CLKO pin source current (ICLKOH) ICLKOL is defined as the current which flows in the CLKO pin after setting SWCLKO = ON, V9 = 0 V, V11 = 0.5 V in initial status 2. I CLKOH is defined as the current which flows in the CLKO pin after setting SW CLKO = ON, V11 = V DN − 0.5V in initial status 2. 16. Overcharge detection delay time (tCU) tCU is defined as the time period until the CO pin output changes after increasing the voltage V1 up to 5.0 V in initial status 1. 17. Overcharge timer reset delay time (tTR) Increase the voltage V1 up to 5.0 V in initial status 1 (first rising), and decrease the voltage V1 down to 2.8 V within tCU. After that, increase voltage V1 up to 5.0 V again (second rising), and measure the time period until the CO pin output changes. If the time period from when the voltage V1 is decreased to the second rising is short, CO pin output changes after t CU is elapsed from the first rising. When the time period is gradually made longer, CO pin output changes after t CU is elapsed from the second rising. t TR is defined as the time period from when the voltage V1 is decreased to the second rising.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 10  Operation 1. Normal status If the voltage of all the batteries is lower than "overcharge detection voltage n (VCUn) + overcharge hysteresis voltage n (VHCn)", CO pin output changes to "L". This is called normal status. 2. Overcharge status When the voltage of one of the batteries exceeds VCUn during a charging operation at normal status, and the status is retained for overcharge detection delay time (t CU) or longer, CO pin output changes to "H". This is called overcharge status. VCUn Battery voltage CO pin VHCn (n = 1 to 5) tCU tCU or shorter tTR or shorter tTR or longer 2.0 ms typ. Figure 5 Overcharge Detection Operation

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 11 3. Overcharge timer reset function The S-8235A Series has an overcharge timer reset function. If overcharge release noise which temporarily falls below overcharge detection voltage n (V CUn) is input during overcharge detection delay time (tCU) from when the voltage of one of the batteries during a charging operation exceeds VCUn until when charging is stopped, tCU is continuously counted if the time of overcharge release noise is shorter than overcharge timer reset delay time (t TR). On the other hand, under the same status, if the time of overcharge release noise is tTR or longer, counting of tCU is reset once. After that, when VCUn is exceeded, counting tCU resumes. VCUn Battery voltage CO pin tCU VHCn tCU or shorter tTR tTR or shorter Timer reset tTR or longer (n = 1 to 5) tTR or shorter Figure 6 Overcharge Timer Reset Operation 4. Status of pins The status of pins for the S-8235A Series is shown in Table 6. When inputting "H" to the CTL pin, the CO pin outputs "H" in 1.0 ms typ. at normal status, and maintains "H" at overcharge status. Each of the RSTO pin, the CLKO pin, and the CAO pin outputs a signal in 1.0 ms typ. from inputting. When performing a self-test operation, input "L" to the RSTI pin. Refer to "  Self-test Function " for the self-test operation. Table 6 I/O Symbol Normal Operation Self-test Operation Input RSTI "H" "L" Output CO "H" "L" (Normal status) / "H" (Overcharge status) "H" "L" (Normal status) / "H" (Overcharge status) RSTO "H" Refer to "2. RSTO pin" in " Self-test Function" CLKO "H" Refer to "3. CLKO pin"in" Self-test Function" CAO "L" Refer to "4. CAO pin" in " Self-test Function"

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 12  Battery Protection IC Connection Example 1. 8-serial cell (5-cell + 3-cell, cascade connection) CVDD CVC1 CVC2 CVC3 CVC4 CVC5 CVSS CNPI

1 VDD

2 VC1

8 NPI

(1) CO (2) CO EB+ EB− 1 kΩ 1 kΩ 1 kΩ 1 kΩ RIFCA RIFC RIFCLK RIFRST 1 kΩ 1 kΩ RVC1 RVC2 RVC3 RVC4 RVDD C VDD CVC1 CVC2 CVC3 CVC4 CVC5 CVSS CNPI RVC1 RVC2 RVC3 RVC4 RVC5 RVDD RNPI RVSS 1000 pF 1000 pF 1000 pF 1000 pF RNPI RVSS RVC5 Input for reset signal Input for clock signal Output for chip active signal Output for charge control Figure 7 Table 7 Constants for External Components Part Min. Typ. Max. Unit RVDD, RNPI 0.1 1 1 k Ω RVCn, RVSS 0.25 1.2 1.2 k Ω RIFC, RIFCA, RIFCLK, RIFRST − 5.1 − MΩ CVDD, CNPI 0.075 0.1 1 μF CVCn, CVSS 0.075 0.1 1 μF Caution 1. The above constants are subject to change without prior notice. 2. The example of connection shown above and the constants will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constants. 3. R VC1 to RVC5 should be the same constant. CVDD, CVC1 to CVC5, CVSS, and CNPI should be the same constant. 4. Set R VDD and CVDD so that the condition RVDD × CVDD ≥ 7.5 × 10-5 is satisfied. 5. Set R VCn and CVCn so that the condition 1.0 ≤ (RVCn × CVCn) / (RVDD × CVDD) ≤ 1.2 is satisfied. 6. Connect R IFC, RIFCA, RIFCLK, and RIFRST as close to the input pin as possible. Remark n = 1 to 5

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 13  Self-test Function The S-8235A Series has a self-test function to confirm overcharge detection operation. Due to the self-test function, a current flows in an external resistor, the voltage between voltage monitoring pins expands, and then the S-8235A Series spuriously becomes overcharge status (Refer to Figure 8). IVCLn or IVCHn flows in RVCn during the self-test operation. Since the S-8235A Series detects ov ercharge when the voltage between voltage monitoring pins exceeds overcharge detection voltage n (VCUn), it is possible to confirm whether the S-8235A Series normally detects the overcharge or not by monitoring the CO pin output signal. VC1 VC2 CO RVC2 V1 (< VCU1) V1 + IVCL2 × RVC2 (≥ VCU1) IVCL2 "H" RVC1 Figure 8 Self-test Operation between VC1 Pin and VC2 Pin When not using the self-test function, short-circuit the CL KI pin and the VDD pin, the RSTI pin and the VDD pin via a resistor of 1 kΩ, respectively. And short-circuit the CAI pin and the NPI pin via a resistor of 1 kΩ. 1. Self-test operation at the time of cascade connection The S-8235A Series devices can be connected in cascade. By connecting as shown in Figure 7, the S-8235A Series protects 6-serial or more cells lithium-ion rechargeable battery pack. At the time of cascade connection, the CO pin output sign al for upper device of the S-8235A Series is transmitted by connecting the CO pin and the CTL pin, and is output from the CO pin at the lower device. Therefore, it is possible to confirm whether all devices of the S-8235A Series normally det ects the overcharge or not by monitoring the CO pin output signal for the lowest device of the S-8235A Series. On the other hand, the CAO pin output signal for the upper device of the S-8235A Series is transmitted by connecting the CAO pin and the CAI pin, and is output from the CAO pin at the lower device. Therefore, it is possible to confirm which device of the S-8235A Series is in a self-test operation by monitoring the CAO pin output signal for the lowest device of the S-8235A Series.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 15 CLKI CLKO RSTO CAO CAI IVCL2 IVCL3 IVCH3 IVCH4 IVCH5 1 892 3 45 c1 c2 c3 c4 RSTI Figure 9

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 16 7. Example of self-test operation By connecting in cascade, the S-8235A Series performs a self-test operation in 6-serial or more cells protection circuit. The example of a self-test operation at the time of cascade connection is as follows. Refer to Table 6 in " Operation" for the output pin voltage to be set depending on the input pin voltage. CLKI (1) RSTI (1) CLKO (1) RSTO (1) CAO (1) CAI (1) CO (1) CTL (1) CLKI (2) RSTI (2) CLKO (2) RSTO (2) CAO (2) CAI (2) CO (2) CTL (2) K C 1 21 D H L A F B G J E I Figure 10 Timing Chart during Self-test Operation in 8-serial Cell (5-cell + 3-cell) Protection Circuit <A> When inputting "L" to the RSTI pin of the S-8235A (1) (hereinafter, it is indicated as (1)), the self-test operation is initiated. <B> When a clock signal is input to the CLKI pin of (1), the overcharge detection operation of (1) is confirmed. <C> It is possible to confirm that the self-test operation is performed in (1). <D> The RSTO pin of (1) outputs "L", and then the voltage is input to the RSTI pin of the S-8235A (2) (hereinafter, it is indicated as (2)). <E> The CLKO pin output of (1) is input to the CLKI pin of (2). <F> When a clock signal is input to the CLKI pin of (2), the overcharge detection operation of (2) is confirmed. <G> The CO pin output of (2) is input to the CTL pin of (1). <H> The CO pin output of (2) is output from the CO pin of (1). <I> The CAO pin output of (2) is input to the CAI pin of (1). <J> It is possible to confirm that the self-test operation is performed in (2). <K> When inputting "H" to the RSTI pin of (1), the RSTO pin outputs "H". <L> When "H" is input to the RSTI pin of (2), the self-test operation is terminated. Caution 1. The S-8235A Series changes to the overcharge status if the voltage between voltage monitoring pins exceeds overcharge detection voltage n (VCUn) during a self-test operation. 2. Since the voltage between voltage monitoring pins does not exceed V CUn when a self-test operation is performed in battery voltage drop, the S-8235A Series may not detect the overcharge.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 17  Precautions

  • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation.
  • Do not apply an electrostatic discharge to this IC that ex ceeds the performance ratings of the built-in electrostatic protection circuit.
  • SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 18  Characteristics (Typical Data) 1. Detection voltage 1. 1 VCU vs. Ta VCU = 4.050 V 1. 2 VCU + VHC vs. Ta VHC = −0.050 V 4.150 4.100 4.050 4.000

3.950 VCU [V]

40 85 755025025 Ta [C] 4.100 4.050 4.000 3.950

3.900 VCU + VHC [V]

40 85 755025025 Ta [C] 2. Current consumption 2. 1 IOPE vs. Ta VDD = 15.25 V 2. 2 IOPED vs. Ta VDD = 10.5 V IOPE [μA] −40 85 7550250−25 Ta [C] IOPED [μA] −40 85 7550250−25 Ta [C] 2. 3 IOPE vs. VDD Ta = +25°C IOPE [μA] VDD [V] 2520151050

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) Rev.1.5_00 S-8235A Series Seiko Instruments Inc. 19 3. Delay time 3. 1 tCU vs. Ta VDD = 17.5 V 1.2 1.1 1.0 0.9 0.8 tCU [s] −40 85 7550250−25 Ta [C] 4. Output current 4. 1 ICOH vs. VDD Ta = +25°C 4. 2 ICOL vs. VDD Ta = +25°C ICOH [μA] VDD [V] 2520151050 −250 −500 −750 −1000 10000 ICOL [µA] VDD [V] 2520151050 7500 5000 2500 4. 3 ICAOH vs. VDD Ta = +25°C 4. 4 ICAOL vs. VDD Ta = +25°C ICAOH [μA] VDD [V] 2520151050 −250 −500 −750 −1000 10000ICAOL [µA] VDD [V] 2520151050 7500 5000 2500

FOR AUTOMOTIVE BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK (SECONDARY PROTECTION) S-8235A Series Rev.1.5_00 Seiko Instruments Inc. 20 5. Output current 5. 1 IVCLn vs. Ta VDD = 15.25 V 5. 2 IVCHn vs. VDD VDD = 15.25 V 1.4 1.2 1.0 0.8 0.6 IVCLn [mA] −40 85 7550250−25 Ta [C] −0.7 IVCHn [mA] −40 85 7550250−25 Ta [C] −0.9 −1.1 −1.3 5. 3 ICLKIH vs. Ta VDD = 15.25 V 5. 4 ICLKIL vs. Ta VDD = 17.5 V 20.0 15.0 10.0 5.0 0.0 ICLKIH [μA] −40 85 7550250−25 Ta [C] −0.4 −40 85 7550250−25 Ta [C] −0.6 −0.8 −1.0 ICLKIL [μA] 5. 5 IRSTIH vs. Ta VDD = 17.5 V 5. 6 IRSTIL vs. Ta VDD = 17.5 V 20.0 15.0 10.0 5.0 0.0 IRSTIH [μA] −40 85 7550250−25 Ta [C] −0.4 −40 85 7550250−25 Ta [C] −0.6 −0.8 −1.0 IRSTIL [μA] 5. 7 ICTLH vs. Ta VDD = 17.5 V 5. 8 ICTLL vs. Ta VDD = 17.5 V 1.0 −40 85 7550250−25 Ta [C] 0.8 0.6 0.4 ICTLH [μA] 0.0 −5.0 −10.0 −15.0 −20.0 ICTLL [μA] −40 85 7550250−25 Ta [C] Remark n = 1 to 5

/X30/X2E/X31/X37/XB1/X30/X2E/X30/X35 /X39 /X31 /X38 /X31/X36 /X35/X2E/X31/XB1/X30/X2E/X32 /X30/X2E/X32/X32/XB1/X30/X2E/X30/X38/X30/X2E/X36/X35 /X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X53/X43/X41/X4C/X45 /X55/X4E/X49/X54 /X6D/X6D /X53/X65/X69/X6B/X6F/X20/X49/X6E/X73/X74/X72/X75/X6D/X65/X6E/X74/X73/X20/X49/X6E/X63/X2E /X4E/X6F/X2E/X20/X46/X54/X30/X31/X36/X2D/X41/X2D/X50/X2D/X53/X44/X2D/X31/X2E/X31 /X46/X54/X30/X31/X36/X2D/X41/X2D/X50/X2D/X53/X44/X2D/X31/X2E/X31 /X54/X53/X53/X4F/X50/X31/X36/X2D/X41/X2D/X50/X4B/X47/X20/X44/X69/X6D/X65/X6E/X73/X69/X6F/X6E/X73

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/X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X53/X43/X41/X4C/X45 /X55/X4E/X49/X54 /X6D/X6D /X31/X37/X2E/X34/XB1/X31/X2E/X30 /X53/X65/X69/X6B/X6F/X20/X49/X6E/X73/X74/X72/X75/X6D/X65/X6E/X74/X73/X20/X49/X6E/X63/X2E /X4E/X6F/X2E/X20/X46/X54/X30/X31/X36/X2D/X41/X2D/X52/X2D/X53/X31/X2D/X31/X2E/X30 /X46/X54/X30/X31/X36/X2D/X41/X2D/X52/X2D/X53/X31/X2D/X31/X2E/X30 /X54/X53/X53/X4F/X50/X31/X36/X2D/X41/X2D/X20/X52/X65/X65/X6C /X51/X54/X59/X2E/X34/X2C/X30/X30/X30 /X45/X6E/X6C/X61/X72/X67/X65/X64/X20/X64/X72/X61/X77/X69/X6E/X67/X20/X69/X6E/X20/X74/X68/X65/X20/X63/X65/X6E/X74/X72/X61/X6C/X20/X70/X61/X72/X74 /X32/XB1/X30/X2E/X35 /XF8/X31/X33/XB1/X30/X2E/X32 /XF8/X32/X31/XB1/X30/X2E/X38 /X32/X31/X2E/X34/XB1/X31/X2E/X30 /X31/X37/X2E/X34 /X2B/X32/X2E/X30 /X20/X2D/X31/X2E/X35

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