S8211E

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www.sii-ic.com BATTERY PROTECTION IC FOR 1-CELL PACK © Seiko Instruments Inc., 2009-2015 Rev.2.4_00 Seiko Instruments Inc. 1 The S-8211E Series has high-accuracy voltage detections circuit and delay circuits. The S-8211E Series is suitable for monitoring overcharge an d overdischarge of 1-cell lit hium ion / lithium polymer rechargeable battery pack.  Features (1) High-accuracy voltage detection circuit

• Overcharge detection voltage 3.6 V to 4.5 V (5 mV step) Accuracy ±25 mV (+25°C) Accuracy ±30 mV (−5°C to +55°C)
• Overcharge release voltage 3.5 V to 4.4 V *1 Accuracy ±50 mV
• Overdischarge detection voltage 2.0 V to 3.0 V (10 mV step) Accuracy ±50 mV
• Overdischarge release voltage 2.0 V to 3.4 V *2 Accuracy ±100 mV (2) Detection delay times are generated by an internal circuit (external capacitors are unnecessary) Accuracy ±20% (3) Wide operating temperature range −40°C to +85°C (4) Low current consumption
• During operation 3.0 μA typ., 5.5 μA max. (+25°C)
• During overdischarge 2.0 μA typ., 3.5 μA max. (+25°C) (5) Output logic of CO pin is select able. Active “H”, Active “L” (6) Lead-free, Sn 100%, halogen-free *3 *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV step.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.) *3. Refer to “ Product Name Structure” for details.  Applications
• Lithium-ion rechargeable battery pack
• Lithium-polymer rechargeable battery pack  Packages
• SOT-23-5
• SNT-6A

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 2  Block Diagram VM VSS VDD CO DO Overcharge detection comparator Output control circuit Divider control circuit Overdischarge detection comparator Oscillator control circuit Remark All diodes shown in figure are parasitic diodes. Figure 1

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 3  Product Name Structure 1. Product Name S-8211E xx - xxxx U Serial code*2 Sequentially set from AA to ZZ Package name (abbreviation) and IC packing specifications*1 M5T1: SOT-23-5, Tape I6T1: SNT-6A, Tape Environmental code U: Lead-free (Sn 100%), halogen-free *1. Refer to the tape drawing. *2. Refer to “3. Product Name List”. 2. Packages Package Name Drawing Code Package Tape Reel Land SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD − SNT-6A PG006-A-P-SD PG006-A-C-SD PG006-A-R-SD PG006-A-L-SD

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 4 3. Product Name List 3. 1 SOT-23-5 Table 1 Product Name Overcharge Detection Voltage [VCU] Overcharge Release Voltage [VCL] Overdischarge Detection Voltage [VDL] Overdischarge Release Voltage [VDU] Delay Time Combination*1 CO Pin Output Form S-8211EAC-M5T1U 3.600 V 3.600 V 2.00 V 2.00 V (1) CMOS output active “L” S-8211EAF-M5T1U 3.650 V 3.550 V 2.00 V 2.30 V (2) CMOS output active “L” S-8211EAG-M5T1U 3.800 V 3.600 V 2.00 V 2.30 V (2) CMOS output active “L” S-8211EAJ-M5T1U 4.180 V 4.180 V 2.50 V 3.00 V (1) CMOS output active “H” S-8211EAK-M5T1U 3.600 V 3.600 V 2.00 V 2.30 V (1) CMOS output active “H” *1. Refer to the Table 3 about the details of the delay time combinations (1), (2). Remark Please contact our sales office for the products with detection voltage value other than those specified above. 3. 2 SNT-6A Table 2 Product Name Overcharge Detection Voltage [VCU] Overcharge Release Voltage [VCL] Overdischarge Detection Voltage [VDL] Overdischarge Release Voltage [VDU] Delay Time Combination*1 CO Pin Output Form S-8211EAA-I6T1U 4.220 V 4.220 V 2.00 V 2.00 V (2) CMOS output active “L” S-8211EAB-I6T1U 4.270 V 4.270 V 2.00 V 2.00 V (2) CMOS output active “L” S-8211EAD-I6T1U 4.220 V 4.220 V 2.50 V 2.50 V (2) CMOS output active “L” S-8211EAE-I6T1U 4.220 V 4.220 V 2.30 V 2.30 V (2) CMOS output active “L” S-8211EAH-I6T1U 4.000 V 3.800 V 3.00 V 3.20 V (1) CMOS output active “L” S-8211EAI-I6T1U 3.800 V 3.700 V 2.30 V 2.40 V (1) CMOS output active “L” S-8211EAP-I6T1U 4.280 V 4.080 V 2.50 V 2.50 V (1) CMOS output active “L” *1. Refer to the Table 3 about the details of the delay time combinations (1), (2). Remark Please contact our sales office for the products with detection voltage value other than those specified above. Table 3 Delay Time Combination Overcharge Detection Delay Time [tCU] Overdischarge Detection Delay Time [tDL] (1) 1.2 s 150 ms (2) 573 ms 300 ms Remark The delay times can be changed within the range listed Table 4. For details, please contact our sales office. Table 4 Delay Time Symbol Selection Range Remark Overcharge detection delay time t CU 143 ms 573 ms 1.2 s Select a value from the left. Overdischarge detection delay time t DL 38 ms 150 ms 300 ms Select a value from the left. Remark The value surrounded by bold lines is the delay time of the standard products.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 5  Pin Configurations 1. SOT-23-5 SOT-23-5 Top view 5 4 3 2 1 Table 5 Pin No. Symbol Description

1 VM Negative power supply input pin for CO pin

2 VDD Input pin for positive power supply

3 VSS Input pin for negative power supply

4 DO Output pin for overdischarge detection

(CMOS output)

5 CO Output pin for overcharge detection

(CMOS output) Figure 2 2. SNT-6A SNT-6A Top view 3 4 Table 6 Pin No. Symbol Description

1 NC*1 No connection

2 CO Output pin for overcharge detection

(CMOS output)

3 DO Output pin for overdischarge detection

(CMOS output)

4 VSS Input pin for negative power supply

Figure 3 5 VDD Input pin for positive power supply

6 VM Negative power supply input pin for CO pin

*1. The NC pin is electrically open. The NC pin can be connected to VDD pin or VSS pin.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 6  Absolute Maximum Ratings Table 7 (Ta = +25°C unless otherwise specified) Item Symbol Applied pin Absolu te Maximum Ratings Unit Input voltage between VDD pin and VSS pin VDS VDD VSS − 0.3 to VSS + 12 V VM pin input voltage VVM VM V DD − 28 to VDD + 0.3 V DO pin output voltage VDO DO V SS − 0.3 to VDD + 0.3 V CO pin output voltage VCO CO V VM − 0.3 to VDD + 0.3 V Power dissipation SOT-23-5 PD − 600*1 mW SNT-6A − 400*1 mW Operating ambient temperature T opr − −40 to +85 °C Storage temperature Tstg − −55 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 0 50 100 150 700 400 Power Dissipation (PD) [mW] Ambient Temperature (Ta) [°C] 200 600 500 300 100 SNT-6A SOT-23-5 Figure 4 Power Dissipation of Package (When Mounted on Board)

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 7  Electrical Characteristics 1. Except Detection Delay Time (+25°C) Table 8 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Condi- tion Test Circuit DETECTION VOLTAGE Overcharge detection voltage VCU 3.60 V to 4.50 V, Adjustable VCU −0.025 VCU VCU +0.025 V 1 1 3.60 V to 4.50 V, Adjustable, Ta = −5°C to +55°C*1 VCU −0.03 VCU VCU +0.03 V 1 1 Overcharge release voltage VCL 3.50 V to 4.40 V, Adjustable VCL ≠ VCU VCL −0.05 VCL VCL +0.05 V 1 1 VCL = VCU VCL −0.05 VCL VCL +0.025 V 1 1 Overdischarge detection voltage VDL 2.00 V to 3.00 V, Adjustable VDL −0.05 VDL VDL +0.05 V 2 2 Overdischarge release voltage VDU 2.00 V to 3.40 V, Adjustable VDU ≠ VDL VDU −0.10 VDU VDU +0.10 V 2 2 VDU = VDL VDU −0.05 VDU VDU +0.05 V 2 2 INPUT VOLTAGE Operating voltage between VDD pin and VSS pin VDSOP1 − 1.5 − 8 V − − INPUT CURRENT Current consumption during operation IOPE V DD = 3.5 V, VVM = 0 V 1.0 3.0 5.5 μA 3 2 Current consumption during overdischarge IOPED V DD = 1.5 V, VVM = 0 V 0.3 2.0 3.5 μA 3 2 OUTPUT RESISTANCE CO pin resistance “H” RCOH − 2.5 5 10 k Ω 4 3 CO pin resistance “L” RCOL CO pin output logic active “H” 2.5 9 15 k Ω 4 3 CO pin output logic active “L” 2.5 5 10 k Ω 4 3 DO pin resistance “H” RDOH − 2.5 5 10 k Ω 5 3 DO pin resistance “L” RDOL − 2.5 5 10 k Ω 5 3 *1. Since products are not screened at high and low temperature, the s pecification for this temperature range is guaranteed by design, not tested in production.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 8 2. Except Detection Delay Time (−40°C to +85°C *1) Table 9 (Ta = −40°C to +85°C *1 unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Condi- tion Test Circuit DETECTION VOLTAGE Overcharge detection voltage VCU 3.60 V to 4.50 V, Adjustable VCU − 0.060 VCU VCU + 0.040 V 1 1 Overcharge release voltage VCL 3.50 V to 4.40 V, Adjustable VCL ≠ VCU VCL − 0.08 VCL VCL + 0.065 V 1 1 VCL = VCU VCL − 0.08 VCL VCL + 0.04 V 1 1 Overdischarge detection voltage VDL 2.00 V to 3.00 V, Adjustable VDL − 0.11 VDL VDL + 0.13 V 2 2 Overdischarge release voltage VDU 2.00 V to 3.40 V, Adjustable V DU ≠ VDL VDU − 0.15 VDU VDU + 0.19 V 2 2 VDU = VDL VDU − 0.11 VDU VDU + 0.13 V 2 2 INPUT VOLTAGE Operating voltage betw een VDD pin and VSS pin VDSOP1 − 1.5 − 8 V − − INPUT CURRENT Current consumption during operation IOPE V DD = 3.5 V, VVM = 0 V 0.7 3.0 6.0 μA 3 2 Current consumption during overdischarge IOPED V DD = 1.5 V, VVM = 0 V 0.2 2.0 3.8 μA 3 2 OUTPUT RESISTANCE CO pin resistance “H” RCOH − 1.2 5 15 kΩ 4 3 CO pin resistance “L” RCOL CO pin output logic active “H” 1.2 9 27 kΩ 4 3 CO pin output logic active “L” 1.2 5 15 kΩ 4 3 DO pin resistance “H” RDOH − 1.2 5 15 kΩ 5 3 DO pin resistance “L” RDOL − 1.2 5 15 kΩ 5 3 *1. Since products are not screened at high and low temperature, the s pecification for this temperature range is guaranteed by design, not tested in production.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 9 3. Detection Delay Time 3. 1 S-8211EAC, S-8211EAH, S-8211EAI, S-8211EAJ, S-8211EAK, S-8211EAP Table 10 Item Symbol Condition Min. Typ. Max. Unit Test Condi- tion Test Circuit DELAY TIME (Ta = +25°C) Overcharge detection delay time tCU − 0.96 1.2 1.4 s 6 4 Overdischarge detection delay time tDL − 120 150 180 ms 6 4 DELAY TIME (Ta = −40°C to +85°C) *1 Overcharge detection delay time tCU − 0.7 1.2 2.0 s 6 4 Overdischarge detection delay time tDL − 83 150 255 ms 6 4 *1. Since products are not screened at high and low temperature, the s pecification for this temperature range is guaranteed by design, not tested in production. 3. 2 S-8211EAA, S-8211EAB, S-8211EAD, S-8211EAE, S-8211EAF, S-8211EAG Table 11 Item Symbol Condition Min. Typ. Max. Unit Test Condi- tion Test Circuit DELAY TIME (Ta = +25°C) Overcharge detection delay time tCU − 458 573 687 ms 6 4 Overdischarge detection delay time tDL − 240 300 360 ms 6 4 DELAY TIME (Ta = −40°C to +85°C) *1 Overcharge detection delay time tCU − 334 573 955 ms 6 4 Overdischarge detection delay time tDL − 166 300 510 ms 6 4 *1. Since products are not screened at high and low temperature, the s pecification for this temperature range is guaranteed by design, not tested in production.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 10  Test Circuits Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (V CO) are judged by V VM + 1.0 V, and the output voltage levels “H” and “L” at DO pin (V DO) are judged by V SS + 1.0 V. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. 1. Overcharge Detection Voltage, Overcharge Release Voltage (Test Condition 1, Test Circuit 1) 1. 1 CO pin output logic = Active “H” Overcharge detection voltage (V CU) is defined as the voltage between the VDD pin and VSS pin at which V CO goes from “L” to “H” when the voltage V1 is gradually increased from the starting c ondition of V1 = 3.5 V. Overcharge release voltage (VCL) is defined as the voltage between the VDD pin and VSS pin at which V CO goes from “H” to “L” when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between overcharge detection voltage (VCU) and overcharge release voltage (VCL). 1. 2 CO pin output logic = Active “L” Overcharge detection voltage (V CU) is defined as the voltage between the VDD pin and VSS pin at which V CO goes from “H” to “L” when the voltage V1 is gradually in creased from the starting cond ition of V1 = 3.5 V. Overcharge release voltage (VCL) is defined as the voltage between the VDD pin and VSS pin at which V CO goes from “L” to “H” when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between overcharge detection voltage (VCU) and overcharge release voltage (VCL). 2. Overdischarge Detection Voltage, Overdischarge Release Voltage (Test Condition 2, Test Circuit 2) Overdischarge detection voltage (VDL) is defined as the voltage between the VDD pin and VSS pin at which VDO goes from “H” to “L” when the voltage V1 is gradually decreased fr om the starting condition of V1 = 3.5 V, V2 = 0 V. Overdischarge release voltage (VDU) is defined as the volt age between the VDD pin and VSS pin at which V DO goes from “L” to “H” when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference between overdischarge release voltage (VDU) and overdischarge detection voltage (VDL). 3. Current Consumption during Operation (Test Condition 3, Test Circuit 2) The current consumption during operation (I OPE) is the current that fl ows through the VDD pin (I DD) under the set conditions of V1 = 3.5 V and V2 = 0 V (normal status). 4. Current Consumption during Overdischarge (Test Condition 3, Test Circuit 2) The current consumption during overdischarge (IOPED) is the current that flows through the VDD pin (I DD) under the set conditions of V1 = 1.5 V, V2 = 0V (overdischarge status).

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 11 5. CO Pin Resistance “H” (Test Condition 4, Test Circuit 3) 5. 1 CO pin output logic = Active “H” The CO pin resistance “H” (RCOH) is the resistance at the CO pin under the set conditions of V1 = 4.5 V, V2 = 0 V, V3 = 4.0 V. 5. 2 CO pin output logic = Active “L” The CO pin resistance “H” (RCOH) is the resistance at the CO pin under the set conditions of V1 = 3.5 V, V2 = 0 V, V3 = 3.0 V. 6. CO Pin Resistance “L” (Test Condition 4, Test Circuit 3) 6. 1 CO pin output logic = Active “H” The CO pin resistance “L” (RCOL) is the resistance at the CO pin under t he set conditions of V1 = 3.5 V, V2 = 0 V, V3 = 0.5 V. 6. 2 CO pin output logic = Active “L” The CO pin resistance “L” (RCOL) is the resistance at the CO pin under t he set conditions of V1 = 4.5 V, V2 = 0 V, V3 = 0.5 V. 7. DO Pin Resistance “H” (Test Condition 5, Test Circuit 3) The DO pin “H” resistance (R DOH) is the resistance at the DO pin under the set conditions of V1 = 3.5 V, V2 = 0 V, V4 = 3.0 V. 8. DO Pin Resistance “L” (Test Condition 5, Test Circuit 3) The DO pin “L” resistance (R DOL) is the resistance at the DO pin under the set conditions of V1 = 1.8 V, V2 = 0 V, V4 = 0.5 V. 9. Overcharge Detection Delay Time (Test Condition 6, Test Circuit 4) 9. 1 CO pin output logic = Active “H” The overcharge detection delay time (t CU) is the time needed for V CO to change from “L” to “H” just after the voltage V1 momentarily increases (within 10 μs) from overcharge detection voltage (V CU) −0.2 V to overcharge detection voltage (VCU) +0.2 V under the set conditions of V2 = 0 V. 9. 2 CO pin output logic = Active “L” The overcharge detection delay time (t CU) is the time needed for V CO to change from “H” to “L” just after the voltage V1 momentarily increases (within 10 μs) from overcharge detection voltage (V CU) −0.2 V to overcharge detection voltage (VCU) +0.2 V under the set conditions of V2 = 0 V. 10. Overdischarge Detection Delay Time (Test Condition 6, Test Circuit 4) The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage V1 momentarily decreases (within 10 μs) from overdischarge detection voltage (V DL) +0.2 V to overdischarge detection voltage (VDL) −0.2 V under the set condition of V2 = 0 V.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 13  Operation Remark Refer to the “ Battery Protection IC Connection Example”. 1. Normal Status The S-8211E Series monitors the voltage of the battery connected between the VDD and VSS pins. In case of overdischarge detection voltage (V DL) ≤ battery voltage ≤ overcharge detection voltage (V CU), the output levels of CO and DO pins are as follows. This is the normal status. Table 12 CO Pin Output Logic CO Pin DO Pin Active “H” VVM V DD Active “L” VDD V DD 2. Overcharge Status When the battery voltage in the normal status exceeds the overcharge detection voltage (VCU) during charge, and this status is held for the overcharge detection delay time (t CU) or more, the output levels of CO and DO pins are as follows. This is the overcharge status. This overcharge status is released when the battery voltage decreases to the overcharge release voltage (V CL) or less. Table 13 CO Pin Output Logic CO Pin DO Pin Active “H” VDD V DD Active “L” VVM V DD 3. Overdischarge Status When the battery voltage in the normal status decreases than the overc harge detection voltage (V DL) during discharge, and this status is held for the overdischarge detection delay time (tDL) or more, the output levels of CO and DO pins are as follows. This is the overdischarge status. This overdischarge status is released when the battery voltage increases to the overdischarge release voltage (V DU) or more. Table 14 CO Pin Output Logic CO Pin DO Pin Active “H” VVM V SS Active “L” VDD V SS 4. Delay Circuit The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 14  Timing Chart 1. Overcharge Detection, Overdischarge Detection VCU VDU VDL VCL Battery voltage VDD DO pin voltage VSS Status*1 Overcharge detection delay time (tCU) VM VDD Overdischarge detection delay time (tDL) CO pin voltage (active ”H”) VDD VM V CO pin voltage (active ”L”) *1. (1) : Normal status (2) : Overcharge status (3) : Overdischarge status Figure 9

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 15  Battery Protection IC Connection Example Battery C1 VSS DO VDD CO VM S-8211E Series CO DO Figure 10 Table 15 Constants for External Components Symbol Part Purpose Min. Typ. Max. Remark R1 Resistor ESD protection, For power fluctuation 100 Ω 220 Ω 330 Ω Resistance should be as small as possible to avoid lowering the overcharge detection accuracy due to current consumption. *1 C1 Capacitor For power fluctuation 0.022 μ F 0.1 μF 1.0 μF Connect a capacitor of 0.022 μF or higher between VDD pin and VSS pin. *2 R2*3 Resistor ESD protection 300 Ω 1 k Ω 4 k Ω - *1. Insert a resistor of 100 Ω or higher as R1 for ESD protection. *2. If a capacitor of less than 0.022 μF is connected to C1, DO pin may oscillate. Be sure to connect a capacitor of 0.022 μF or higher to C1. *3. Be sure to using R2, connect the VM pin with the VSS pin. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant.

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 16  Application Circuit Examples 1. Protection circuits series multi-cells Battery C1 VSS DO VDD CO VM S-8211E Series CO DO Battery C1 VSS DO VDD CO VM S-8211E Series CO DO Battery C1 VSS DO VDD CO VM S-8211E Series CO DO Battery C1 VSS DO VDD CO VM S-8211E Series CO DO Figure 11

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 17 2. Charge cell-balance detection circuit Battery C1 VSS DO VDD CO VM S-8211E Series Battery C1 VSS DO VDD CO VM S-8211E Series Battery C1 VSS DO VDD CO VM S-8211E Series Battery C1 VSS DO VDD CO VM S-8211E Series Protection IC EB− EB+ Figure 12

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 18  Precautions

• The application conditions for the i nput voltage, output voltage, and load curre nt should not exceed the package power dissipation.
• Be sure to using R2, connect the VM pin with the VSS pin.
• Do not apply an electrostatic discharge to this IC that ex ceeds the performance ratings of the built-in electrostatic protection circuit.
• SII claims no responsibility for any and all disputes arisi ng out of or in connection with any infringement by products including this IC of patents owned by a third party.

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 19  Characteristics (Typical Data) 1. Current Consumption 1. 1 IOPE vs. Ta 1. 2 IOPED vs. Ta −40 −25 0 25 50 7585 Ta [°C] IOPE [μA] −40−25 0 25 50 7585 Ta [°C] IOPED [μA] 1. 3 IOPE vs. VDD 0 2 4 6 VDD [V] IOPE [μA] 2. Overcharge Detection / Release Voltage, Overdi scharge Detection / Release Voltage, Overcurrent Detection Voltage, and Delay Time 2. 1 VCU vs. Ta 2. 2 VCL vs. Ta −40 −25 0 25 50 75 85 Ta [°C] 4.350 4.345 4.340 4.335 4.330 4.325

4.300 VCU [V]

4.320 4.315 4.310 4.305 −40−25 0 25 50 75 85 Ta [°C] 4.125 4.115 4.105 4.095 4.085 4.075

4.025 VCL [V]

4.065 4.055 4.045 4.035 2. 3 VDU vs. Ta 2. 4 VDL vs. Ta −40 −25 0 25 50 75 85 Ta [°C] 2.95 2.94 2.93 2.92 2.91 2.90

2.85 VDU [V]

2.89 2.88 2.87 2.86 −40 −25 0 25 50 7585 Ta [°C] 2.60 2.58 2.56 2.54 2.52 2.50 2.40 VDL [V] 2.48 2.46 2.44 2.42

BATTERY PROTECTION IC FOR 1-CELL PACK S-8211E Series Rev.2.4_00 Seiko Instruments Inc. 20 2. 5 tCU vs. Ta 2. 6 tDL vs. Ta −40 −25 0 25 50 7585 Ta [°C] 1.50 1.45 1.40 1.35 1.30 1.25 1.00 tCU [s] 1.20 1.15 1.10 1.05 −40 −25 0 25 50 7585 Ta [°C] 200 190 180 170 160 150 100 tDL [ms] 140 130 120 110 3. CO pin / DO pin 3. 1 ICOH vs. VCO 3. 2 ICOL vs. VCO −0.1 −0.2 −0.5 ICOH [mA] −0.3 −0.4 0 1 2 3 4 VCO [V] 0.5 0.4 0.3 ICOL [mA] 0.2 0.1 0 1 2 3 4 V CO [V] 3. 3 IDOH vs. VDO 3. 4 IDOL vs. VDO 0 1 2 3 4 VDO [V] −0.05 −0.10 −0.15 −0.30 IDOH [mA] −0.20 −0.25 0 0.5 1.0 1.5 VDO [V] 0.20 0.15 0.10 IDOL [mA] 0.05

BATTERY PROTECTION IC FOR 1-CELL PACK Rev.2.4_00 S-8211E Series Seiko Instruments Inc. 21  Marking Specifications 1. SOT-23-5 123 Top view (1) (2) (3) (4) (1) to (3): Product Code (refer to Product Name vs. Product Code) (4) : Lot number Product Name vs. Product Code Product Name Product Code (1) (2) (3) S-8211EAC-M5T1U R 3 C S-8211EAF-M5T1U R 3 F S-8211EAG-M5T1U R 3 G S-8211EAJ-M5T1U R 3 J S-8211EAK-M5T1U R 3 K 2. SNT-6A Top view 13 2 64 5 (1) (2) (3) (4) (5) (6) (1) to (3): Product Code (refer to Product Name vs. Product Code) (4) to (6): Lot number Product Name vs. Product Code Product Name Product Code (1) (2) (3) S-8211EAA-I6T1U R 3 A S-8211EAB-I6T1U R 3 B S-8211EAD-I6T1U R 3 D S-8211EAE-I6T1U R 3 E S-8211EAH-I6T1U R 3 H S-8211EAI-I6T1U R 3 I S-8211EAP-I6T1U R 3 P

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