S5712A

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OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH ICwww.sii-ic.com © SII Semiconductor Corporation, 2010-2017 Rev.5.0_00 This IC, developed by CMOS technology, is a high-accuracy Ha ll effect switch IC that oper ates at a low voltage and low current consumption. The output voltage changes when this IC detects the intensity level of magnetic flux density. Using this IC with a magnet makes it possible to detect the open / close in various devices. High-density mounting is possible by using the small SOT-23-3 or the super-small SNT-4A package. Due to its low voltage operation and low curr ent consumption, this IC is suitable for battery-operated portable devices. Also, due to its high-accuracy magnetic characte ristics, this IC can make operation's dispersion in the system combined with magnet smaller. SII Semiconductor Corporation offers a "magnetic simulation service" that provides the ideal combination of magnets and our Hall ICs for customer systems. Our magnetic simulation se rvice will reduce prototype pr oduction, development period and development costs. In addition, it will contribute to optimization of parts to realize high cost performance. For more information regarding our magnetic simulation service, contact our sales office.  Features

• Pole detection*1: Detection of omnipolar, S pole or N pole
• Output logic*1: Active "L", active "H"
• Output form*1: Nch open-drain output, CMOS output
• Magnetic sensitivity*1: B OP = 1.8 mT typ. B OP = 3.0 mT typ. B OP = 4.5 mT typ.
• Operating cycle (current consumption)*1: Product with omnipolar detection t CYCLE = 5.70 ms (IDD = 12.0 μA) typ. t CYCLE = 50.50 ms (IDD = 2.0 μA) typ. t CYCLE = 204.10 ms (IDD = 1.0 μA) typ. Product with S pole or N pole detection t CYCLE = 6.05 ms (IDD = 6.0 μA) typ. t CYCLE = 50.85 ms (IDD = 1.4 μA) typ.
• Power supply voltage range: VDD = 1.6 V to 3.5 V
• Operation temperature range: Ta = −40°C to +85°C
• Lead-free (Sn 100%), halogen-free *1. The option can be selected.  Applications
• Mobile phone, smart phone
• Notebook PC, tablet PC
• Digital video camera
• Plaything, portable game
• Home appliance  Packages
• SOT-23-3
• SNT-4A

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series  Product Name Structure 1. Product name S-5712 x x x x x - xxxx U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and packing specifications*1 M3T1: SOT-23-3, Tape I4T1: SNT-4A, Tape Magnetic sensitivity 0: B OP = 1.8 mT typ. 1: B OP = 3.0 mT typ. 2: B OP = 4.5 mT typ. Output logic L: Active "L" H: Active "H" Pole detection D: Detection of omnipolar S: Detection of S pole N: Detection of N pole Output form N: Nch open-drain output C: CMOS output Operating cycle A: t CYCLE = 50.50 ms typ. (Product with omnipolar detection) t CYCLE = 50.85 ms typ. (Product with S pole or N pole detection) B: t CYCLE = 204.10 ms typ. (Product with omnipolar detection) C: t CYCLE = 5.70 ms typ. (Product with omnipolar detection) t CYCLE = 6.05 ms typ. (Product with S pole or N pole detection) *1. Refer to the tape drawing. 2. Packages Table 1 Package Drawing Codes Package Name Dimension Tape Reel Land SOT-23-3 MP003-C-P-SD MP003-C-C-SD MP003-Z-R-SD − SNT-4A PF004-A-P-SD PF004-A-C-SD PF004-A-R-SD PF004-A-L-SD

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 3. Product name list 3. 1 SOT-23-3 3. 1. 1 Nch open-drain output product Table 2 Product Name Operating Cycle (tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity (BOP) S-5712ANDL0-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 1.8 mT typ. S-5712ANDL1-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 3.0 mT typ. S-5712ANDL2-M3T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ. S-5712ANSL1-M3T1U 50.85 ms typ. Nch open-drai n output S pole Active "L" 3.0 mT typ. S-5712ANSL2-M3T1U 50.85 ms typ. Nch open-drai n output S pole Active "L" 4.5 mT typ. S-5712ANSH1-M3T1U 50.85 ms typ. Nch open-drain output S pole Active "H" 3.0 mT typ. S-5712BNDL2-M3T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ. S-5712BNDH2-M3T1U 204.10 ms typ. Nch open-drain out put Omnipolar Active "H" 4.5 mT typ. Remark Please contact our sales office for products other than the above. 3. 1. 2 CMOS output product Table 3 Product Name Operating Cycle (tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity (BOP) S-5712ACDL1-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ. S-5712ACDL2-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ. S-5712ACDH1-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ. S-5712ACDH2-M3T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ. S-5712ACSL1-M3T1U 50.85 ms typ. CMOS out put S pole Active "L" 3.0 mT typ. S-5712ACSL2-M3T1U 50.85 ms typ. CMOS out put S pole Active "L" 4.5 mT typ. S-5712ACNL1-M3T1U 50.85 ms typ. CMOS out put N pole Active "L" 3.0 mT typ. S-5712ACNL2-M3T1U 50.85 ms typ. CMOS out put N pole Active "L" 4.5 mT typ. S-5712CCDL1-M3T1U 5.70 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ. S-5712CCSL1-M3T1U 6.05 ms typ. CMOS out put S pole Active "L" 3.0 mT typ. Remark Please contact our sales office for products other than the above.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 3. 2 SNT-4A 3. 2. 1 Nch open-drain output product Table 4 Product Name Operating Cycle (tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity (BOP) S-5712ANDL1-I4T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 3.0 mT typ. S-5712ANDL2-I4T1U 50.50 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ. S-5712ANSL1-I4T1U 50.85 ms typ. Nch open-drai n output S pole Active "L" 3.0 mT typ. S-5712ANSL2-I4T1U 50.85 ms typ. Nch open-drai n output S pole Active "L" 4.5 mT typ. S-5712BNDL2-I4T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "L" 4.5 mT typ. S-5712BNDH2-I4T1U 204.10 ms typ. Nch open-drain output Omnipolar Active "H" 4.5 mT typ. Remark Please contact our sales office for products other than the above. 3. 2. 2 CMOS output product Table 5 Product Name Operating Cycle (tCYCLE) Output Form Pole Detection Output Logic Magnetic Sensitivity (BOP) S-5712ACDL0-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 1.8 mT typ. S-5712ACDL1-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ. S-5712ACDL2-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ. S-5712ACDH1-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ. S-5712ACDH2-I4T1U 50.50 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ. S-5712ACSL1-I4T1U 50.85 ms typ. CMOS output S pole Active "L" 3.0 mT typ. S-5712ACSL2-I4T1U 50.85 ms typ. CMOS output S pole Active "L" 4.5 mT typ. S-5712ACSH1-I4T1U 50.85 ms typ. CMOS output S pole Active "H" 3.0 mT typ. S-5712ACSH2-I4T1U 50.85 ms typ. CMOS output S pole Active "H" 4.5 mT typ. S-5712ACNL1-I4T1U 50.85 ms typ. CMOS output N pole Active "L" 3.0 mT typ. S-5712ACNL2-I4T1U 50.85 ms typ. CMOS output N pole Active "L" 4.5 mT typ. S-5712ACNH1-I4T1U 50.85 ms typ. CMOS output N pole Active "H" 3.0 mT typ. S-5712BCDL1-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ. S-5712BCDL2-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "L" 4.5 mT typ. S-5712BCDH1-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ. S-5712BCDH2-I4T1U 204.10 ms typ. CMOS output Omnipolar Active "H" 4.5 mT typ. S-5712CCDL1-I4T1U 5.70 ms typ. CMOS output Omnipolar Active "L" 3.0 mT typ. S-5712CCDH1-I4T1U 5.70 ms typ. CMOS output Omnipolar Active "H" 3.0 mT typ. S-5712CCSL1-I4T1U 6.05 ms typ. CMOS output S pole Active "L" 3.0 mT typ. S-5712CCNL1-I4T1U 6.05 ms typ. CMOS out put N pole Active "L" 3.0 mT typ. Remark Please contact our sales office for products other than the above.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00  Pin Configurations 1. SOT-23-3 Top view Figure 3 Table 6 Pin No. Symbol Pin Description

1 VSS GND pin

2 VDD Power supply pin

3 OUT Output pin

1. SNT-4A 3 2 Top view Figure 4 Table 7 Pin No. Symbol Pin Description

1 VDD Power supply pin

2 VSS GND pin

3 NC*1 No connection

4 OUT Output pin

*1. The NC pin is electrically open. The NC pin can be connected to the VDD pin or the VSS pin.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series  Absolute Maximum Ratings Table 8 (Ta = +25°C unless otherwise specified) Item Symbol Absolute Maximum Rating Unit Power supply voltage VDD VSS − 0.3 to VSS + 7.0 V Output current IOUT ±1.0 mA Output voltage Nch open-drain output product VOUT VSS − 0.3 to VSS + 7.0 V CMOS output product VSS − 0.3 to VDD + 0.3 V Operation ambient temperature T opr −40 to +85 °C Storage temperature Tstg −40 to +125 °C Caution The absolute maximum ratings are rated values exceeding whic h the product could suffer physical damage. These values must therefore not be exceeded under any conditions.  Thermal Resistance Value Table 9 Item Symbol Condition Min. Typ. Max. Unit Junction-to-ambient thermal resistance*1 θja SOT-23-3 Board A − 200 − ° C/W Board B − 165 − ° C/W Board C − − − ° C/W Board D − − − ° C/W Board E − − − ° C/W SNT-4A Board A − 300 − ° C/W Board B − 242 − ° C/W Board C − − − ° C/W Board D − − − ° C/W Board E − − − ° C/W *1. Test environment: compliance with JEDEC STANDARD JESD51-2A Remark Refer to " Power Dissipation" and "Test Board" for details.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00  Electrical Characteristics 1. Product with omnipolar detection 1. 1 S-5712AxDxx Table 10 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Power supply voltage V DD − 1.60 1.85 3.50 V − Current consumption I DD Average value − 2.0 4.0 μA 1 Output voltage V OUT Nch open-drain output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 CMOS output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 Output transistor Pch, I OUT = −0.5 mA VDD − 0.4 − − V 3 Leakage current I LEAK Nch open-drain output product Output transistor Nch, V OUT = 3.5 V − − 1 μA 4 Awake mode time t AW − − 0.10 − ms − Sleep mode time t SL − − 50.40 − ms − Operating cycle t CYCLE t AW + tSL − 50.50 100.00 ms − 1. 2 S-5712BxDxx Table 11 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Power supply voltage V DD − 1.60 1.85 3.50 V − Current consumption I DD Average value − 1.0 2.0 μA 1 Output voltage V OUT Nch open-drain output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 CMOS output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 Output transistor Pch, I OUT = −0.5 mA VDD − 0.4 − − V 3 Leakage current I LEAK Nch open-drain output product Output transistor Nch, V OUT = 3.5 V − − 1 μA 4 Awake mode time t AW − − 0.10 − ms − Sleep mode time t SL − − 204.00 − ms − Operating cycle t CYCLE t AW + tSL − 204.10 400.00 ms −

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 1. 3 S-5712CxDxx Table 12 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Power supply voltage V DD − 1.60 1.85 3.50 V − Current consumption I DD Average value − 12.0 22.0 μA 1 Output voltage V OUT Nch open-drain output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 CMOS output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 Output transistor Pch, I OUT = −0.5 mA VDD − 0.4 − − V 3 Leakage current I LEAK Nch open-drain output product Output transistor Nch, V OUT = 3.5 V − − 1 μA 4 Awake mode time t AW − − 0.10 − ms − Sleep mode time t SL − − 5.60 − ms − Operating cycle t CYCLE t AW + tSL − 5.70 12.00 ms −

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 2. Product with S pole or N pole detection 2. 1 S-5712AxSxx, S-5712AxNxx Table 13 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Power supply voltage V DD − 1.60 1.85 3.50 V − Current consumption I DD Average value − 1.4 3.0 μA 1 Output voltage V OUT Nch open-drain output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 CMOS output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 Output transistor Pch, I OUT = −0.5 mA VDD − 0.4 − − V 3 Leakage current I LEAK Nch open-drain output product Output transistor Nch, V OUT = 3.5 V − − 1 μA 4 Awake mode time t AW − − 0.05 − ms − Sleep mode time t SL − − 50.80 − ms − Operating cycle t CYCLE t AW + tSL − 50.85 100.00 ms − 2. 2 S-5712CxSxx, S-5712CxNxx Table 14 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Power supply voltage V DD − 1.60 1.85 3.50 V − Current consumption I DD Average value − 6.0 11.0 μA 1 Output voltage V OUT Nch open-drain output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 CMOS output product Output transistor Nch, I OUT = 0.5 mA − − 0.4 V 2 Output transistor Pch, I OUT = −0.5 mA VDD − 0.4 − − V 3 Leakage current I LEAK Nch open-drain output product Output transistor Nch, V OUT = 3.5 V − − 1 μA 4 Awake mode time t AW − − 0.05 − ms − Sleep mode time t SL − − 6.00 − ms − Operating cycle t CYCLE t AW + tSL − 6.05 12.00 ms −

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series  Magnetic Characteristics 1. Product with omnipolar detection 1. 1 Product with B OP = 1.8 mT typ. Table 15 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 0.6 1.8 3.0 mT 5 N pole B OPN − −3.0 −1.8 −0.6 mT 5 Release point*2 S pole B RPS − 0.1 1.1 2.4 mT 5 N pole B RPN − −2.4 −1.1 −0.1 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 0.7 − mT 5 N pole B HYSN B HYSN = |BOPN − BRPN| − 0.7 − mT 5 1.2 Product with B OP = 3.0 mT typ. Table 16 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 1.4 3.0 4.0 mT 5 N pole B OPN − −4.0 −3.0 −1.4 mT 5 Release point*2 S pole B RPS − 1.1 2.2 3.7 mT 5 N pole B RPN − −3.7 −2.2 −1.1 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 0.8 − mT 5 N pole B HYSN B HYSN = |BOPN − BRPN| − 0.8 − mT 5 1. 3 Product with B OP = 4.5 mT typ. Table 17 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 2.5 4.5 6.0 mT 5 N pole B OPN − −6.0 −4.5 −2.5 mT 5 Release point*2 S pole B RPS − 2.0 3.5 5.5 mT 5 N pole B RPN − −5.5 −3.5 −2.0 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 1.0 − mT 5 N pole B HYSN B HYSN = |BOPN − BRPN| − 1.0 − mT 5

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 2. Product with S pole detection 2. 1 Product with B OP = 1.8 mT typ. Table 18 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 0.6 1.8 3.0 mT 5 Release point*2 S pole B RPS − 0.1 1.1 2.4 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 0.7 − mT 5 2. 2 Product with B OP = 3.0 mT typ. Table 19 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 1.4 3.0 4.0 mT 5 Release point*2 S pole B RPS − 1.1 2.2 3.7 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 0.8 − mT 5 2. 3 Product with B OP = 4.5 mT typ. Table 20 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 S pole B OPS − 2.5 4.5 6.0 mT 5 Release point*2 S pole B RPS − 2.0 3.5 5.5 mT 5 Hysteresis width*3 S pole B HYSS B HYSS = BOPS − BRPS − 1.0 − mT 5

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 3. Product with N pole detection 3. 1 Product with B OP = 1.8 mT typ. Table 21 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 N pole B OPN − −3.0 −1.8 −0.6 mT 5 Release point*2 N pole B RPN − −2.4 −1.1 −0.1 mT 5 Hysteresis width*3 N pole B HYSN B HYSN = |BOPN − BRPN| − 0.7 − mT 5 3. 2 Product with B OP = 3.0 mT typ. Table 22 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 N pole B OPN − −4.0 −3.0 −1.4 mT 5 Release point*2 N pole B RPN − −3.7 −2.2 −1.1 mT 5 Hysteresis width*3 N pole B HYSN B HYSN = |BOPN − BRPN| − 0.8 − mT 5 3. 3 Product with B OP = 4.5 mT typ. Table 23 (Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Operation point*1 N pole B OPN − −6.0 −4.5 −2.5 mT 5 Release point*2 N pole B RPN − −5.5 −3.5 −2.0 mT 5 Hysteresis width*3 N pole B HYSN B HYSN = |BOPN − BRPN| − 1.0 − mT 5 *1. B OPN, BOPS: Operation points BOPN and B OPS are the values of magnetic fl ux density when t he output voltage (V OUT) changes after the magnetic flux density applied to this IC by the magnet (N pole or S pole) is increased (by moving the magnet closer). Even when the magnetic flux density exceeds BOPN or BOPS, VOUT retains the status. *2. B RPN, BRPS: Release points BRPN and B RPS are the values of magnetic fl ux density when t he output voltage (V OUT) changes after the magnetic flux density applied to this IC by the magnet (N pole or S pole) is decreased (the magnet is moved further away). Even when the magnetic flux density falls below BRPN or BRPS, VOUT retains the status. *3. B HYSN, BHYSS: Hysteresis widths BHYSN and BHYSS are the difference between BOPN and BRPN, and BOPS and BRPS, respectively. Remark The unit of magnetic density mT can be converted by using the formula 1 mT = 10 Gauss.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00  Standard Circuit S-5712A/B/C Series VDD VSS OUTCIN R*1 100 kΩ 0.1 μF *1. Resistor (R) is unnecessary for the CMOS output product. Figure 10 Caution The above connection diag ram and constant will not guara ntee successful operation. Perform thorough evaluation using the actual application to set the constant.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 3. Basic operation This IC changes the output voltage level (V OUT) according to the level of the magnet ic flux density (N pole or S pole) applied by a magnet. The following explains the operation when the output logic is active "L". 3. 1 Product with omnipolar detection When the magnetic flux density ve rtical to the marking surfac e exceeds the operation point (B OPN or B OPS) after the S pole or N pole of a magnet is moved clos er to the marking surface of this IC, V OUT changes from "H" to "L". When the S pole or N pole of a magnet is moved further away from the ma rking surface of this IC and the magnetic flux density is lower than the release point (BRPN or BRPS), VOUT changes from "L" to "H". Figure 15 shows the relationship between the magnetic flux density and VOUT. VOUT 0BOPN B RPN BRPS BOPS BHYSSBHYSN H L Magnetic flux density (B) N pole S pole Figure 15 3. 2 Product with S pole detection When the magnetic flux dens ity vertical to the ma rking surface exceeds B OPS after the S pole of a magnet is moved closer to the marking surface of this IC, V OUT changes from "H" to "L". W hen the S pole of a magnet is moved further away from the mark ing surface of this IC and the m agnetic flux density is lower than B RPS, VOUT changes from "L" to "H". Figure 16 shows the relationship between the magnetic flux density and VOUT. VOUT

0 BRPS BOPS

H L Magnetic flux density (B) N pole S pole Figure 16

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00  Precautions

• If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feed- through current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
• Note that the IC may malfunction if the power supply voltage rapidly changes.
• Do not apply an electrostatic discharge to this IC that ex ceeds the performance ratings of the built-in electrostatic protection circuit.
• Large stress on this IC may affect the magnetic characteri stics. Avoid large stress which is caused by the handling during or after mounting the IC on a board.
• SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series  Characteristics (Typical Data) 1. S-5712AxDxx 1. 1 Operation point, release point (B OP, BRP) vs. Temperature (Ta) 1. 1. 1 S-5712AxDx0 1. 1. 2 S-5712AxDx1 BOP, BRP [mT] 6.0 4.0 2.0 0.0 2.0 4.0 6.0 40 VDD = 1.85 V Ta [C] BOPS BRPS BRPN BOPN BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN 1. 1. 3 S-5712AxDx2 BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN 1. 2 Operation point, release point (B OP, BRP) vs. Power supply voltage (VDD) 1. 2. 1 S-5712AxDx0 1. 2. 2 S-5712AxDx1 BOP, BRP [mT] 6.0 4.0 2.0 0.0 2.0 6.0 4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN 1. 2. 3 S-5712AxDx2 BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 1. 3 Current consumption (I DD) vs. Temperature (Ta) 1. 4 Current consumption (I DD) vs. Power supply voltage (VDD) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 −40 IDD [μA] +85−25 0 +25 +50 +75 Ta [°C] VDD = 1.85 V VDD = 3.0 V VDD [V] 0.0 1.0 2.0 3.0 4.0 5.0 6.0 IDD [μA] Ta = +85°C Ta = +25°C Ta = −40°C 1. 5 Awake mode time (t AW) vs. Temperature (Ta) 1. 6 Awake mode time (t AW) vs. Power supply voltage (VDD) 200 150 100 −40 tAW [μs] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 200 150 100 tAW [μs] Ta = +85°C Ta = +25°CTa = −40°C 1. 7 Sleep mode time (t SL) vs. Temperature (Ta) 1. 8 Sleep mode time (t SL) vs. Power supply voltage (VDD) 100 −40 tSL [ms] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 100 tSL [ms] Ta = +85°C Ta = +25°CTa = −40°C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 2. S-5712AxSxx, S-5712AxNxx 2. 1 Operation point, release point (B OP, BRP) vs. Temperature (Ta) 2. 1. 1 S-5712AxSx1 2. 1. 2 S-5712AxSx2 BOP, BRP [mT] 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BOP, BRP [mT] 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS 2. 1. 3 S-5712AxNx1 2. 1. 4 S-5712AxNx2 BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BRPN BOPN BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BRPN BOPN 2. 2 Operation point, release point (B OP, BRP) vs. Power supply voltage (VDD) 2. 2. 1 S-5712AxSx1 2. 2. 2 S-5712AxSx2 BOP, BRP [mT] 6.0 4.0 2.0 0.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BOP, BRP [mT] 6.0 4.0 2.0 0.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS 2. 2. 3 S-5712AxNx1 2. 2. 4 S-5712AxNx2 BOP, BRP [mT] 0.0 −2.0 −4.0 −6.0 VDD [V] Ta = +25°C BRPN BOPN BOP, BRP [mT] 0.0 −2.0 −4.0 −6.0 VDD [V] Ta = +25°C BRPN BOPN

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 2. 3 Current consumption (I DD) vs. Temperature (Ta) 2. 4 Current consumption (I DD) vs. Power supply voltage (VDD) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 −40 IDD [μA] +85−25 0 +25 +50 +75 Ta [°C] VDD = 1.85 V VDD = 3.0 V VDD [V] 0.0 1.0 2.0 3.0 4.0 5.0 6.0 IDD [μA] Ta = +85°C Ta = +25°C Ta = −40°C 2. 5 Awake mode time (t AW) vs. Temperature (Ta) 2. 6 Awake mode time (t AW) vs. Power supply voltage (VDD) 200 150 100 −40 tAW [μs] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 200 150 100 tAW [μs] Ta = +85°C Ta = +25°C Ta = −40°C 2. 7 Sleep mode time (t SL) vs. Temperature (Ta) 2. 8 Sleep mode time (t SL) vs. Power supply voltage (VDD) 100 −40 tSL [ms] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 100 tSL [ms] Ta = +85°C Ta = +25°CTa = −40°C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 3. S-5712BxDxx 3. 1 Operation point, release point (B OP, BRP) vs. Temperature (Ta) 3. 1. 1 S-5712BxDx1 3. 1. 2 S-5712BxDx2 BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN 3. 2 Operation point, release point (B OP, BRP) vs. Power supply voltage (VDD) 3. 2. 1 S-5712BxDx1 3. 2. 2 S-5712BxDx2 BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN 3. 3 Current consumption (I DD) vs. Temperature (Ta) 3. 4 Current consumption (I DD) vs. Power supply voltage (VDD) 0.0 2.0 4.0 6.0 Ta [C] 5.0 3.0 1.0 IDD [A] VDD = 1.85 V VDD = 3.0 V VDD [V] 0.0 2.0 4.0 6.0 IDD [A] 1.0 3.0 5.0 Ta = +85C Ta = +25C Ta = 40C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 3. 5 Awake mode time (t AW) vs. Temperature (Ta) 3. 6 Awake mode time (t AW) vs. Power supply voltage (VDD) 200 150 100 −40 tAW [μs] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 200 150 100 tAW [μs] Ta = +85°C Ta = +25°CTa = −40°C 3. 7 Sleep mode time (t SL) vs. Temperature (Ta) 3. 8 Sleep mode time (t SL) vs. Power supply voltage (VDD) 400 250 300 200 150 100 40 tSL [ms] Ta [C] 350 VDD = 1.85 V VDD = 3.0 V VDD [V] 300 400 250 200 150 tSL [ms] 100 350 Ta = 85C Ta = 25C Ta = 40C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 4. S-5712CxDxx 4. 1 Operation point, release point (B OP, BRP) vs. Temperature (Ta) 4. 1. 1 S-5712CxDx1 4. 1. 2 S-5712CxDx2 BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BRPN BOPN 4. 2 Operation point, release point (B OP, BRP) vs. Power supply voltage (VDD) 4. 2. 1 S-5712CxDx1 4. 2. 2 S-5712CxDx2 BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN BOP, BRP [mT] 6.0 4.0 2.0 0.0 −2.0 −6.0 −4.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BRPN BOPN 4. 3 Current consumption (I DD) vs. Temperature (Ta) 4. 4 Current consumption (I DD) vs. Power supply voltage (VDD) −40 IDD [μA] +85−25 0 +25 +50 +75 Ta [°C] VDD = 1.85 V VDD = 3.0 V VDD [V] IDD [μA] Ta = +85°C Ta = +25°C Ta = −40°C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 4. 5 Awake mode time (t AW) vs. Temperature (Ta) 4. 6 Awake mode time (t AW) vs. Power supply voltage (VDD) 200 150 100 −40 tAW [μs] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 200 150 100 tAW [μs] Ta = +85°C Ta = +25°CTa = −40°C 4. 7 Sleep mode time (t SL) vs. Temperature (Ta) 4. 8 Sleep mode time (t SL) vs. Power supply voltage (VDD) −40 tSL [ms] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] tSL [ms] Ta = +85°C Ta = +25°CTa = −40°C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series 5. S-5712CxSxx, S-5712CxNxx 5. 1 Operation point, release point (B OP, BRP) vs. Temperature (Ta) 5. 1. 1 S-5712CxSx1 5. 1. 2 S-5712CxSx2 BOP, BRP [mT] 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS BOP, BRP [mT] 0.0 2.0 4.0 6.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BOPS BRPS 5. 1. 3 S-5712CxNx1 5. 1. 4 S-5712CxNx2 BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BRPN BOPN BOP, BRP [mT] −6.0 −4.0 −2.0 0.0 −40 VDD = 1.85 V +85−25 0 +25 +50 +75 Ta [°C] BRPN BOPN 5. 2 Operation point, release point (B OP, BRP) vs. Power supply voltage (VDD) 5. 2. 1 S-5712CxSx1 5. 2. 2 S-5712CxSx2 BOP, BRP [mT] 6.0 4.0 2.0 0.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS BOP, BRP [mT] 6.0 4.0 2.0 0.0 1.5 3.5 2.0 2.5 3.0 VDD [V] Ta = +25°C BOPS BRPS 5. 2. 3 S-5712CxNx1 5. 2. 4 S-5712CxNx2 BOP, BRP [mT] 0.0 −2.0 −4.0 −6.0 VDD [V] Ta = +25°C BRPN BOPN BOP, BRP [mT] 0.0 −2.0 −4.0 −6.0 VDD [V] Ta = +25°C BRPN BOPN

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5712A/B/C Series Rev.5.0_00 5. 3 Current consumption (I DD) vs. Temperature (Ta) 5. 4 Current consumption (I DD) vs. Power supply voltage (VDD) −40 IDD [μA] +85−25 0 +25 +50 +75 Ta [°C] VDD = 1.85 V VDD = 3.0 V VDD [V] IDD [μA] Ta = +85°C Ta = +25°C Ta = −40°C 5. 5 Awake mode time (t AW) vs. Temperature (Ta) 5. 6 Awake mode time (t AW) vs. Power supply voltage (VDD) 200 150 100 −40 tAW [μs] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] 200 150 100 tAW [μs] Ta = +85°C Ta = +25°CTa = −40°C 5. 7 Sleep mode time (t SL) vs. Temperature (Ta) 5. 8 Sleep mode time (t SL) vs. Power supply voltage (VDD) −40 tSL [ms] +85−25 0 +25 +50 +75 Ta [°C] VDD = 3.0 V VDD = 1.85 V VDD [V] tSL [ms] Ta = +85°C Ta = +25°CTa = −40°C

LOW VOLTAGE OPERATION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC Rev.5.0_00 S-5712A/B/C Series  Power Dissipation 0 25 50 75 100 125 150 1750.0 0.2 0.4 0.6 0.8 1.0 Ambient temperature (Ta) [C] Power dissipation (PD) [W] Tj = 125C max. SOT-23-3 B A 0 25 50 75 100 125 150 1750.0 0.2 0.4 0.6 0.8 1.0 Ambient temperature (Ta) [C] Power dissipation (PD) [W] Tj = 125C max. SNT-4A B A Board Power Dissipation (PD) Board Power Dissipation (PD) A 0.50 W A 0.33 W B 0.61 W B 0.41 W C − C − D − D − E − E −

(1) (2) Board A Item Specification Size [mm] 114.3 x 76.2 x t1.6 Material FR-4 Number of copper foil layer 2 Copper foil layer [mm] Land pattern and wiring for testing: t0.070 74.2 x 74.2 x t0.070 74.2 x 74.2 x t0.070 Thermal via - Board B Item Specification Size [mm] 114.3 x 76.2 x t1.6 Thermal via - Material FR-4 Number of copper foil layer 4 Copper foil layer [mm] Land pattern and wiring for testing: t0.070 74.2 x 74.2 x t0.035 74.2 x 74.2 x t0.035 IC Mount Area SOT-23-3/5/6 Test Board No. SOT23x-A-Board-SD-1.0 SII Semiconductor Corporation

(1) (2) Thermal via - Material FR-4 Board A Item Specification Size [mm] 114.3 x 76.2 x t1.6 Number of copper foil layer 2 Copper foil layer [mm] Land pattern and wiring for testing: t0.070 74.2 x 74.2 x t0.070 Land pattern and wiring for testing: t0.070 74.2 x 74.2 x t0.035 74.2 x 74.2 x t0.035 74.2 x 74.2 x t0.070 Size [mm] 114.3 x 76.2 x t1.6 Board B Item Specification Thermal via - Material FR-4 Number of copper foil layer 4 Copper foil layer [mm] IC Mount Area SNT-4A Test Board No. SNT4A-A-Board-SD-1.0 SII Semiconductor Corporation

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/X53/X49/X49/X20/X53/X65/X6D/X69/X63/X6F/X6E/X64/X75/X63/X74/X6F/X72/X20/X43/X6F/X72/X70/X6F/X72/X61/X74/X69/X6F/X6E /X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X41/X4E/X47/X4C/X45 /X55/X4E/X49/X54/X6D/X6D /X53/X4E/X54/X2D/X34/X41/X2D/X41/X2D/X50/X4B/X47/X20/X44/X69/X6D/X65/X6E/X73/X69/X6F/X6E/X73 /X50/X46/X30/X30/X34/X2D/X41/X2D/X50/X2D/X53/X44/X2D/X36/X2E/X30 /X4E/X6F/X2E/X20/X50/X46/X30/X30/X34/X2D/X41/X2D/X50/X2D/X53/X44/X2D/X36/X2E/X30 /X31/X2E/X32/XB1/X30/X2E/X30/X34 /X30/X2E/X36/X35 /X30/X2E/X32/XB1/X30/X2E/X30/X35 /X30/X2E/X34/X38/XB1/X30/X2E/X30/X32 /X30/X2E/X30/X38 /X2B/X30/X2E/X30/X35 /X2D/X30/X2E/X30/X32/X31 /X32 /X33/X34

/X53/X49/X49/X20/X53/X65/X6D/X69/X63/X6F/X6E/X64/X75/X63/X74/X6F/X72/X20/X43/X6F/X72/X70/X6F/X72/X61/X74/X69/X6F/X6E /X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X41/X4E/X47/X4C/X45 /X55/X4E/X49/X54/X6D/X6D /X50/X46/X30/X30/X34/X2D/X41/X2D/X43/X2D/X53/X44/X2D/X31/X2E/X30 /X53/X4E/X54/X2D/X34/X41/X2D/X41/X2D/X43/X61/X72/X72/X69/X65/X72/X20/X54/X61/X70/X65 /X46/X65/X65/X64/X20/X64/X69/X72/X65/X63/X74/X69/X6F/X6E /X34/X2E/X30/XB1/X30/X2E/X31/X32/X2E/X30/XB1/X30/X2E/X30/X35 /X34/X2E/X30/XB1/X30/X2E/X31 /XF8/X31/X2E/X35 /X2B/X30/X2E/X31 /X20/X2D/X30 /XF8/X30/X2E/X35 /X31/X2E/X34/X35/XB1/X30/X2E/X31 /X30/X2E/X36/X35/XB1/X30/X2E/X30/X35 /X30/X2E/X32/X35/XB1/X30/X2E/X30/X35 /X31/X32 /X33/X34 /X35/XB0 /X4E/X6F/X2E/X20/X50/X46/X30/X30/X34/X2D/X41/X2D/X43/X2D/X53/X44/X2D/X31/X2E/X30 /X2B/X30/X2E/X31 /X20/X2D/X30

/X53/X49/X49/X20/X53/X65/X6D/X69/X63/X6F/X6E/X64/X75/X63/X74/X6F/X72/X20/X43/X6F/X72/X70/X6F/X72/X61/X74/X69/X6F/X6E /X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X41/X4E/X47/X4C/X45 /X55/X4E/X49/X54 /X31/X32/X2E/X35/X6D/X61/X78/X2E /X39/X2E/X30/XB1/X30/X2E/X33 /XF8/X31/X33/XB1/X30/X2E/X32 /X28/X36/X30/XB0/X29 /X28/X36/X30/XB0/X29 /X51/X54/X59/X2E /X35/X2C/X30/X30/X30 /X4E/X6F/X2E/X20/X50/X46/X30/X30/X34/X2D/X41/X2D/X52/X2D/X53/X44/X2D/X31/X2E/X30 /X50/X46/X30/X30/X34/X2D/X41/X2D/X52/X2D/X53/X44/X2D/X31/X2E/X30 /X45/X6E/X6C/X61/X72/X67/X65/X64/X20/X64/X72/X61/X77/X69/X6E/X67/X20/X69/X6E/X20/X74/X68/X65/X20/X63/X65/X6E/X74/X72/X61/X6C/X20/X70/X61/X72/X74 /X6D/X6D /X53/X4E/X54/X2D/X34/X41/X2D/X41/X2D/X52/X65/X65/X6C

/X53/X49/X49/X20/X53/X65/X6D/X69/X63/X6F/X6E/X64/X75/X63/X74/X6F/X72/X20/X43/X6F/X72/X70/X6F/X72/X61/X74/X69/X6F/X6E /X4E/X6F/X2E /X54/X49/X54/X4C/X45 /X41/X4E/X47/X4C/X45 /X55/X4E/X49/X54/X6D/X6D /X53/X4E/X54/X2D/X34/X41/X2D/X41 /X20/X20/X20/X20/X20/X20/X2D/X4C/X61/X6E/X64/X20/X52/X65/X63/X6F/X6D/X6D/X65/X6E/X64/X61/X74/X69/X6F/X6E /X50/X46/X30/X30/X34/X2D/X41/X2D/X4C/X2D/X53/X44/X2D/X34/X2E/X31 /X4E/X6F/X2E/X20/X50/X46/X30/X30/X34/X2D/X41/X2D/X4C/X2D/X53/X44/X2D/X34/X2E/X31 /X30/X2E/X33/X30/X2E/X33/X35 /X30/X2E/X35/X32 /X31/X2E/X31/X36 /X30/X2E/X35/X32 /X43/X61/X75/X74/X69/X6F/X6E /X31/X2E/X20/X44/X6F/X20/X6E/X6F/X74/X20/X64/X6F/X20/X73/X69/X6C/X6B/X73/X63/X72/X65/X65/X6E/X20/X70/X72/X69/X6E/X74/X69/X6E/X67/X20/X61/X6E/X64/X20/X73/X6F/X6C/X64/X65/X72/X20/X70/X72/X69/X6E/X74/X69/X6E/X67/X20/X75/X6E/X64/X65/X72/X20/X74/X68/X65/X20/X6D/X6F/X6C/X64/X20/X72/X65/X73/X69/X6E/X20/X6F/X66/X20/X74/X68/X65/X20/X70/X61/X63/X6B/X61/X67/X65/X2E /X32/X2E/X20/X54/X68/X65/X20/X74/X68/X69/X63/X6B/X6E/X65/X73/X73/X20/X6F/X66/X20/X74/X68/X65/X20/X73/X6F/X6C/X64/X65/X72/X20/X72/X65/X73/X69/X73/X74/X20/X6F/X6E/X20/X74/X68/X65/X20/X77/X69/X72/X65/X20/X70/X61/X74/X74/X65/X72/X6E/X20/X75/X6E/X64/X65/X72/X20/X74/X68/X65/X20/X70/X61/X63/X6B/X61/X67/X65/X20/X73/X68/X6F/X75/X6C/X64/X20/X62/X65/X20/X30/X2E/X30/X33/X20/X6D/X6D /X6F/X72/X20/X6C/X65/X73/X73/X20/X66/X72/X6F/X6D/X20/X74/X68/X65/X20/X6C/X61/X6E/X64/X20/X70/X61/X74/X74/X65/X72/X6E/X20/X73/X75/X72/X66/X61/X63/X65/X2E /X33/X2E/X20/X4D/X61/X74/X63/X68/X20/X74/X68/X65/X20/X6D/X61/X73/X6B/X20/X61/X70/X65/X72/X74/X75/X72/X65/X20/X73/X69/X7A/X65/X20/X61/X6E/X64/X20/X61/X70/X65/X72/X74/X75/X72/X65/X20/X70/X6F/X73/X69/X74/X69/X6F/X6E/X20/X77/X69/X74/X68/X20/X74/X68/X65/X20/X6C/X61/X6E/X64/X20/X70/X61/X74/X74/X65/X72/X6E/X2E /X34/X2E/X20/X52/X65/X66/X65/X72/X20/X74/X6F/X20/X22/X53/X4E/X54/X20/X50/X61/X63/X6B/X61/X67/X65/X20/X55/X73/X65/X72/X27/X73/X20/X47/X75/X69/X64/X65/X22/X20/X66/X6F/X72/X20/X64/X65/X74/X61/X69/X6C/X73/X2E /X31/X2E/X20 /X28/X30/X2E/X32/X35/X20/X6D/X6D/X20/X6D/X69/X6E/X2E/X20/X2F/X20/X30/X2E/X33/X30/X20/X6D/X6D/X20/X74/X79/X70/X2E/X29 /X32/X2E/X20 /X20/X28/X31/X2E/X31/X30/X20/X6D/X6D/X20/X7E/X20/X31/X2E/X32/X30/X20/X6D/X6D/X29 /X31 /X32 /X30/X2E/X30/X33/X20/X6D/X6D /X31/X2E/X20/X50/X61/X79/X20/X61/X74/X74/X65/X6E/X74/X69/X6F/X6E/X20/X74/X6F/X20/X74/X68/X65/X20/X6C/X61/X6E/X64/X20/X70/X61/X74/X74/X65/X72/X6E/X20/X77/X69/X64/X74/X68/X20/X28/X30/X2E/X32/X35/X20/X6D/X6D/X20/X6D/X69/X6E/X2E/X20/X2F/X20/X30/X2E/X33/X30/X20/X6D/X6D/X20/X74/X79/X70/X2E/X29/X2E /X32/X2E/X20/X44/X6F/X20/X6E/X6F/X74/X20/X77/X69/X64/X65/X6E/X20/X74/X68/X65/X20/X6C/X61/X6E/X64/X20/X70/X61/X74/X74/X65/X72/X6E/X20/X74/X6F/X20/X74/X68/X65/X20/X63/X65/X6E/X74/X65/X72/X20/X6F/X66/X20/X74/X68/X65/X20/X70/X61/X63/X6B/X61/X67/X65/X20/X28/X31/X2E/X31/X30/X20/X6D/X6D/X20/X74/X6F/X20/X31/X2E/X32/X30/X20/X6D/X6D/X29/X2E /X31/X2E /X32/X2E/X20 /X28/X31/X2E/X31/X30/X20/X6D/X6D/X20/X7E/X20/X31/X2E/X32/X30/X20/X6D/X6D/X29 /X28/X30/X2E/X32/X35/X20/X6D/X6D/X20/X6D/X69/X6E/X2E/X20/X2F/X20/X30/X2E/X33/X30/X20/X6D/X6D/X20/X74/X79/X70/X2E/X29

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