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S-19110AxxA to S-19110HxxA Series www.sii-ic.com FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR © SII Semiconductor Corporation, 2014-2016 Rev.1.3_00 The S-19110 Series is a high-accuracy voltage detector dev eloped using CMOS technology. The detection voltage and release voltage are fixed internally with an accuracy of ±2.0%. It operates with current consumption of 600 nA typ. Apart from the power supply pin, the detection voltage input pin (SENSE pin) is also prepared in the SENSE detection product, so the output is stable even if the SENSE pin falls to 0 V. The detection signal and release signal can be delayed by setting a capacitor externally, and the detection delay time accuracy is ±20% (C N = 3.3 nF, Ta = −40°C to +125°C), the release delay time accuracy is ±20% (CP = 3.3 nF, Ta = −40°C to +125°C). The output form is Nch open-drain output. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to SII Semiconductor Corporation is indispensable. Features
- Detection voltage: 5.0 V to 10.0 V (0.05 V step)
- Detection voltage accuracy: ±2.0% (Ta = −40°C to +125°C)
- Detection delay time accuracy: ±20% (CN = 3.3 nF, Ta = −40°C to +125°C)
- Release voltage: 5.25 V to 13.0 V (0.05 V step)
- Release voltage accuracy: ±2.0% (Ta = −40°C to +125°C, 5.0% ≤ VHYS ≤ 20.0%)
- Release delay time accuracy: ±20% (CP = 3.3 nF, Ta = −40°C to +125°C)
- Current consumption: 600 nA typ.
- Operation voltage range: 1.8 V to 36.0 V
- Hysteresis width*1: "Available" / "unavailable" is selectable.
- Output form: Nch open-drain output
- Operation temperature range: Ta = −40°C to +125°C
- Lead-free (Sn 100%), halogen-free
- AEC-Q100 qualified*2 *1. When "available" is selected, the hysteresis width can be set in the range of 5.0% to 30.0%. *2. Contact our sales office for details. Applications
- Power supply monitor for microcomputer and reset for CPU
- Automotive battery voltage detection
- For automotive use (engine, transmission, suspensi on, ABS, related-de vices for EV / HEV / PHEV, etc.) Package
- SOT-23-6
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 AEC-Q100 Qualified This IC supports AEC-Q100 for operation temperature grade 1. Contact our sales office for details of AEC-Q100 reliability specification. Product Name Structure Users can select the product type, detection voltage value and release voltage value for the S-19110 Series. Refer to " 1. Product name " regarding the contents of product name, " 2. Function list of product types " regarding the product types and "3. Package " regarding the package drawings. 1. Product name S-19110 x xx A - M6T1 U 4 Package abbreviation and IC packing specifications*1 M6T1 : SOT-23-6, Tape Detection voltage value, release voltage value*2 AA to ZZ (2-digit alphabetical option code) Environmental code U : Lead-free (Sn 100%), halogen-free Operation temperature A : Ta = −40°C to +125°C Product type*3 A to H *1. Refer to the tape drawing. *2. Contact our sales office for details on combination of detection voltage value and release voltage value. *3. Refer to "2. Function list of product types ".
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 Pin Configurations 1. S-19110 Series A / B / C / D type (VDD detection product) 1. 1 SOT-23-6 13 2 546 Top view Figure 7 Table 3 Pin No. Symbol Description
1 VDD Voltage input pin
2 NC*1 No connection
3 OUT Voltage detection output pin
4 CP*2 Connection pin for release delay capacitor
5 VSS GND pin
6 CN*3 Connection pin for detection delay capacitor
*1. The NC pin is electrically open. The NC pin can be connected to the VDD pin or the VSS pin. *2. Connect a capacitor between the CP pin and the VSS pin. The release delay time can be adjusted according to the capacitance. Moreover, the CP pin is available even when it is open. *3. Connect a capacitor between the CN pin and the VSS pin. The detection delay time can be adjusted according to the capacitance. Moreover, the CN pin is available even when it is open. 2. S-19110 Series E / F / G / H type (SENSE detection product) 2. 1 SOT-23-6 13 2 546 Top view Figure 8 Table 4 Pin No. Symbol Description
2 SENSE Detection voltage input pin
4 CP*1 Connection pin for release delay capacitor
6 CN*2 Connection pin for detection delay capacitor
*1. Connect a capacitor between the CP pin and the VSS pin. The release delay time can be adjusted according to the capacitance. Moreover, the CP pin is available even when it is open. *2. Connect a capacitor between the CN pin and the VSS pin. The detection delay time can be adjusted according to the capacitance. Moreover, the CN pin is available even when it is open.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series Absolute Maximum Ratings Table 5 (Ta = −40°C to +125°C unless otherwise specified) Item Symbol Absolute Maximum Rating Unit Power supply voltage VDD − VSS V SS − 0.3 to VSS + 45 V SENSE pin input voltage VSENSE V SS − 0.3 to VSS + 45 V CP pin input voltage VCP V SS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V CN pin input voltage VCN V SS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V Output voltage VOUT V SS − 0.3 to VSS + 45 V Output current IOUT 25 mA Operation ambient temperature Topr −40 to +125 °C Storage temperature Tstg −40 to +150 °C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefor e not be exceeded under any conditions. Thermal Resistance Value Table 6 Item Symbol Condition Min. Typ. Max. Unit Junction-to-ambient thermal resistance*1 θja SOT-23-6 Board 1 − 159 − ° C/W Board 2 − 124 − ° C/W *1. Test environment: compliance with JEDEC STANDARD JESD51-2A Remark Refer to " Thermal Characteristics" for details of power dissipation and test board.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 Electrical Characteristics 1. VDD detection product Table 7 (Ta = −40°C to +125°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Detection voltage*1 −VDET 5.0 V ≤ −VDET(S) ≤ 10.0 V −VDET(S) × 0.980 −VDET(S) −VDET(S) × 1.020 V 1 Release voltage*2 +VDET A / B type +VDET(S) × 0.980 +VDET(S) +VDET(S) × 1.020 V 1 A / B type 20.0% < V HYS ≤ 30.0%*3 +VDET(S) × 0.975 +VDET(S) +VDET(S) × 1.025 V 1 C / D type V HYS = 0%*4 −VDET(S) × 0.980 −VDET(S) −VDET(S) × 1.020 V 1 Current consumption I SS A / B / C / D type A / B type V Operation voltage V DD − 1.8 − 36.0 V 1 Output current I OUT Output transistor Nch V DS *5 = 0.05 V VDD = 4.5 V, active "L" 0.45 − − mA 3 VDD = 14.0 V, active "H" 0.45 − − mA 3 Leakage current I LEAK Output transistor Nch VDD = 30.0 V, VOUT = 30.0 V, active "L" − − 2.0 μ A3 VDD = 4.5 V, VOUT = 30.0 V, active "H" − − 2.0 μ A3 Detection delay time*6 tRESET C N = 3.3 nF 8.0 10.0 12.0 ms 4 Release delay time t DELAY A / B type*7 CP = 3.3 nF 8.0 10.0 12.0 ms 4 C / D type*8 CP = 3.3 nF 8.0 10.0 12.0 ms 4 CP pin discharge ON resistance R CP V DD = 14.0 V, VCP = 0.5 V 0.30 − 2.60 kΩ − CN pin discharge ON resistance R CN V DD = 4.5 V, VCN = 0.5 V 0.63 − 2.60 kΩ − *1. −VDET: Actual detection voltage value, −VDET(S): Set detection voltage value *2. +VDET: Actual release voltage value, +VDET(S): Set release voltage value *3. Although the hysteresis width can be set in the range of 5.0% to 30.0%, the release voltage accuracy differs when the setting range exceeds 20.0%. *4. The hysteresis width is "unavailable", so release voltage = detection voltage. *5. V DS: Drain-to-source voltage of the output transistor *6. The time period from when the pulse voltage of −VDET(S) + 1.0 V → −VDET(S) − 1.0 V is applied to the VDD pin to when VOUT reaches VDD / 2, after the power supply voltage (V DD) reaches the release voltage once. *7. The time period from when the pulse voltage of +VDET(S) − 1.0 V → +VDET(S) + 1.0 V is applied to the VDD pin to when VOUT reaches VDD / 2. *8. The time period from when the pulse voltage of −VDET(S) − 1.0 V → −VDET(S) + 1.0 V is applied to the VDD pin to when VOUT reaches VDD / 2.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 2. SENSE detection product Table 8 (Ta = −40°C to +125°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Detection voltage*1 −VDET VDD = 16.0 V, 5.0 V ≤ −VDET(S) ≤ 10.0 V −VDET(S) × 0.980 −VDET(S) −VDET(S) × 1.020 V 1 Release voltage*2 +VDET VDD = 16.0 V E / F type +VDET(S) × 0.980 +VDET(S) +VDET(S) × 1.020 V 1 E / F type 20.0% < V HYS ≤ 30.0%*3 +VDET(S) × 0.975 +VDET(S) +VDET(S) × 1.025 V 1 G / H type V HYS = 0%*4 −VDET(S) × 0.980 −VDET(S) −VDET(S) × 1.020 V 1 Current consumption*5 ISS E / F / G / H type VDD = 16.0 V, VSENSE = −VDET − 0.1 V, 5.0 V ≤ −VDET ≤ 10.0 V − 0.55 1.55 μA2 E / F type V DD = 16.0 V, VSENSE = +VDET + 0.1 V, 5.25 V ≤ +VDET ≤ 13.0 V − 0.55 1.55 μA2 Operation voltage V DD − 3.0 − 36.0 V 1 Output current I OUT Output transistor Nch V DS *6 = 0.05 V VDD = 5.0 V, VSENSE = 4.5 V, active "L" 0.45 − − mA 3 VDD = 5.0 V, VSENSE = 14.0 V, active "H" 0.45 − − mA 3 Leakage current I LEAK Output transistor Nch VDD = 30.0 V, VOUT = 30.0 V, VSENSE = 30.0 V, active "L" − − 2.0 μ A3 VDD = 30.0 V, VOUT = 30.0 V, VSENSE = 4.5 V, active "H" − − 2.0 μ A3 Detection delay time*7 tRESET C N = 3.3 nF 8.0 10.0 12.0 ms 4 Release delay time t DELAY E / F type*8 CP = 3.3 nF 8.0 10.0 12.0 ms 4 G / H type*9 CP = 3.3 nF 8.0 10.0 12.0 ms 4 SENSE pin resistance R SENSE − 26.0 − 400 MΩ 2 CP pin discharge ON resistance R CN pin discharge ON resistance R *1. −VDET: Actual detection voltage value, −VDET(S): Set detection voltage value *2. +VDET: Actual release voltage value, +VDET(S): Set release voltage value *3. Although the hysteresis width can be set in the range of 5.0% to 30.0%, the release voltage accuracy differs when the setting range exceeds 20.0%. *4. The hysteresis width is "unavailable", so release voltage = detection voltage. *5. The current flowing through the SENSE pin resistance is not included. *6. V DS: Drain-to-source voltage of the output transistor *7. The time period from when the pulse voltage of −VDET(S) + 1.0 V → −VDET(S) − 1.0 V is applied to the SENSE pin to when VOUT reaches VDD / 2, after voltage of 16.0 V is applied to the VDD pin and the SENSE pin input voltage (V SENSE) reaches the release voltage once. *8. The time period from when voltage of 16.0 V is applied to the VDD pin and the pulse voltage of +VDET(S) − 1.0 V → +VDET(S) + 1.0 V is applied to the SENSE pin to when V OUT reaches VDD / 2. *9. The time period from when voltage of 16.0 V is applied to the VDD pin and the pulse voltage of −VDET(S) − 1.0 V → −VDET(S) + 1.0 V is applied to the SENSE pin to when V OUT reaches VDD / 2.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 Explanation of Terms 1. Detection voltage ( −VDET) The detection voltage is a voltage at which the output in Figure 23 or Figure 24 turns to "H" for active "H", and "L" for active "L" (VDD detection product: V DD, SENSE detection product: V SENSE). The detection voltage varies slightly among products of the same specification. The variation of detection voltage between the specified minimum (−VDET min.) and the maximum ( −VDET max.) is called the detection voltage range (Refer to Figure 19, Figure 21). Example: In −VDET = 5.0 V product, the detection voltage is either one in the range of 4.900 V ≤ −VDET ≤ 5.100 V. This means that some −VDET = 5.0 V product have −VDET = 4.900 V and some have −VDET = 5.100 V. 2. Release voltage ( +VDET) The release voltage is a voltage at which the output in Figure 23 or Figure 24 turns to "L" for active "H", and "H" for active "L" (VDD detection product: V DD, SENSE detection product: VSENSE). The difference of detection voltage and release voltage can be set in the range of 5.0% to 30.0% (Refer to " Figure 5 Detection Voltage and Release Voltage Possible Setting Area ( −VDET ≤ 10.0 V)"). The release voltage varies slightly among products of the same specification. The variation of release voltage between the specified minimum ( +VDET min.) and the maximum (+ VDET max.) is called the release voltage range (Refer to Figure 20, Figure 22). Release voltage accuracy is ±2.0% when hysteresis width = 5.0% to 20.0%, and ±2.5% when hysteresis width = 20.0% to 30.0%. In the S-19110 Series C / D / G / H type, the release voltage ( +V DET) is the same value as the actual detection voltage (−VDET) of a product. Example 1: For −VDET = 6.0 V, +VDET = 6.6 V product (hysteresis width = 10.0%), the release voltage is either one in the range of 6.468 V ≤ +VDET ≤ 6.732 V. This means that some −VDET = 6.0 V, +VDET = 6.6 V product have +VDET = 6.468 V and some have +VDET = 6.732 V. Example 2: For −VDET = 10.0 V, +VDET = 13.0 V product (hysteresis width = 30.0%), the release voltage is either one in the range of 12.675 V ≤ +VDET ≤ 13.325 V. This means that some −VDET = 10.0 V, +VDET = 13.0 V product have +VDET = 12.675 V and some have +VDET = 13.325 V.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 2. SENSE pin 2. 1 Error when detection voltage is set externally The detection voltage for the S-19110 Series is 10.0 V max., however, in the SENSE detection product with −VDET = 10.0 V, the detection voltage can be set externally by connecting a node that was resistance-divided by the resistor (RA) and the resistor (R B) to the SENSE pin as shown in Figure 41. For conventional products without the SENSE pin, external resistor cannot be too large since the resistance-divided node must be connected to the VDD pin. This is because a feed-through current will flow through the VDD pin when it goes from detection to release, and if external resistor is large, problems such as oscillation or larger error in the hysteresis width may occur. In the S-19110 Series, R A and R B in Figure 41 are easily made larger since the resistance-divided node can be connected to the SENSE pin through which no feed-through current flows. However, be careful of error in the current flowing through the internal resistance (R SENSE) that will occur. Although RSENSE in the S-19110 Series is large (26 M Ω min.) to make the error small, R A and RB should be selected such that the error is within the allowable limits. 2. 2 Selection of R A and RB In Figure 41 , the relation between the external setting detection voltage (V DX) and the actual detection voltage (−VDET) is ideally calculated by the equation below. VDX = −VDET × ()1 + RA RB
- ·· (1) However, in reality there is an error in the current flowing through R SENSE. When considering this error, the relation between V DX and −VDET is calculated as follows. VDX = −VDET × ()1 + RA RB || RSENSE = −VDET × 1 + RA RB × RSENSE RB + RSENSE = −VDET × ()1 + RA RB + RA RSENSE By using equations (1) and (2), the error is calculated as −VDET × RA RSENSE The error rate is calculated as follows by dividing the error by the right-hand side of equation (1). RA × RB RSENSE × (RA + RB) × 100 [%] = RA || RB RSENSE × 100 [%] ··· (3) As seen in equation (3), the smaller the resistance values of R A and R B compared to R SENSE, the smaller the error rate becomes.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series Also, the relation between the external setting hysteresis width (V HX) and the hysteresis width (V HYS) is calculated by equation below. Error due to R SENSE also occurs to the relation in a similar way to the detection voltage. VHX = V HYS × ()1 + RA RB
- ·· (4) VSS OUT VDD SENSE RA RB VDX −VDET RSENSE A Figure 41 Detection Voltage External Setting Circuit Caution 1. When externally setting the det ection voltage, perform the operation with −VDET = 10.0 V product. Contact our sales office for details. 2. If the current flowing through R B is set to 1 μA or less, the error may become larger. 3. If the parasitic resistance and parasitic inductance between V DX − point A and point A − VDD pin are larger, oscillation may occur. Perform thorough evaluation using the actual application. 4. If R A and R B are large, the SENSE pin input impedance becomes higher and may cause a malfunction due to noise. In this case, connect a capacitor between the SENSE pin and the VSS pin.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 3. Delay circuit The delay circuit has a function that adjusts the detection delay time (t RESET) from when the power supply voltage (VDD) or SENSE pin voltage (V SENSE) reaches the detection voltage ( −VDET) or lower to when the output from OUT pin inverts. It also has a function that adjusts the release delay time (t DELAY) from when the power supply voltage (V DD) or SENSE pin voltage (VSENSE) reaches the release voltage ( +VDET) to when the output from OUT pin inverts. tRESET is determined by the delay coefficient, the delay capacitor (C N) and the detection delay time when the CN pin is open (t RESET0), and the t DELAY is determined by the delay coefficient, the delay capacitor (C P) and the release delay time when the CP pin is open (t DELAY0). They are calculated by the equation below. tRESET [ms] = Delay coefficient × CN [nF] + tRESET0 [ms] tDELAY [ms] = Delay coefficient × CP [nF] + tDELAY0 [ms] Table 9 Operation Temperature Delay Coefficient Min. Typ. Max. Ta = +125°C 2.41 2.85 3.32 Ta = +105°C 2.41 2.85 3.32 Ta = +25°C 2.41 2.86 3.30 Ta = −40°C 2.40 2.83 3.25 Table 10 Operation Temperature Detection Delay Time when CN Pin is Open (tRESET0) Release Delay Time when CP Pin is Open (tDELAY0) Typ. Typ. Ta = −40°C to +125°C 0.35 ms 0.35 ms Caution 1. Mounted board layout should be made in such a way that no current flows into or flows from the CN pin or CP pin since the impedance of the CN pin and CP pin are high, otherwise correct delay time cannot be provided. 2. There is no limit for the capacitance of C N and C P as long as the leakage current of the capacitor can be ignored against the built-in constant current value (approximately 300 nA). The leakage current may cause error in delay time. When the leakage current is larger than the built-in constant current, no detect or release takes place. 3. The above equation will not guarantee succe ssful operation. Determine the capacitance of C N and CP through thorough evaluation including temperature characteristics in the actual usage conditions. When using an X8R equivalent capacitor, refer to the "2. Detection delay time (t RESET) vs. Temperature (Ta)", "3. Detection delay time (t RESET) vs. Power supply voltage (V DD)", "5. Release delay time (t DELAY) vs. Temperature (Ta)" and "6. Release delay time (t DELAY) vs. Power supply voltage (V DD)" in " Reference Data" for details.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 6. V DD drop during release delay time (reference) Figure 56 and Figure 57 show the relation between pulse width (t PW) and V DD lower limit (V DROP) where a release signal can be output after the normal release delay time has elapsed when the VDD pin (VDD detection product) instantaneously drops to the detection voltage ( −VDET) or lower and then increases to the release voltage ( +VDET) or higher during release delay time. Ta = −40°C to +125°C, CP = CN = 3.3 nF, Ta = −40°C to +125°C, CP = CN = 3.3 nF, −VDET(S) = 5.0 V, +VDET(S) = 5.25 V −VDET(S) = 10.0 V, +VDET(S) = 10.5 V 0.0 tPW [s] VDROP [V] 10000 1000 2.00.5 1.51.0
100 Inhibited Area
0.0 tPW [s] VDROP [V] 10000 1000 2.00.5 1.51.0 VDET(S) VDROP 16 V VOUT tF*1 tR*1 tPW tDELAYtDELAY 0.8 *1. t R = tF = 10 μs Figure 58 VDD Pin Input Voltage Waveform Caution 1. Figure 56 and Figure 57 show the input voltage conditions when a release signal is output after the normal release delay time has elapsed. When this is within the inhibited area, release may erroneously be executed before the delay time completes. 2. When the VDD pin voltage is within the inhibited areas shown in Figure 56 and Figure 57 during release delay time, input 0 V to the VDD pin then restart the S-19110 Series.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series Precautions
- Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.
- Because the SENSE pin has a high impedance, malfunctions may occur due to noise. Be careful of wiring adjoining SENSE pin wiring in actual applications.
- When designing for mass production using an applicati on circuit described herein, the product deviation and temperature characteristics of the external parts should be taken into consideration. SII Semiconductor Corporation shall not bear any responsibility for patent infringements related to products using the circuits described herein.
- SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 Characteristics (Typical Data) 1. Detection voltage ( −VDET), Release voltage (+VDET) vs. Temperature (Ta) 1. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V 4.90 5.40 5.30 Ta [C] VDET, VDET [V] 5.20 5.10 5.00 40 25 0 25 50 75 100 125 VDET VDET −VDET(S) = 7.5 V, +VDET(S) = 8.5 V 7.00 9.00 Ta [C] VDET, VDET [V]8.50 8.00 7.50 40 25 0 25 50 75 100 125 VDET VDET −VDET(S) = 10.0 V, +VDET(S) = 13.0 V Ta [C] 40 25 0 25 50 75 100 125 9.00 14.00 13.00 12.00 11.00 10.00 VDET, VDET [V] VDET VDET 1. 2 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = 16.0 V 4.90 5.40 5.30 Ta [C] VDET, VDET [V] 5.20 5.10 5.00 40 25 0 25 50 75 100 125 VDET VDET −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 16.0 V 7.00 9.00 Ta [C] VDET, VDET [V]8.50 8.00 7.50 40 25 0 25 50 75 100 125 VDET VDET −VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = 16.0 V Ta [C] 40 25 0 25 50 75 100 125 9.00 14.00 13.00 12.00 11.00 10.00 VDET, VDET [V] VDET VDET
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 2. Detection voltage ( −VDET), Release voltage (+VDET) vs. Power supply voltage (V DD) 2. 1 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V 5.40 4.90 0.0 36.0 VDD [V] 5.30 5.20 5.10 5.00 VDET, VDET [V] VDET VDET Ta = 105C Ta = 125CTa = 25C Ta = 40C −VDET(S) = 7.5 V, +VDET(S) = 8.5 V 9.00 7.00 0.0 36.0 VDD [V] VDET, VDET [V]8.50 8.00 7.50 VDET VDET Ta = 105C Ta = 125CTa = 25C Ta = 40C −VDET(S) = 10.0 V, +VDET(S) = 13.0 V 14.00 13.00 9.00 0.0 36.0 VDD [V] VDET, VDET [V] 12.00 11.00 10.00 VDET VDET Ta = 105C Ta = 125CTa = 25C Ta = 40C 3. Current consumption (I SS) vs. Power supply voltage (V DD) 3. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = 0 V → 36.0 V 0.0 0.00 36.0 ISS [μA] VDD [V] 1.50 1.00 0.50 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 0 V → 36.0 V 0.0 0.00 36.0 ISS [μA] VDD [V] 1.50 1.00 0.50 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C −VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = 0 V → 36.0 V 0.0 0.00 36.0 ISS [μA] VDD [V] 1.50 1.00 0.50 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 3. 2 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = 0 V → 36.0 V, V SENSE = −VDET − 0.1 V (during detection) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = 0 V → 36.0 V, V SENSE = +VDET + 0.1 V (during release) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 0 V → 36.0 V, V SENSE = −VDET − 0.1 V (during detection) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 0 V → 36.0 V, V SENSE = +VDET + 0.1 V (during release) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C −VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = 0 V → 36.0 V, V SENSE = −VDET − 0.1 V (during detection) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C −VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = 0 V → 36.0 V, V SENSE = +VDET + 0.1 V (during release) 0.0 0.00 36.0 ISS [A] VDD [V] 1.50 1.00 0.50 Ta = 40C Ta = 25C Ta = 105C Ta = 125C
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 4. Current consumption (I SS) vs. Temperature (Ta) 4. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00 0.50ISS [A] −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00
0.50 ISS [A]
−VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00
- 2 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, V DD = 16.0 V, VSENSE = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00 0.50ISS [A] −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 16.0 V, VSENSE = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00
−VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DD = 16.0 V, VSENSE = +VDET + 0.1 V Ta [C] 40 25 0 25 50 75 100 125 0.00 1.50 1.00
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 5. Current consumption during detection delay (I SS) vs. Temperature (Ta) 5. 1 VDD detection product 5. 2 SENSE detection product −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V CN = 0.2 V Ta [°C] 40 25 0 25 50 75 100 125 0.00 3.00 2.00 1.00ISS [μA] −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 16.0 V, VCN = 0.2 V Ta [°C] 40 25 0 25 50 75 100 125 0.00 3.00 2.00
1.00 ISS [μA]
- Current consumption during release delay (I SS) vs. Temperature (Ta) 6. 1 VDD detection product 6. 2 SENSE detection product −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V CP = 0.2 V Ta [°C] 40 25 0 25 50 75 100 125 0.00 3.00 2.00
−VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V DD = 16.0 V, VCP = 0.2 V Ta [°C] 40 25 0 25 50 75 100 125 0.00 3.00 2.00
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 7. Nch transistor output current (I OUT) vs. VDS 7. 1 SENSE detection product −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V SENSE = 4.5 V, Ta = −40°C 30.0 0.0 0.0 0.6 IOUT [mA] VDS [V] 20.0 10.0 VDD = 36.0 V VDD = 16.0 V VDD = 3.0 V −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V SENSE = 4.5 V, Ta = +25°C 30.0 0.0 0.0 0.6 IOUT [mA] VDS [V] 20.0 10.0 VDD = 36.0 V VDD = 16.0 V VDD = 3.0 V −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V SENSE = 4.5 V, Ta = +105°C 30.0 0.0 0.0 0.6 IOUT [mA] VDS [V] 20.0 10.0 VDD = 36.0 V VDD = 16.0 V VDD = 3.0 V −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V SENSE = 4.5 V, Ta = +125°C 30.0 0.0 0.0 0.6 IOUT [mA] VDS [V] 20.0 10.0 VDD = 36.0 V VDD = 16.0 V VDD = 3.0 V 8. Nch transistor output current (I OUT) vs. Power supply voltage (V DD) 8. 1 VDD detection product 8. 2 SENSE detection product −VDET(S) = 10.0 V, +VDET(S) = 13.0 V, V DS = 0.05 V 0.0 0.0 15.0 IOUT [mA] VDD [V] 2.0 1.5 1.0 0.5 10.05.0 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C −VDET(S) = 7.5 V, +VDET(S) = 8.5 V, V SENSE = 4.5 V, VDS = 0.05 V 0.0 0.0 36.0 IOUT [mA] VDD [V] 2.5 2.0 1.5 1.0 0.5 Ta = −40°C Ta = +25°C Ta = +125°C Ta = +105°C Remark V DS: Drain-to-source voltage of the output transistor
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 9. Minimum operation voltage (V OUT) vs. Power supply voltage (V DD) 9. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Pull-up to V DD, Pull-up resistance: 100 k Ω 0.0 0.0 5.5 VOUT [V] VDD [V] 6.0 5.0 4.0 3.0 2.0 1.0 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Pull-up to 16.0 V, Pull-up resistance: 100 k Ω 0.0 0.0 5.5 VOUT [V] VDD [V] 20.0 15.0 10.0 5.0 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C 9. 2 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, VDD = 3.0 V, Pull-up to V DD, Pull-up resistance: 100 k Ω 0.0 0.0 5.5 VOUT [V] VSENSE [V] 6.0 5.0 4.0 3.0 2.0 1.0 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, VDD = 3.0 V, Pull-up to 16.0 V, Pull-up resistance: 100 k Ω 0.0 0.0 5.5 VOUT [V] VSENSE [V] 20.0 15.0 10.0 5.0 Ta = −40°C Ta = +25°C Ta = +105°C Ta = +125°C
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 10. Dynamic response vs. Output pin capacitance (COUT) (CP pin, CN pin; open) 10. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Ta = −40°C 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.1 0.01 0.10.0001 0.010.001 tPLH tPHL −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Ta = +25°C 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.1 0.01 0.10.0001 0.010.001 tPLH tPHL −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Ta = +105°C 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.1 0.01 0.10.0001 0.010.001 tPLH tPHL −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, Ta = +125°C 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.1 0.01 0.10.0001 0.010.001 tPLH tPHL tPLH 1 s1 s VIH*1 Input voltage Output voltage VIL*2 VDD1 VDD1 50% VDD1 50% tPHL VDD VSS OUT CP CN VDD R 100 kΩ V V VDD1 *1. V IH = 36.0 V *2. VIL = 3.0 V Figure 59 Test Condition of Response Time Figure 60 Test Circuit of Response Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 Reference Data 1. Detection delay time (t RESET) vs. CN pin capacitance (CN) (Without output pin capacitance) 1. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V 0.01 1000 0.1 1000 100 0.1 1 10 100 tRESET [ms] CN [nF] Ta = −40°C Ta = +105°C Ta = +25°C Ta = +125°C 2. Detection delay time (t RESET) vs. Temperature (Ta) 2. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, C N = 3.3 nF Ta [°C] 40 25 0 25 50 75 100 125 0.0 12.0 10.0 8.0 6.0 4.0 2.0 tRESET [ms] VIH*1 Input voltage Output voltage VIL*2 VDD VSS VDD 50% tRESET 1 s VDD VSS OUT CP CN VDD R 100 kΩ V V CN *1. V IH = −VDET(S) + 1.0 V *2. VIL = −VDET(S) − 1.0 V Figure 61 Test Condition of Detection Delay Time Figure 62 Test Circuit of Detection Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 3. Detection delay time (t RESET) vs. Power supply voltage (VDD) 3. 1 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, C N = 3.3 nF 12.0 8.0 0.0 36.0 VDD [V] tRESET [ms] 11.0 10.0
9.0 Ta = +105°C
Ta = +125°CTa = +25°C Ta = −40°C VIH*1 VIL*2 VDD VSS VDD 50% tRESET 1 s Input voltage Output voltage VDD VSS OUT CP CN VSENSE R 100 kΩ V VDD V + SENSE CN *1. V IH = −VDET(S) + 1.0 V *2. VIL = −VDET(S) − 1.0 V Figure 63 Test Condition of Detection Delay Time Figure 64 Test Circuit of Detection Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR S-19110AxxA to S-19110HxxA Series Rev.1.3_00 4. Release delay time (t DELAY) vs. CP pin capacitance (CP) (Without output pin capacitance) 4. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V 0.01 1000 0.1 1000 100 0.1 1 10 100 tDELAY [ms] CP [nF] Ta = 40C Ta = 105C Ta = 25C Ta = 125C 5. Release delay time (t DELAY) vs. Temperature (Ta) 5. 1 VDD detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, C P = 3.3 nF Ta [°C] 40 25 0 25 50 75 100 125 0.0 12.0 10.0 8.0 6.0 4.0 2.0 tDELAY [ms] 1 s tDELAY VIH*1 Input voltage Output voltage VIL*2 VDD VSS VDD 50% VDD VSS OUT CP CN VDD R 100 kΩ V V CP *1. V IH = +VDET(S) + 1.0 V *2. VIL = +VDET(S) − 1.0 V Figure 65 Test Condition of Release Delay Time Figure 66 Test Circuit of Release Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.
FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR Rev.1.3_00 S-19110AxxA to S-19110HxxA Series 6. Release delay time (t DELAY) vs. Power supply voltage (V DD) 6. 1 SENSE detection product −VDET(S) = 5.0 V, +VDET(S) = 5.25 V, C P = 3.3 nF 12.0 8.0 0.0 36.0 VDD [V] tDELAY [ms] 11.0 10.0 9.0 Ta = +105°C Ta = +25°C Ta = −40°C Ta = +125°C 1 s tDELAY VIH*1 VIL*2 VDD VSS VDD 50% Input voltage Output voltage VDD VSS OUT CP CN VSENSE R 100 kΩ V CP VDD V + SENSE *1. V IH = +VDET(S) + 1.0 V *2. VIL = +VDET(S) − 1.0 V Figure 67 Test Condition of Release Delay Time Figure 68 Test Circuit of Release Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.
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