S1003

Seiko Instruments Inc

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)

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www.sii-ic.com MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR © Seiko Instruments Inc., 2013 Rev.1.0_00 Seiko Instruments Inc. 1 The S-1003 Series is a high-accuracy voltage detector developed using CMOS technology. The detection voltage is fixed internally with an accuracy of ±1.0% (−VDET ≥ 2.2 V). It operates with current consumption of 500 nA typ. The release signal can be delayed by setting a capacitor externally. Delay time accuracy is ±15%. Moreover, since the S-1003 Series includes the manual rese t function, the reset signal can be also output forcibly. Two output forms Nch open-drain output and CMOS output are available. Features

Detection voltage: 1.2 V to 5.0 V (0.1 V step)
Detection voltage accuracy: ±1.0% (2.2 V ≤ −VDET ≤ 5.0 V) ±22 mV (1.2 V ≤ −VDET < 2.2 V)
Current consumption: 500 nA typ.
Operation voltage range: 0.95 V to 10.0 V
Hysteresis width: 5% ± 2%
Manual reset function: MR pin logic active "L", active "H"
Delay time accuracy: ±15% (CD = 4.7 nF)
Output form: Nch open-drain output (Active "L") CMOS output (Active "L")
Operation temperature range: Ta = −40°C to +85°C
Lead-free (Sn 100%), halogen-free Applications
Power supply monitor for microcomputer and reset for CPU
Constant voltage power supply monitor for TV, Blu-ray recorder and home appliance
Power supply monitor for portable devices such as notebook PC, digital still camera and mobile phone Packages
SOT-23-5
SNT-6A

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 4 Product Name Structure Users can select the output form, MR pi n logic, detection voltage value, and pac kage type for the S-1003 Series. Refer to "1. Product name " regarding the contents of product name, " 2. Product type list" regarding the product types, "3. Packages" regarding the package drawings and " 4. Product name list " regarding details of product name. 1. Product name S-1003 x x xx I - xxxx U Package abbreviation and IC packing specifications*1 M5T1: SOT-23-5, Tape I6T1: SNT-6A, Tape Detection voltage value 12 to 50 (e.g., when the detection voltage is 1.2 V, it is expressed as 12.) Environmental code U: Lead-free (Sn 100%), halogen-free Operation temperature I: Ta = −40°C to +85°C Output form*2 N: Nch open-drain output (Active "L")*3 C: CMOS output (Active "L") *3 MR pin logic*2 A: Active "L" B: Active "H" *1. Refer to the tape drawing. *2. Refer to "2. Product type list ". *3. If you request the product with output logic active "H", contact our sales office. 2. Product type list Table 1 Product Type Output Form MR Pin Logic Output Logic NA Active "L" Active "L" NB Nch open-drain output Active "H" Active "L" CA Active "L" Active "L" CB CMOS output Active "H" Active "L" 3. Packages Table 2 Package Drawing Codes Package Name Dimension Tape Reel Land SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD − SNT-6A PG006-A-P-SD PG006-A-C- SD PG006-A-R-SD PG006-A-L-SD

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 5 4. Product name list 4. 1 S-1003 Series NA type Output form: Nch open-drain output (Active "L") MR pin logic: Active "L" Table 3 Detection Voltage SOT-23-5 SNT-6A

1.2 V ± 22 mV S-1003NA12I-M5T1U S-1003NA12I-I6T1U

1.3 V ± 22 mV S-1003NA13I-M5T1U S-1003NA13I-I6T1U

1.4 V ± 22 mV S-1003NA14I-M5T1U S-1003NA14I-I6T1U

1.5 V ± 22 mV S-1003NA15I-M5T1U S-1003NA15I-I6T1U

1.6 V ± 22 mV S-1003NA16I-M5T1U S-1003NA16I-I6T1U

1.7 V ± 22 mV S-1003NA17I-M5T1U S-1003NA17I-I6T1U

1.8 V ± 22 mV S-1003NA18I-M5T1U S-1003NA18I-I6T1U

1.9 V ± 22 mV S-1003NA19I-M5T1U S-1003NA19I-I6T1U

2.0 V ± 22 mV S-1003NA20I-M5T1U S-1003NA20I-I6T1U

2.1 V ± 22 mV S-1003NA21I-M5T1U S-1003NA21I-I6T1U

2.2 V ± 1.0% S-1003NA22I-M5T1U S-1003NA22I-I6T1U 2.3 V ± 1.0% S-1003NA23I-M5T1U S-1003NA23I-I6T1U 2.4 V ± 1.0% S-1003NA24I-M5T1U S-1003NA24I-I6T1U 2.5 V ± 1.0% S-1003NA25I-M5T1U S-1003NA25I-I6T1U 2.6 V ± 1.0% S-1003NA26I-M5T1U S-1003NA26I-I6T1U 2.7 V ± 1.0% S-1003NA27I-M5T1U S-1003NA27I-I6T1U 2.8 V ± 1.0% S-1003NA28I-M5T1U S-1003NA28I-I6T1U 2.9 V ± 1.0% S-1003NA29I-M5T1U S-1003NA29I-I6T1U 3.0 V ± 1.0% S-1003NA30I-M5T1U S-1003NA30I-I6T1U 3.1 V ± 1.0% S-1003NA31I-M5T1U S-1003NA31I-I6T1U 3.2 V ± 1.0% S-1003NA32I-M5T1U S-1003NA32I-I6T1U 3.3 V ± 1.0% S-1003NA33I-M5T1U S-1003NA33I-I6T1U 3.4 V ± 1.0% S-1003NA34I-M5T1U S-1003NA34I-I6T1U 3.5 V ± 1.0% S-1003NA35I-M5T1U S-1003NA35I-I6T1U 3.6 V ± 1.0% S-1003NA36I-M5T1U S-1003NA36I-I6T1U 3.7 V ± 1.0% S-1003NA37I-M5T1U S-1003NA37I-I6T1U 3.8 V ± 1.0% S-1003NA38I-M5T1U S-1003NA38I-I6T1U 3.9 V ± 1.0% S-1003NA39I-M5T1U S-1003NA39I-I6T1U 4.0 V ± 1.0% S-1003NA40I-M5T1U S-1003NA40I-I6T1U 4.1 V ± 1.0% S-1003NA41I-M5T1U S-1003NA41I-I6T1U 4.2 V ± 1.0% S-1003NA42I-M5T1U S-1003NA42I-I6T1U 4.3 V ± 1.0% S-1003NA43I-M5T1U S-1003NA43I-I6T1U 4.4 V ± 1.0% S-1003NA44I-M5T1U S-1003NA44I-I6T1U 4.5 V ± 1.0% S-1003NA45I-M5T1U S-1003NA45I-I6T1U 4.6 V ± 1.0% S-1003NA46I-M5T1U S-1003NA46I-I6T1U 4.7 V ± 1.0% S-1003NA47I-M5T1U S-1003NA47I-I6T1U 4.8 V ± 1.0% S-1003NA48I-M5T1U S-1003NA48I-I6T1U 4.9 V ± 1.0% S-1003NA49I-M5T1U S-1003NA49I-I6T1U 5.0 V ± 1.0% S-1003NA50I-M5T1U S-1003NA50I-I6T1U

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 6 4. 2 S-1003 Series NB type Output form: Nch open-drain output (Active "L") MR pin logic: Active "H" Table 4 Detection Voltage SOT-23-5 SNT-6A

1.2 V ± 22 mV S-1003NB12I-M5T1U S-1003NB12I-I6T1U

1.3 V ± 22 mV S-1003NB13I-M5T1U S-1003NB13I-I6T1U

1.4 V ± 22 mV S-1003NB14I-M5T1U S-1003NB14I-I6T1U

1.5 V ± 22 mV S-1003NB15I-M5T1U S-1003NB15I-I6T1U

1.6 V ± 22 mV S-1003NB16I-M5T1U S-1003NB16I-I6T1U

1.7 V ± 22 mV S-1003NB17I-M5T1U S-1003NB17I-I6T1U

1.8 V ± 22 mV S-1003NB18I-M5T1U S-1003NB18I-I6T1U

1.9 V ± 22 mV S-1003NB19I-M5T1U S-1003NB19I-I6T1U

2.0 V ± 22 mV S-1003NB20I-M5T1U S-1003NB20I-I6T1U

2.1 V ± 22 mV S-1003NB21I-M5T1U S-1003NB21I-I6T1U

2.2 V ± 1.0% S-1003NB22I-M5T1U S-1003NB22I-I6T1U 2.3 V ± 1.0% S-1003NB23I-M5T1U S-1003NB23I-I6T1U 2.4 V ± 1.0% S-1003NB24I-M5T1U S-1003NB24I-I6T1U 2.5 V ± 1.0% S-1003NB25I-M5T1U S-1003NB25I-I6T1U 2.6 V ± 1.0% S-1003NB26I-M5T1U S-1003NB26I-I6T1U 2.7 V ± 1.0% S-1003NB27I-M5T1U S-1003NB27I-I6T1U 2.8 V ± 1.0% S-1003NB28I-M5T1U S-1003NB28I-I6T1U 2.9 V ± 1.0% S-1003NB29I-M5T1U S-1003NB29I-I6T1U 3.0 V ± 1.0% S-1003NB30I-M5T1U S-1003NB30I-I6T1U 3.1 V ± 1.0% S-1003NB31I-M5T1U S-1003NB31I-I6T1U 3.2 V ± 1.0% S-1003NB32I-M5T1U S-1003NB32I-I6T1U 3.3 V ± 1.0% S-1003NB33I-M5T1U S-1003NB33I-I6T1U 3.4 V ± 1.0% S-1003NB34I-M5T1U S-1003NB34I-I6T1U 3.5 V ± 1.0% S-1003NB35I-M5T1U S-1003NB35I-I6T1U 3.6 V ± 1.0% S-1003NB36I-M5T1U S-1003NB36I-I6T1U 3.7 V ± 1.0% S-1003NB37I-M5T1U S-1003NB37I-I6T1U 3.8 V ± 1.0% S-1003NB38I-M5T1U S-1003NB38I-I6T1U 3.9 V ± 1.0% S-1003NB39I-M5T1U S-1003NB39I-I6T1U 4.0 V ± 1.0% S-1003NB40I-M5T1U S-1003NB40I-I6T1U 4.1 V ± 1.0% S-1003NB41I-M5T1U S-1003NB41I-I6T1U 4.2 V ± 1.0% S-1003NB42I-M5T1U S-1003NB42I-I6T1U 4.3 V ± 1.0% S-1003NB43I-M5T1U S-1003NB43I-I6T1U 4.4 V ± 1.0% S-1003NB44I-M5T1U S-1003NB44I-I6T1U 4.5 V ± 1.0% S-1003NB45I-M5T1U S-1003NB45I-I6T1U 4.6 V ± 1.0% S-1003NB46I-M5T1U S-1003NB46I-I6T1U 4.7 V ± 1.0% S-1003NB47I-M5T1U S-1003NB47I-I6T1U 4.8 V ± 1.0% S-1003NB48I-M5T1U S-1003NB48I-I6T1U 4.9 V ± 1.0% S-1003NB49I-M5T1U S-1003NB49I-I6T1U 5.0 V ± 1.0% S-1003NB50I-M5T1U S-1003NB50I-I6T1U

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 7 4. 3 S-1003 Series CA type Output form: CMOS output (Active "L") MR pin logic: Active "L" Table 5 Detection Voltage SOT-23-5 SNT-6A

1.2 V ± 22 mV S-1003CA12I-M5T1U S-1003CA12I-I6T1U

1.3 V ± 22 mV S-1003CA13I-M5T1U S-1003CA13I-I6T1U

1.4 V ± 22 mV S-1003CA14I-M5T1U S-1003CA14I-I6T1U

1.5 V ± 22 mV S-1003CA15I-M5T1U S-1003CA15I-I6T1U

1.6 V ± 22 mV S-1003CA16I-M5T1U S-1003CA16I-I6T1U

1.7 V ± 22 mV S-1003CA17I-M5T1U S-1003CA17I-I6T1U

1.8 V ± 22 mV S-1003CA18I-M5T1U S-1003CA18I-I6T1U

1.9 V ± 22 mV S-1003CA19I-M5T1U S-1003CA19I-I6T1U

2.0 V ± 22 mV S-1003CA20I-M5T1U S-1003CA20I-I6T1U

2.1 V ± 22 mV S-1003CA21I-M5T1U S-1003CA21I-I6T1U

2.2 V ± 1.0% S-1003CA22I-M5T1U S-1003CA22I-I6T1U 2.3 V ± 1.0% S-1003CA23I-M5T1U S-1003CA23I-I6T1U 2.4 V ± 1.0% S-1003CA24I-M5T1U S-1003CA24I-I6T1U 2.5 V ± 1.0% S-1003CA25I-M5T1U S-1003CA25I-I6T1U 2.6 V ± 1.0% S-1003CA26I-M5T1U S-1003CA26I-I6T1U 2.7 V ± 1.0% S-1003CA27I-M5T1U S-1003CA27I-I6T1U 2.8 V ± 1.0% S-1003CA28I-M5T1U S-1003CA28I-I6T1U 2.9 V ± 1.0% S-1003CA29I-M5T1U S-1003CA29I-I6T1U 3.0 V ± 1.0% S-1003CA30I-M5T1U S-1003CA30I-I6T1U 3.1 V ± 1.0% S-1003CA31I-M5T1U S-1003CA31I-I6T1U 3.2 V ± 1.0% S-1003CA32I-M5T1U S-1003CA32I-I6T1U 3.3 V ± 1.0% S-1003CA33I-M5T1U S-1003CA33I-I6T1U 3.4 V ± 1.0% S-1003CA34I-M5T1U S-1003CA34I-I6T1U 3.5 V ± 1.0% S-1003CA35I-M5T1U S-1003CA35I-I6T1U 3.6 V ± 1.0% S-1003CA36I-M5T1U S-1003CA36I-I6T1U 3.7 V ± 1.0% S-1003CA37I-M5T1U S-1003CA37I-I6T1U 3.8 V ± 1.0% S-1003CA38I-M5T1U S-1003CA38I-I6T1U 3.9 V ± 1.0% S-1003CA39I-M5T1U S-1003CA39I-I6T1U 4.0 V ± 1.0% S-1003CA40I-M5T1U S-1003CA40I-I6T1U 4.1 V ± 1.0% S-1003CA41I-M5T1U S-1003CA41I-I6T1U 4.2 V ± 1.0% S-1003CA42I-M5T1U S-1003CA42I-I6T1U 4.3 V ± 1.0% S-1003CA43I-M5T1U S-1003CA43I-I6T1U 4.4 V ± 1.0% S-1003CA44I-M5T1U S-1003CA44I-I6T1U 4.5 V ± 1.0% S-1003CA45I-M5T1U S-1003CA45I-I6T1U 4.6 V ± 1.0% S-1003CA46I-M5T1U S-1003CA46I-I6T1U 4.7 V ± 1.0% S-1003CA47I-M5T1U S-1003CA47I-I6T1U 4.8 V ± 1.0% S-1003CA48I-M5T1U S-1003CA48I-I6T1U 4.9 V ± 1.0% S-1003CA49I-M5T1U S-1003CA49I-I6T1U 5.0 V ± 1.0% S-1003CA50I-M5T1U S-1003CA50I-I6T1U

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 8 4. 4 S-1003 Series CB type Output form: CMOS output (Active "L") MR pin logic: Active "H" Table 6 Detection Voltage SOT-23-5 SNT-6A

1.2 V ± 22 mV S-1003CB12I-M5T1U S-1003CB12I-I6T1U

1.3 V ± 22 mV S-1003CB13I-M5T1U S-1003CB13I-I6T1U

1.4 V ± 22 mV S-1003CB14I-M5T1U S-1003CB14I-I6T1U

1.5 V ± 22 mV S-1003CB15I-M5T1U S-1003CB15I-I6T1U

1.6 V ± 22 mV S-1003CB16I-M5T1U S-1003CB16I-I6T1U

1.7 V ± 22 mV S-1003CB17I-M5T1U S-1003CB17I-I6T1U

1.8 V ± 22 mV S-1003CB18I-M5T1U S-1003CB18I-I6T1U

1.9 V ± 22 mV S-1003CB19I-M5T1U S-1003CB19I-I6T1U

2.0 V ± 22 mV S-1003CB20I-M5T1U S-1003CB20I-I6T1U

2.1 V ± 22 mV S-1003CB21I-M5T1U S-1003CB21I-I6T1U

2.2 V ± 1.0% S-1003CB22I-M5T1U S-1003CB22I-I6T1U 2.3 V ± 1.0% S-1003CB23I-M5T1U S-1003CB23I-I6T1U 2.4 V ± 1.0% S-1003CB24I-M5T1U S-1003CB24I-I6T1U 2.5 V ± 1.0% S-1003CB25I-M5T1U S-1003CB25I-I6T1U 2.6 V ± 1.0% S-1003CB26I-M5T1U S-1003CB26I-I6T1U 2.7 V ± 1.0% S-1003CB27I-M5T1U S-1003CB27I-I6T1U 2.8 V ± 1.0% S-1003CB28I-M5T1U S-1003CB28I-I6T1U 2.9 V ± 1.0% S-1003CB29I-M5T1U S-1003CB29I-I6T1U 3.0 V ± 1.0% S-1003CB30I-M5T1U S-1003CB30I-I6T1U 3.1 V ± 1.0% S-1003CB31I-M5T1U S-1003CB31I-I6T1U 3.2 V ± 1.0% S-1003CB32I-M5T1U S-1003CB32I-I6T1U 3.3 V ± 1.0% S-1003CB33I-M5T1U S-1003CB33I-I6T1U 3.4 V ± 1.0% S-1003CB34I-M5T1U S-1003CB34I-I6T1U 3.5 V ± 1.0% S-1003CB35I-M5T1U S-1003CB35I-I6T1U 3.6 V ± 1.0% S-1003CB36I-M5T1U S-1003CB36I-I6T1U 3.7 V ± 1.0% S-1003CB37I-M5T1U S-1003CB37I-I6T1U 3.8 V ± 1.0% S-1003CB38I-M5T1U S-1003CB38I-I6T1U 3.9 V ± 1.0% S-1003CB39I-M5T1U S-1003CB39I-I6T1U 4.0 V ± 1.0% S-1003CB40I-M5T1U S-1003CB40I-I6T1U 4.1 V ± 1.0% S-1003CB41I-M5T1U S-1003CB41I-I6T1U 4.2 V ± 1.0% S-1003CB42I-M5T1U S-1003CB42I-I6T1U 4.3 V ± 1.0% S-1003CB43I-M5T1U S-1003CB43I-I6T1U 4.4 V ± 1.0% S-1003CB44I-M5T1U S-1003CB44I-I6T1U 4.5 V ± 1.0% S-1003CB45I-M5T1U S-1003CB45I-I6T1U 4.6 V ± 1.0% S-1003CB46I-M5T1U S-1003CB46I-I6T1U 4.7 V ± 1.0% S-1003CB47I-M5T1U S-1003CB47I-I6T1U 4.8 V ± 1.0% S-1003CB48I-M5T1U S-1003CB48I-I6T1U 4.9 V ± 1.0% S-1003CB49I-M5T1U S-1003CB49I-I6T1U 5.0 V ± 1.0% S-1003CB50I-M5T1U S-1003CB50I-I6T1U

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 9 Pin Configurations 1. SOT-23-5 Table 7 Pin No. Symbol Description

1 CD Connection pin for delay capacitor

2 VSS GND pin

3 MR Manual reset pin

4 OUT Voltage detection output pin

5 VDD Voltage input pin

SNT-6A Table 8 Pin No. Symbol Description

2 VDD Voltage input pin

3 OUT Voltage detection output pin

4 MR Manual reset pin

5 NC*1 No connection

6 VSS GND pin

*1. The NC pin is electrically open. The NC pin can be connected to the VDD pin or the VSS pin.

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 10 Absolute Maximum Ratings Table 9 (Ta = +25°C unless otherwise specified) Item Symbol Absolute Maximum Rating Unit Power supply voltage VDD − VSS 12.0 V CD pin input voltage VCD V SS − 0.3 to VDD + 0.3 V MR pin input voltage VMR V SS − 0.3 to VDD + 0.3 V Nch open-drain output product VSS − 0.3 to 12.0 V Output voltage CMOS output product VOUT VSS − 0.3 to VDD + 0.3 V Output current IOUT 50 mA SOT-23-5 600*1 mW Power dissipation SNT-6A PD 400*1 mW Operation ambient temperature Topr −40 to +85 °C Storage temperature Tstg −40 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefor e not be exceeded under any conditions. 0 50 100 150 Power Dissipation (PD) [mW] Ambient Temperature (Ta) [°C] 200 100 300 500 700 SOT-23-5 400 600 SNT-6A Figure 7 Power Dissipation of Package (When Mounted on Board)

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 11 Electrical Characteristics 1. Nch open-drain output product Table 10 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit 1.2 V ≤ −VDET < 2.2 V −VDET(S) − 0.022 −VDET(S) −VDET(S) + 0.022 V 1 Detection voltage*1 −VDET 2.2 V ≤ −VDET ≤ 5.0 V −VDET(S) × 0.99 −VDET(S) −VDET(S) × 1.01 V 1 Hysteresis width V HYS − −VDET × 0.03 −VDET × 0.05 −VDET × 0.07 V 1 Current consumption I SS V DD = −VDET(S) + 1.0 V − 0.50 0.90 μA 2 Operation voltage V DD − 0.95 − 10.0 V 1 VDD = 0.95 V 0.59 1.00 − mA 3 VDD = 1.2 V 0.73 1.33 − mA 3 VDD = 2.4 V 1.47 2.39 − mA 3 Output current I OUT Output transistor Nch VDS *2 = 0.5 V MR pin active VDD = 4.8 V 1.86 2.50 − mA 3 Leakage current I LEAK Output transistor Nch V DD = 10.0 V, VOUT = 10.0 V MR pin non-active − − 0.08 μA 3 Delay time*3 tD C D = 4.7 nF 8.5 10.0 11.5 ms 4 Detection voltage temperature coefficient Δ−VDET ΔTa • −VDET Ta = −40°C to +85°C − ±100 ±350 ppm/°C 1 NA type (MR pin logic active "L") VDD − 0.3 − − V 6 MR pin input voltage "H" V MRH NB type (MR pin logic active "H") 1.2 − − V 6 NA type (MR pin logic active "L") − − V DD − 1.2 V 6 MR pin input voltage "L" V MRL NB type (MR pin logic active "H") − − 0.3 V 6 MR pin input resistance R MR − 0.5 1.0 1.6 M Ω 6 *1. −VDET: Actual detection voltage value, −VDET(S): Set detection voltage value (the center value of the detection voltage range in Table 3 or Table 4.) *2. VDS: Drain-to-source voltage of the output transistor *3. The time period from when the pulse voltage of 0.95 V → −VDET(S) + 1.0 V is applied to the VDD pin to when V OUT reaches VDD × 0.9, after the output pin is pulled up to V DD by the resistance of 100 k Ω. *4. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation. Δ − VDET ΔTa []mV/°C *1 = −VDET(S) (typ.)[]V *2 × Δ − VDET ΔTa • −VDET []ppm/°C *3 ÷ 1000 *1. Temperature change of the detection voltage *2. Set detection voltage *3. Detection voltage temperature coefficient

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 12 2. CMOS output product Table 11 (Ta = +25°C unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit 1.2 V ≤ −VDET < 2.2 V −VDET(S) − 0.022 −VDET(S) −VDET(S) + 0.022 V 1 Detection voltage*1 −VDET 2.2 V ≤ −VDET ≤ 5.0 V −VDET(S) × 0.99 −VDET(S) −VDET(S) × 1.01 V 1 Hysteresis width V HYS − −VDET × 0.03 −VDET × 0.05 −VDET × 0.07 V 1 Current consumption I SS V DD = −VDET(S) + 1.0 V − 0.50 0.90 μA 2 Operation voltage V DD − 0.95 − 10.0 V 1 VDD = 0.95 V 0.59 1.00 − mA 3 VDD = 1.2 V 0.73 1.33 − mA 3 VDD = 2.4 V 1.47 2.39 − mA 3 Output transistor Nch VDS *2 = 0.5 V MR pin active VDD = 4.8 V 1.86 2.50 − mA 3 VDD = 4.8 V S-1003Cx12 to 43 1.62 2.60 − mA 5 Output current I OUT Output transistor Pch VDS *2 = 0.5 V VDD = 6.0 V 1.78 2.86 − mA 5 Delay time*3 tD C D = 4.7 nF 8.5 10.0 11.5 ms 4 Detection voltage temperature coefficient*4 Δ−VDET ΔTa • −VDET Ta = −40°C to +85°C − ±100 ±350 ppm/°C 1 CA type (MR pin logic active "L") VDD − 0.3 − − V 6 MR pin input voltage "H" V MRH CB type (MR pin logic active "H") 1.2 − − V 6 CA type (MR pin logic active "L") − − V DD − 1.2 V 6 MR pin input voltage "L" V MRL CB type (MR pin logic active "H") − − 0.3 V 6 MR pin input resistance R MR − 0.5 1.0 1.6 M Ω 6 *1. −VDET: Actual detection voltage value, −VDET(S): Set detection voltage value (the center value of the detection voltage range in Table 5 or Table 6.) *2. VDS: Drain-to-source voltage of the output transistor *3. The time period from when the pulse voltage of 0.95 V → −VDET(S) + 1.0 V is applied to the VDD pin to when V OUT reaches VDD × 0.9. *4. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation. Δ − VDET ΔTa []mV/°C *1 = −VDET(S) (typ.)[]V *2 × Δ − VDET ΔTa • −VDET []ppm/°C *3 ÷ 1000 *1. Temperature change of the detection voltage *2. Set detection voltage *3. Detection voltage temperature coefficient

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 19 2. 4 When connecting resistance (R A) between power supply voltage (V DD) and VDD pin When the MR pin voltage (V MR) is an intermediate voltage (especially V MRL < VMR < VMRH), the current consumption increases by 25 μA max. A voltage drop occurs since this current flows through R A. If the VDD pin voltage (V IN) becomes the detection voltage ( −VDET) or less for that reason, the OUT pin changes to the detection status, and the detection status or the release status are not controlled by V MR. The OUT pin may not be able to change to the release status unless VDD is raised (Refer to Figure 24). (1) When MR pin logic is active "L" In case of V IN > VMR, a current also flows through the MR pin input resistance (R MR). For example, when V IN = 10 V, VMR = 1 V, R MR = 0.5 M Ω (min.), a current of 18 μA flows from the VDD pin to the MR pin. Therefore, set RA so as to satisfy the following equation. RA ≤ (VDD − (−VDET)) / (25 μA + MR pin current) (2) When MR pin logic is active "H" Set RA so as to satisfy the following equation. RA ≤ (VDD − (−VDET)) / 25 μA OUT VDD VSS CD MR VDD VMR RA GND VIN (Nch open-drain output product) Figure 24

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 20 3. Delay circuit The delay circuit delays the output signal to the OUT pin from the time at which the power supply voltage (V DD) exceeds the release voltage ( +VDET) when V DD is turned on. The output signal is not delayed when V DD decreases to the detection voltage ( −VDET) or less (refer to "Figure 17 Operation 2 "). The delay time (t D) is determined by the time constant of the built-in constant current (approx. 100 nA) and the attached delay capacitor (C D), or the delay time (t D0) when the CD pin is open, and calculated from the following equation. When the CD value is sufficiently large, the t D0 value can be disregarded. tD [ms] = Delay coefficient × CD [nF] + tD0 [ms] Table 12 Delay Coefficient Delay Coefficient Operation Temperature Min. Typ. Max. Ta = +85°C 1.60 1.89 2.13 Ta = +25°C 1.78 2.05 2.30 Ta = −40°C 2.01 2.31 2.71 Table 13 Delay Time Delay Time (tD0) Operation Temperature Min. Typ. Max. Ta = −40°C to +85°C 0.021 ms 0.044 ms 0.147 ms Caution 1. When the CD pin is open, a double pulse shown in Figure 25 may appear at release. To avoid the double pulse, attach a 100 pF or larger capacitor to the CD pin. Do not apply voltage to the CD pin from the exterior. VOUT Time Figure 25 2. Mounted board layout should be made in such a way that no current flows into or flows from the CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot be provided. 3. There is no limit for the capacitance of C D as long as the leakage current of the capacitor can be ignored against the built-in constant current value. Leakage current causes deviation in delay time. When the leakage current is larger than the built-in constant current, no release takes place.

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 21 4. Other characteristics 4. 1 Temperature characteristics of detection voltage The shaded area in Figure 26 shows the temperature characteristics of detection voltage in the operation temperature range. −40 +25 +0.945 mV/°C −VDET [V] +85 Ta [°C] −0.945 mV/°C −VDET25 *1. −VDET25 is an actual detection voltage value at Ta = +25°C. Figure 26 Temperature Characteristics of Detection Voltage (Example for −VDET = 2.7 V) 4. 2 Temperature characteristics of release voltage The temperature change Δ + VDET ΔTa of the release voltage is calculated by using the temperature change Δ − VDET ΔTa of the detection voltage as follows: Δ + VDET ΔTa = +VDET −VDET Δ − VDET ΔTa The temperature change of the release voltage and the detection voltage has the same sign consequently. 4. 3 Temperature characteristics of hysteresis voltage The temperature change of the hysteresis voltage is expressed as Δ + VDET ΔTa − Δ − VDET ΔTa and is calculated as follows: Δ + VDET ΔTa − Δ − VDET ΔTa = VHYS −VDET Δ − VDET ΔTa

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 22 Standard Circuit VDD OUT VSS R*1 100 kΩ CD CD MR *1. R is unnecessary for CMOS output product. *2. The delay capacitor (CD) should be connected directly to the CD pin and the VSS pin. Figure 27 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 26 Characteristics (Typical Data) 1. Detection voltage (V DET) vs. Temperature (Ta) S-1003CA12 1.40 1.30 1.20 1.10 1.00 VDET [V] −40 85 75 50 25 0−25 Ta [°C] +VDET −VDET S-1003CA24 2.60 2.50 2.40 2.30 2.20 VDET [V] −40 85 75 50 25 0−25 Ta [°C] +VDET −VDET S-1003CA50 5.40 5.20 5.00 4.80 4.60 VDET [V] −40 85 75 50 25 0−25 Ta [°C] +VDET −VDET 2. Hysteresis width (V HYS) vs. Temperature (Ta) S-1003CA12 VHYS [%] −40 85 75 50 25 0−25 Ta [°C] S-1003CA24 VHYS [%] −40 85 75 50 25 0−25 Ta [°C] S-1003CA50 VHYS [%] −40 85 75 50 25 0−25 Ta [°C]

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 27 3. Current consumption (I SS) vs. Input voltage (VDD) S-1003CA12 Ta = +25°C 1.50 1.25 1.00 0.75 0.50 0.25 02468 1 0 ISS [μA] VDD [V] S-1003CA24 Ta = +25°C 1.50 1.25 1.00 0.75 0.50 0.25 02468 1 0 ISS [μA] VDD [V] S-1003CA50 Ta = +25°C 1.50 1.25 1.00 0.75 0.50 0.25 02468 1 0 ISS [μA] VDD [V] 4. Current consumption (ISS) vs. Temperature (Ta) S-1003NA12 V DD = −VDET(S) + 1.0 V 1.00 0.75 0.50 0.25 ISS [μA] −40 85 75 50 25 0−25 Ta [°C] S-1003NA24 V DD = −VDET(S) + 1.0 V 1.00 0.75 0.50 0.25 ISS [μA] −40 85 75 50 25 0−25 Ta [°C] S-1003NA50 V DD = −VDET(S) + 1.0 V 1.00 0.75 0.50 0.25 ISS [μA] −40 85 75 50 25 0−25 Ta [°C]

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 28 5. Nch transistor output current (I OUT) vs. VDS 6. Pch transistor output current (I OUT) vs. VDS S-1003NA12 Ta = +25°C, MR pin active 20.0 0 7.0 IOUT [mA] VDS [V] 17.5 15.0 12.5 10.0 7.5 5.0 2.5 VDD = 6.00 V VDD = 4.80 V VDD = 3.60 V VDD = 2.40 V VDD = 1.20 V VDD = 0.95 V S-1003CA12 Ta = +25°C 40.0 0 10.0 IOUT [mA] VDS [V] 30.0 20.0 10.0 2.0 4.0 6.0 8.0 VDD = 8.4 V VDD = 7.2 V VDD = 6.0 V VDD = 4.8 V VDD = 3.6 V VDD = 2.4 V 7. Nch transistor output current (I OUT) vs. Input voltage (VDD) 8. Pch transistor output current (I OUT) vs. Input voltage (VDD) S-1003NA12 V DS = 0.5 V, MR pin active 4.0 0 10.0 IOUT [mA] VDD [V] 3.0 2.0 1.0 2.0 4.0 6.0 8.0 Ta = −40°C Ta = +25°CTa = +85°C S-1003CA12 V DS = 0.5 V 5.0 0 10.0 IOUT [mA] VDD [V] 2.0 4.0 6.0 8.0 4.0 3.0 2.0 1.0 Ta = −40°C Ta = +25°C Ta = +85°C Remark VDS: Drain-to-source voltage of the output transistor

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 29 9. Minimum operation voltage (V OUT) vs. Input voltage (VDD) S-1003NA12 Pull-up to VDD Pull-up resistance: 100 k Ω 1.8 0 1.6 VOUT [V] VDD [V] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 Ta = −40°C Ta = +25°C Ta = +85°C S-1003NA24 Pull-up to V DD Pull-up resistance: 100 k Ω 3.0 0 2.8 VOUT [V] VDD [V] 2.5 2.0 1.5 1.0 0.5 Ta = −40°C Ta = +25°C Ta = +85°C S-1003NA50 Pull-up to V DD Pull-up resistance: 100 k Ω 6.0 0 5.5 VOUT [V] VDD [V] 5.0 4.0 3.0 2.0 1.0 Ta = −40°C Ta = +25°C Ta = +85°C S-1003NA12 Pull-up to 10 V Pull-up resistance: 100 k Ω 12.0 0 1.6 VOUT [V] VDD [V] 10.0 8.0 6.0 4.0 2.0 Ta = −40°C Ta = +25°C Ta = +85°C S-1003NA24 Pull-up to 10 V Pull-up resistance: 100 k Ω 12.0 0 2.8 VOUT [V] VDD [V] 10.0 8.0 6.0 4.0 2.0 Ta = −40°C Ta = +25°C Ta = +85°C S-1003NA50 Pull-up to 10 V Pull-up resistance: 100 k Ω 12.0 0 5.5 VOUT [V] VDD [V] 10.0 8.0 6.0 4.0 2.0 Ta = −40°C Ta = +25°C Ta = +85°C

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 30 10. Dynamic response vs. Output pin capacitance (C OUT) (CD pin; open) S-1003CA12 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.01 0.1 0.10.0001 0.010.001 tPLH tPHL S-1003CA24 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.01 0.1 0.10.0001 0.010.001 tPLH tPHL S-1003CA50 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 0.01 0.1 0.10.0001 0.010.001 tPLH tPHL S-1003NA12 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 100 0.10.0001 0.010.001 0.01 0.1 tPHL tPLH S-1003NA24 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 100 0.10.0001 0.010.001 0.01 0.1 tPHL tPLH S-1003NA50 0.00001 Response time [ms]0.001 Output pin capacitance [μF] 100 0.10.0001 0.010.001 0.01 0.1 tPHL tPLH

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 S-1003 Series Seiko Instruments Inc. 31 VIH Input voltage VIL VDD tPHL tPLH 1 μs 1 μs VDD *3 × 10% VDD *3 × 90% Output voltage *1. VIH = 10 V *2. VIL = 0.95 V *3. CMOS output product: V DD Nch open-drain product: V DD1 V R*1 100 kΩ COUT VDD V CD VDD1 VDD OUT VSS MR *1. R and VDD1 are unnecessary for CMOS output product. *2. Set to VDD or GND (MR pin non-active). Figure 34 Test Condition of Response Time Figure 35 Test Circuit of Response Time Caution 1. The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 2. When the CD pin is open, a double pulse may appear at release. To avoid the double pulse, attach a 100 pF or more capacitor to the CD pin. Response time when detecting (t PHL) is not affected by CD pin capacitance. Besides, response time when releasing (t PLH) can set the delay time by attaching the CD pin. Refer to "11. D e l a y t i m e (tD) vs. CD pin capacitance (C D) (Without output pin capacitance)" for details. 11. Delay time (t D) vs. CD pin capacitance (CD) (Without output pin capacitance) S-1003NA12 Ta = +25°C 0.01 0.1 1 10 100 0.01 10000 1000 1000 100 0.1 tD [ms] CD [nF] S-1003NA24 Ta = +25°C 0.01 0.1 1 10 100 0.01 10000 1000 1000 100 0.1 tD [ms] CD [nF] S-1003NA50 Ta = +25°C 0.01 0.1 1 10 100 0.01 10000 1000 1000 100 0.1 tD [ms] CD [nF]

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 32 12. Delay time (t D) vs. Temperature (Ta) S-1003NA12 CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V tD [ms] −40 85 75 50 25 0−25 Ta [°C] S-1003NA24 CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V tD [ms] −40 85 75 50 25 0−25 Ta [°C] S-1003NA50 CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V tD [ms] −40 85 75 50 25 0−25 Ta [°C] 1 μs tD VDD × 90% Input voltage Output voltage VIL VSS VIH *1. VIH = −VDET(S) + 1.0 V *2. VIL = 0.95 V V R*1 100 kΩVDD V CD VSS VDD OUT CD MR *1. R is unnecessary for CMOS output product. *2. Set to VDD or GND (MR pin non-active). Figure 36 Test Condition for Delay Time Figure 37 Test Circuit for Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR S-1003 Series Rev.1.0_00 Seiko Instruments Inc. 34 2. Change of detection voltage (Nch open-drain output product only) If there is not a product with a specified detection voltage value in the S-1003N Series, the detection voltage can be changed by using a resistance divider or a diode, as seen in Figure 40 and Figure 41. In Figure 40, hysteresis width also changes. (Nch open-drain output product) RA VIN GND VDD RB (RA ≤ 100 kΩ) R 100 kΩ VDD CD VSS OUT MR Detection voltage = RA + RB RB

−VDET Hysteresis width = RA + RB RB
VHYS (Nch open-drain output product) Vf1 VIN GND VDD R 100 kΩ VDD CD VSS OUT MR Detection voltage = Vf1 + (−VDET) *1. Set to VIN or GND (MR pin non-active). *1. RA should be 100 kΩ or less to prevent oscillation. *2. Set to VIN or GND (MR pin non-active). Caution If R A and R B are large, the hysteresis width may also be larger than the value given by the above equation due to the feed-through current. Figure 40 Figure 41 Caution 1. The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 2. Note that the hysteresis width may be larger as the following equation shows when using the above connections. Perform thorough evaluation using the actual application to set the constant. Maximum hysteresis width = RA + RB RB
VHYS + RA • 20 μA 3. When using the manual reset function, refer to "2. 4 When connecting resistance (R A) between power supply voltage (V DD) and VDD pin" in " Operation" to set the constant.

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The information described herein is subject to change without notice.
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When the products described herein are regulated produ cts subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited.
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Product Information

S1003 specifications and overview.

Summary

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)

Description

MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)

Source title S1003 Datasheet(PDF) - Seiko Instruments Inc

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