MGM12P SILABS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 100

Technical content

MGM12P Wireless Gecko Multi-Protocol Module Data Sheet The Silicon Labs Wireless Gecko Module (MGM12P) is a fully-in- tegrated, certified module, enabling rapid development of wireless mesh networking solutions. Based on the Silicon Labs EFR32MG12 Wireless Gecko SoC, the MGM12P combines an energy- efficient, multi-protocol wireless SoC with a proven RF/antenna design and industry leading wireless software stacks. This integration accelerates time-to-market and saves months of engineering effort and development costs. In addition, common software and development tools enable seamless migration from a module to discrete SoC-based design when the time is right. MGM12P can be used in a wide variety of applications: KEY FEATURES

  • 32-bit ARM® Cortex®-M4 core at 38.4 MHz maximum operating frequency
  • 1 MB of flash and 256 kB of RAM
  • ZigBee, Thread, BLE, and multi-protocol support
  • Pin-compatible with MGM111 module
  • 12-channel Peripheral Reflex System, Low-Energy Sensor Interface & Multi- channel Capacitive Sense Interface
  • Integrated PA with up to +17 dBm transmit power
  • Robust peripheral set and up to 25 GPIO
  • IoT Multi-Protocol Devices
  • Connected Home
  • Lighting
  • Health and Wellness
  • Metering
  • Building Automation and Security Timers and Triggers Real Time Counter and Calendar Cryotimer Timer/Counter Low Energy Timer Pulse Counter Watchdog Timer Protocol Timer 32-bit bus Peripheral Reflex System Serial Interfaces I/O Ports Analog I/F Lowest power mode with peripheral operational: USART Low Energy UARTTM I2C External Interrupts General Purpose I/O Pin Reset Pin Wakeup ADC VDAC Analog Comparator EM3—StopEM2—Deep SleepEM1—Sleep EM4—Hibernate EM4—ShutoffEM0—Active Core / Memory ARM CortexTM M4 processor with DSP extensions and FPU Energy Management Brown-Out Detector DC-DC Converter Voltage Regulator Voltage Monitor Power-On Reset Clock Management High Frequency Crystal Oscillator Low Frequency Crystal Oscillator Low Frequency RC Oscillator High Frequency RC Oscillator Ultra Low Frequency RC Oscillator Auxiliary High Frequency RC Oscillator Flash Program Memory RAM Memory Debug Interface with ETM LDMA Controller Memory Protection Unit Capacitive Sense Low Energy Sensor Interface Op-Amp IDAC Radio Transceiver DEMOD AGC IFADC CRC BUFC MOD FRC RAC PA I Q RF Frontend LNA Frequency Synthesizer PGA Other CRYPTO CRC True Random Number Generator SMU Antenna Integrated Chip Antenna External Antenna U.FL Connector Matching silabs.com | Building a more connected world. Copyright © 2022 by Silicon Laboratories Rev. 1.5
  1. Feature List The MGM12P highlighted features are listed below.
  • Low Power Wireless System-on-Chip.
  • High Performance 32-bit ARM Cortex®-M4 core at 38.4 MHz with DSP instruction and floating-point unit for efficient signal processing
  • 1024 kB flash program memory
  • 256 kB RAM data memory
  • 2.4 GHz radio operation
  • TX power up to +17 dBm
  • Low Energy Consumption
  • 10.3 mA RX current at 2.4 GHz (1 Mbps GFSK)
  • 10.8 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS)
  • 10 mA TX current @ 0 dBm output power at 2.4 GHz
  • 70 μA/MHz in Active Mode (EM0)
  • 2.62 μA EM2 DeepSleep current (256 kB RAM retention and RTCC running from LFXO)
  • High Receiver Performance
  • -102 dBm sensitivity @ 250 kbps O-QPSK DSSS
  • -105.7 dBm sensitivity @ 250 kbps O-QPSK DSSS (MGM12P22 and MGM12P32)
  • -94.4 dBm sensitivity @ 1Mbps 2GFSK
  • -100.3 dBm sensitivity @ 1Mbps 2GFSK (MGM12P22 and MGM12P32)
  • Supported Modulation Format
  • Shaped OQPSK
  • 2-FSK / 4-FSK with fully configurable shaping
  • Supported Protocols:
  • Bluetooth® Low Energy (Bluetooth 5)
  • zigbee
  • Thread
  • Support for Internet Security
  • General Purpose CRC
  • True Random Number Generator
  • Hardware Cryptographic Acceleration for AES 128/256, SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC
  • Wide selection of MCU peripherals
  • 12-bit 1 Msps SAR Analog to Digital Converter (ADC)
  • 2×Analog Comparator (ACMP)
  • 2×Digital to Analog Converter (VDAC)
  • 3×Operational Amplifier (Opamp)
  • Digital to Analog Current Converter (IDAC)
  • Low-Energy Sensor Interface (LESENSE)
  • Multi-channel Capacitive Sense Interface (CSEN)
  • Up to 25 pins connected to analog channels (APORT) shared between analog peripherals
  • Up to 25 General Purpose I/O pins with output state reten- tion and asynchronous interrupts
  • 8 Channel DMA Controller
  • 12 Channel Peripheral Reflex System (PRS)
  • 2×16-bit Timer/Counter
  • 3 + 4 Compare/Capture/PWM channels
  • 2×32-bit Timer/Counter
  • 3 + 4 Compare/Capture/PWM channels
  • 32-bit Real Time Counter and Calendar
  • 16-bit Low Energy Timer for waveform generation
  • 32-bit Ultra Low Energy Timer/Counter for periodic wake-up from any Energy Mode
  • 3×16-bit Pulse Counter with asynchronous operation
  • 2×Watchdog Timer with dedicated RC oscillator
  • 4×Universal Synchronous/Asynchronous Receiver/Trans- mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I2S)
  • Low Energy UART (LEUART™)
  • 2×I2C interface with SMBus support and address recogni- tion in EM3 Stop
  • Wide Operating Range
  • 1.8 V to 3.8 V single power supply
  • -40 °C to 85 °C
  • WxLxH: 12.9 x 17.8 x 2.3 mm MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Feature List silabs.com | Building a more connected world. Rev. 1.5 | 2
  1. Ordering Information Ordering Code Description Max TX Power Sensitivity (O-QPSK) Antenna Packaging Production Status MGM12P32F1024GA-V4 Multi-protocol Module +17 dBm -105.7 dBm Integrated chip an- tenna Cut Tape (100 pcs) Full Production (certi- fied) MGM12P32F1024GA-V4R Multi-protocol Module +17 dBm -105.7 dBm Integrated chip an- tenna Reel (1000 pcs) Full Production (certi- fied) MGM12P32F1024GE-V4 Multi-protocol Module +17 dBm -105.7 dBm External (U.FL) Cut Tape (100 pcs) Full Production (certi- fied) MGM12P32F1024GE-V4R Multi-protocol Module +17 dBm -105.7 dBm External (U.FL) Reel (1000 pcs) Full Production (certi- fied) MGM12P22F1024GA-V4 Multi-protocol Module +10 dBm -105.7 dBm Integrated chip an- tenna Cut Tape (100 pcs) Full Production (certi- fied) MGM12P22F1024GA-V4R Multi-protocol Module +10 dBm -105.7 dBm Integrated chip an- tenna Reel (1000 pcs) Full Production (certi- fied) MGM12P22F1024GE-V4 Multi-protocol Module +10 dBm -105.7 dBm External (U.FL) Cut Tape (100 pcs) Full Production (certi- fied) MGM12P22F1024GE-V4R Multi-protocol Module +10 dBm -105.7 dBm External (U.FL) Reel (1000 pcs) Full Production (certi- fied) MGM12P02F1024GA-V4 Multi-protocol Module +10 dBm -102 dBm Integrated chip an- tenna Cut Tape (100 pcs) Full Production (certi- fied) MGM12P02F1024GA-V4R Multi-protocol Module +10 dBm -102 dBm Integrated chip an- tenna Reel (1000 pcs) Full Production (certi- fied) MGM12P02F1024GE-V4 Multi-protocol Module +10 dBm -102 dBm External (U.FL) Cut Tape (100 pcs) Full Production (certi- fied) MGM12P02F1024GE-V4R Multi-protocol Module +10 dBm -102 dBm External (U.FL) Reel (1000 pcs) Full Production (certi- fied) SLWRB4304A MGM12P Radio Board2 +17 dBm -105.7 dBm Integrated chip an- tenna Single Unit Development Board Note: 1. IAR license required for zigbee and Thread software development. 2. Requires Mesh Networking kit SLWSTK6000A or SLWSTK6000B MGM12P Wireless Gecko Multi-Protocol Module Data Sheet

Ordering Information

silabs.com | Building a more connected world. Rev. 1.5 | 3

silabs.com | Building a more connected world. Rev. 1.5 | 4

silabs.com | Building a more connected world. Rev. 1.5 | 5

silabs.com | Building a more connected world. Rev. 1.5 | 6

  1. System Overview

3.1 Introduction

This section provides a brief overview of the MGM12P module architecture including both MCU and RF sub-systems. A detailed func- tional description of the EFR32MG12 SoC used inside the module is available in the EFR32MG12 Wireless Gecko Data Sheet and EFR32xG12 Wireless Gecko Reference Manual. A block diagram of the EFR32MG12 SoC is shown in the figure below. Analog Peripherals Clock Management HFRCO IDAC ARM Cortex-M4 Core

1024 KB ISP Flash

256 KB RAM A

H B Watchdog Timer RESETn Digital Peripherals Input Mux Port Mapper Port I/O Configuration Analog Comparator 12-bit ADC Temp Sense VDD Internal Reference IOVDD AUXHFRCO LFXO ULFRCO HFXO Memory Protection Unit LFRCO A P B LDMA Controller APORT Floating Point UnitEnergy Management DVDD VREGVDD VREGSW bypass AVDD PAVDD RFVDD DECOUPLE IOVDD Voltage Monitor Radio Transceiver 2G4RF_IOP 2G4RF_ION

2.4 GHz RF

I Q LNA Frequency Synthesizer DEMOD AGC IFADC CRC BUFC MOD FRC RAC PGA To RF Frontend Circuits BALUN VDAC + Op-Amp Capacitive Sense LESENSE CRC CRYPTO I2C LEUART USART RTC / RTCC PCNT CRYOTIMER TIMER LETIMER Port K Drivers PKn Port J Drivers PJn Port I Drivers PIn Port F Drivers PFn Port D Drivers PDn Port C Drivers PCn Port B Drivers PBn Port A Drivers PAn Mux & FB HFXTAL_P HFXTAL_N LFXTAL_P LFXTAL_N Voltage Regulator DC-DC Converter Debug Signals (shared w/GPIO) Brown Out / Power-On Reset Reset Management UnitSerial Wire and ETM Debug / Programming Figure 3.1. Detailed EFR32MG12 Block Diagram

3.2 Radio

The MGM12P modules feature a highly configurable radio transceiver that supports a wide range of wireless protocols including zigbee, Thread, and Bluetooth Low Energy.

3.2.1 Antenna Interface

The MGM12P module family includes options for either a high-performance, integrated chip-antenna ( MGM12P-GA) or external anten- na (MGM12P-GE) via a U.FL connector. The table below includes performance specifications for the integrated chip antenna. Table 3.1. Antenna Efficiency and Peak Gain (MGM12P) Parameter With optimal layout Note Efficiency -1.5 dB to -3 dB Antenna efficiency, gain and radiation pattern are highly depend- ent on the application PCB layout and mechanical design. Refer to the Layout Guidelines Chapter for PCB layout and antenna in- tegration guidelines for optimal performance. Typical efficiency gain is expected to be between -3.5 dB and -5 dB. Peak gain 1.0 dBi MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 7

3.2.2 Packet and State Trace

The MGM12P Frame Controller has a packet and state trace unit that provides valuable information during the development phase. It features:

  • Non-intrusive trace of transmit data, receive data and state information
  • Data observability on a single-pin UART data output, or on a two-pin SPI data output
  • Configurable data output bitrate / baudrate
  • Multiplexed transmitted data, received data and state / meta information in a single serial data stream

3.2.3 Random Number Generator

The Frame Controller (FRC) implements a random number generator that uses entropy gathered from noise in the RF receive chain. The data is suitable for use in cryptographic applications. Output from the random number generator can be used either directly or as a seed or entropy source for software-based random num- ber generator algorithms such as Fortuna. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 8

3.3 Power

The MGM12P has an Energy Management Unit (EMU) and efficient integrated regulators to generate internal supply voltages. Only a single external supply voltage is required, from which all internal voltages are created. An integrated DC-DC buck regulator is utilized to further reduce the current consumption. Figure 3.2. MGM12P Power Block for Modules (+10 dBm) MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 9

Figure 3.3. MGM12P Power Block for Modules (+17 dBm)

3.3.1 Energy Management Unit (EMU)

The Energy Management Unit manages transitions of energy modes in the device. Each energy mode defines which peripherals and features are available and the amount of current the device consumes. The EMU can also be used to turn off the power to unused RAM blocks, and it contains control registers for the DC-DC regulator and the Voltage Monitor (VMON). The VMON is used to monitor multi- ple supply voltages. It has multiple channels which can be programmed individually by the user to determine if a sensed supply has fallen below a chosen threshold.

3.3.2 DC-DC Converter

The DC-DC buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes EM0, EM1, EM2, and EM3. Patented RF noise mitigation allows operation of the DC-DC converter without degrading sensitivity of radio components. Protection features include programmable current limiting, short-circuit protection, and dead-time protection. The DC-DC converter may also enter bypass mode when the input voltage is too low for efficient operation. In bypass mode, the DC-DC input supply is internally connected directly to its output through a low resistance switch. Bypass mode also supports in-rush current limiting to prevent input supply voltage droops due to excessive output current transients. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 10

3.3.3 Power Domains

The MGM12P has two peripheral power domains for operation in EM2 and lower. If all of the peripherals in a peripheral power domain are configured as unused, the power domain for that group will be powered off in the low-power mode, reducing the overall current consumption of the device. Table 3.2. Peripheral Power Subdomains Peripheral Power Domain 1 Peripheral Power Domain 2 ACMP0 ACMP1 PCNT0 PCNT1 ADC0 PCNT2 LETIMER0 CSEN LESENSE DAC0 APORT LEUART0 - I2C0 - I2C1 - IDAC

3.4 General Purpose Input/Output (GPIO)

MGM12P has 25 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input. More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin. The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to several GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals. The GPIO subsystem supports asynchronous external pin interrupts.

3.5 Clocking

3.5.1 Clock Management Unit (CMU)

The Clock Management Unit controls oscillators and clocks in the MGM12P. Individual enabling and disabling of clocks to all peripheral modules is perfomed by the CMU. The CMU also controls enabling and configuration of the oscillators. A high degree of flexibility al- lows software to optimize energy consumption in any specific application by minimizing power dissipation in unused peripherals and oscillators.

3.5.2 Internal Oscillators

The MGM12P fully integrates two crystal oscillators and four RC oscillators, listed below.

  • A 38.4MHz high frequency crystal oscillator (HFXO) provides a precise timing reference for the MCU and radio.
  • A 32.768 kHz crystal oscillator (LFXO) provides an accurate timing reference for low energy modes.
  • An integrated high frequency RC oscillator (HFRCO) is available for the MCU system, when crystal accuracy is not required. The HFRCO employs fast startup at minimal energy consumption combined with a wide frequency range.
  • An integrated auxilliary high frequency RC oscillator (AUXHFRCO) is available for timing the general-purpose ADC and the Serial Wire debug port with a wide frequency range.
  • An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crys- tal accuracy is not required.
  • An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy con- sumption in low energy modes. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 11

3.6 Counters/Timers and PWM

3.6.1 Timer/Counter (TIMER)

TIMER peripherals keep track of timing, count events, generate PWM outputs and trigger timed actions in other peripherals through the PRS system. The core of each TIMER is a 16-bit counter with up to 4 compare/capture channels. Each channel is configurable in one of three modes. In capture mode, the counter state is stored in a buffer at a selected input event. In compare mode, the channel output reflects the comparison of the counter to a programmed threshold value. In PWM mode, the TIMER supports generation of pulse-width modulation (PWM) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional dead-time insertion available in timer unit TIMER_0 only.

3.6.2 Wide Timer/Counter (WTIMER)

WTIMER peripherals function just as TIMER peripherals, but are 32 bits wide. They keep track of timing, count events, generate PWM outputs and trigger timed actions in other peripherals through the PRS system. The core of each WTIMER is a 32-bit counter with up to 4 compare/capture channels. Each channel is configurable in one of three modes. In capture mode, the counter state is stored in a buffer at a selected input event. In compare mode, the channel output reflects the comparison of the counter to a programmed thresh- old value. In PWM mode, the WTIMER supports generation of pulse-width modulation (PWM) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional dead-time insertion available in timer unit WTIMER_0 only.

3.6.3 Real Time Counter and Calendar (RTCC)

The Real Time Counter and Calendar (RTCC) is a 32-bit counter providing timekeeping in all energy modes. The RTCC includes a Binary Coded Decimal (BCD) calendar mode for easy time and date keeping. The RTCC can be clocked by any of the on-board oscilla- tors with the exception of the AUXHFRCO, and it is capable of providing system wake-up at user defined instances. When receiving frames, the RTCC value can be used for timestamping. The RTCC includes 128 bytes of general purpose data retention, allowing easy and convenient data storage in all energy modes.

3.6.4 Low Energy Timer (LETIMER)

The unique LETIMER is a 16-bit timer that is available in energy mode EM0 Active, EM1 Sleep, EM2 Deep Sleep, and EM3 Stop. This allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of wave- forms with minimal software intervention. The LETIMER is connected to the Real Time Counter and Calendar (RTCC), and can be con- figured to start counting on compare matches from the RTCC.

3.6.5 Ultra Low Power Wake-up Timer (CRYOTIMER)

The CRYOTIMER is a 32-bit counter that is capable of running in all energy modes. It can be clocked by either the 32.768 kHz crystal oscillator (LFXO), the 32.768 kHz RC oscillator (LFRCO), or the 1 kHz RC oscillator (ULFRCO). It can provide periodic Wakeup events and PRS signals which can be used to wake up peripherals from any energy mode. The CRYOTIMER provides a wide range of inter- rupt periods, facilitating flexible ultra-low energy operation.

3.6.6 Pulse Counter (PCNT)

The Pulse Counter (PCNT) peripheral can be used for counting pulses on a single input or to decode quadrature encoded inputs. The clock for PCNT is selectable from either an external source on pin PCTNn_S0IN or from an internal timing reference, selectable from among any of the internal oscillators, except the AUXHFRCO. The module may operate in energy mode EM0 Active, EM1 Sleep, EM2 Deep Sleep, and EM3 Stop.

3.6.7 Watchdog Timer (WDOG)

The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock. It has windowed monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. The watchdog can also monitor autonomous systems driven by PRS. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 12

3.7 Communications and Other Digital Peripherals

3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)

The Universal Synchronous/Asynchronous Receiver/Transmitter is a flexible serial I/O module. It supports full duplex asynchronous UART communication with hardware flow control as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with devices supporting:

  • ISO7816 SmartCards
  • IrDA
  • I2S

3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)

The unique LEUARTTM provides two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud. The LEUART includes all necessary hardware to make asynchronous serial communication possible with a minimum of software intervention and energy consumption.

3.7.3 Inter-Integrated Circuit Interface (I2C)

The I2C module provides an interface between the MCU and a serial I 2C bus. It is capable of acting as both a master and a slave and supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The interface provided to software by the I 2C module allows precise timing control of the transmission process and highly automated trans- fers. Automatic recognition of slave addresses is provided in active and low energy modes.

3.7.4 Peripheral Reflex System (PRS)

The Peripheral Reflex System provides a communication network between different peripheral modules without software involvement. Peripheral modules producing Reflex signals are called producers. The PRS routes Reflex signals from producers to consumer periph- erals which in turn perform actions in response. Edge triggers and other functionality such as simple logic operations (AND, OR, NOT) can be applied by the PRS to the signals. The PRS allows peripheral to act autonomously without waking the MCU core, saving power.

3.7.5 Low Energy Sensor Interface (LESENSE)

The Low Energy Sensor Interface LESENSETM is a highly configurable sensor interface with support for up to 16 individually configura- ble sensors. By controlling the analog comparators, ADC, and DAC, LESENSE is capable of supporting a wide range of sensors and measurement schemes, and can for instance measure LC sensors, resistive sensors and capacitive sensors. LESENSE also includes a programmable finite state machine which enables simple processing of measurement results without CPU intervention. LESENSE is available in energy mode EM2, in addition to EM0 and EM1, making it ideal for sensor monitoring in applications with a strict energy budget.

3.8 Security Features

3.8.1 GPCRC (General Purpose Cyclic Redundancy Check)

The GPCRC module implements a Cyclic Redundancy Check (CRC) function. It supports both 32-bit and 16-bit polynomials. The sup- ported 32-bit polynomial is 0x04C11DB7 (IEEE 802.3), while the 16-bit polynomial can be programmed to any value, depending on the needs of the application. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 13

3.8.2 Crypto Accelerator (CRYPTO)

The Crypto Accelerator is a fast and energy-efficient autonomous hardware encryption and decryption accelerator. EFR32 devices sup- port AES encryption and decryption with 128- or 256-bit keys, ECC over both GF(P) and GF(2m), SHA-1 and SHA-2 (SHA-224 and SHA-256). Supported block cipher modes of operation for AES include: ECB, CTR, CBC, PCBC, CFB, OFB, GCM, CBC-MAC, GMAC and CCM. Supported ECC NIST recommended curves include P-192, P-224, P-256, K-163, K-233, B-163 and B-233. The CRYPTO is tightly linked to the Radio Buffer Controller (BUFC) enabling fast and efficient autonomous cipher operations on data buffer content. It allows fast processing of GCM (AES), ECC and SHA with little CPU intervention. CRYPTO also provides trigger signals for DMA read and write operations.

3.8.3 True Random Number Generator (TRNG)

The TRNG is a non-deterministic random number generator based on a full hardware solution. The TRNG is validated with NIST800-22 and AIS-31 test suites as well as being suitable for FIPS 140-2 certification (for the purposes of cryptographic key generation). Note: TRNG operation is only supported at VSCALE2. TRNG cannot be used at VSCALE0.

3.8.4 Security Management Unit (SMU)

The Security Management Unit (SMU) allows software to set up fine-grained security for peripheral access, which is not possible in the Memory Protection Unit (MPU). Peripherals may be secured by hardware on an individual basis, such that only priveleged accesses to the peripheral's register interface will be allowed. When an access fault occurs, the SMU reports the specific peripheral involved and can optionally generate an interrupt.

3.9 Analog

3.9.1 Analog Port (APORT)

The Analog Port (APORT) is an analog interconnect matrix allowing access to analog modules on a flexible selection of pins. Each APORT bus consists of analog switches connected to a common wire. Since many clients can operate differentially, buses are grouped by X/Y pairs.

3.9.2 Analog Comparator (ACMP)

The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high- er. Inputs are selected from among internal references and external pins. The tradeoff between response time and current consumption is configurable by software. Two 6-bit reference dividers allow for a wide range of internally-programmable reference sources. The ACMP can also be used to monitor the supply voltage. An interrupt can be generated when the supply falls below or rises above the programmable threshold.

3.9.3 Analog to Digital Converter (ADC)

The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to 1 Msps. The output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over multiple samples. The ADC includes integrated voltage references and an integrated temperature sensor. Inputs are selectable from a wide range of sources, including pins configurable as either single-ended or differential.

3.9.4 Capacitive Sense (CSEN)

The CSEN module is a dedicated Capacitive Sensing block for implementing touch-sensitive user interface elements such a switches and sliders. The CSEN module uses a charge ramping measurement technique, which provides robust sensing even in adverse condi- tions including radiated noise and moisture. The module can be configured to take measurements on a single port pin or scan through multiple pins and store results to memory through DMA. Several channels can also be shorted together to measure the combined ca- pacitance or implement wake-on-touch from very low energy modes. Hardware includes a digital accumulator and an averaging filter, as well as digital threshold comparators to reduce software overhead. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 14

3.9.5 Digital to Analog Current Converter (IDAC)

The Digital to Analog Current Converter can source or sink a configurable constant current. This current can be driven on an output pin or routed to the selected ADC input pin for capacitive sensing. The full-scale current is programmable between 0.05 μA and 64 μA with several ranges consisting of various step sizes.

3.9.6 Digital to Analog Converter (VDAC)

The Digital to Analog Converter (VDAC) can convert a digital value to an analog output voltage. The VDAC is a fully differential, 500 ksps, 12-bit converter. The opamps are used in conjunction with the VDAC, to provide output buffering. One opamp is used per single- ended channel, or two opamps are used to provide differential outputs. The VDAC may be used for a number of different applications such as sensor interfaces or sound output. The VDAC can generate high-resolution analog signals while the MCU is operating at low frequencies and with low total power consumption. Using DMA and a timer, the VDAC can be used to generate waveforms without any CPU intervention. The VDAC is available in all energy modes down to and including EM3.

3.9.7 Operational Amplifiers

The opamps are low power amplifiers with a high degree of flexibility targeting a wide variety of standard opamp application areas. With flexible built-in programming for gain and interconnection they can be configured to support multiple common opamp functions. All pins are also available externally for filter configurations. Each opamp has a rail to rail input and a rail to rail output. They can be used in conjunction with the VDAC module or in stand-alone configurations. The opamps save energy, PCB space, and cost as compared with standalone opamps because they are integrated on-chip.

3.10 Reset Management Unit (RMU)

The RMU is responsible for handling reset of the MGM12P. A wide range of reset sources are available, including several power supply monitors, pin reset, software controlled reset, core lockup reset and watchdog reset.

3.11 Core and Memory

3.11.1 Processor Core

The ARM Cortex-M4F processor includes a 32-bit RISC processor integrating the following features and tasks in the system:

  • ARM Cortex-M4F RISC processor achieving 1.25 Dhrystone MIPS/MHz
  • Memory Protection Unit (MPU) supporting up to 8 memory segments
  • 1024 KB flash program memory
  • 256 KB RAM data memory
  • Configuration and event handling of all modules
  • 2-pin Serial-Wire debug interface

3.11.2 Memory System Controller (MSC)

The Memory System Controller (MSC) is the program memory unit of the microcontroller. The flash memory is readable and writable from both the Cortex-M and DMA. The flash memory is divided into two blocks; the main block and the information block. Program code is normally written to the main block, whereas the information block is available for special user data and flash lock bits. There is also a read-only page in the information block containing system and device calibration data. Read and write operations are supported in en- ergy modes EM0 Active and EM1 Sleep.

3.11.3 Linked Direct Memory Access Controller (LDMA)

The Linked Direct Memory Access (LDMA) controller allows the system to perform memory operations independently of software. This reduces both energy consumption and software workload. The LDMA allows operations to be linked together and staged, enabling so- phisticated operations to be implemented. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 15

3.12 Memory Map

The MGM12P memory map is shown in the figures below. Figure 3.4. MGM12P Memory Map — Core Peripherals and Code Space MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 16

Figure 3.5. MGM12P Memory Map — Peripherals

3.13 Configuration Summary

The features of the MGM12P are a subset of the feature set described in the device reference manual. The table below describes de- vice specific implementation of the features. Remaining modules support full configuration. Table 3.3. Configuration Summary Module Configuration Pin Connections USART0 IrDA SmartCard US0_TX, US0_RX, US0_CLK, US0_CS USART1 IrDA I2S SmartCard US1_TX, US1_RX, US1_CLK, US1_CS USART2 IrDA SmartCard US2_TX, US2_RX, US2_CLK, US2_CS USART3 IrDA I2S SmartCard US3_TX, US3_RX, US3_CLK, US3_CS TIMER0 with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 - TIM1_CC[3:0] WTIMER0 with DTI WTIM0_CC[2:0], WTIM0_CDTI[2:0] WTIMER1 - WTIM1_CC[3:0] MGM12P Wireless Gecko Multi-Protocol Module Data Sheet System Overview silabs.com | Building a more connected world. Rev. 1.5 | 17

  1. Electrical Specifications

4.1 Electrical Characteristics

All electrical parameters in all tables are specified under the following conditions, unless stated otherwise:

  • Typical values are based on TAMB=25 °C and VDD= 3.3 V, by production test and/or technology characterization.
  • Radio performance numbers are measured in conducted mode, based on Silicon Laboratories reference designs using output pow- er-specific external RF impedance-matching networks for interfacing to a 50 Ω antenna.
  • Minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature, unless stated otherwise. Refer to Figure 3.2 MGM12P Power Block for Modules (+10 dBm) on page 9 and Figure 3.3 MGM12P Power Block for Modules ( +17 dBm) on page 10 to see the relation between the modules external VDD pin and internal voltage supplies. The module has only one external power supply input (VDD). Refer to 4.1.2 General Operating Conditions for more details about operational supply and temperature limits.

4.1.1 Absolute Maximum Ratings

Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and relia- bility data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/default.aspx. Table 4.1. Absolute Maximum Ratings Parameter Symbol Test Condition Min Typ Max Unit Storage temperature range TSTG -40 — 85 °C Voltage on any supply pin VDDMAX -0.3 — 3.8 V Voltage ramp rate on any supply pin VDDRAMPMAX — — 1 V / μs DC Voltage on any over-volt- age tolerant GPIO pin1 VDIGPIN -0.3 — Min of 5.25 and IOVDD V -0.3 — IOVDD+0.3 V Input RF level PRFMAX2G4 — — -2 dBm Current per I/O pin IIOMAX Sink — — 50 mA Source — — 50 mA Current for all I/O pins IIOALLMAX Sink — — 200 mA Source — — 200 mA Note: 1. When a GPIO pin is routed to the analog module through the APORT, the maximum voltage = IOVDD. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 18

4.1.2 General Operating Conditions

Table 4.2. General Operating Conditions Parameter Symbol Test Condition Min Typ Max Unit Operating Ambient tempera- ture range TA -G temperature grade -40 25 85 °C VDD supply voltage 1 VVDD DCDC in regulation 2.4 3.3 3.8 V DCDC in bypass 50mA load 1.8 3.3 3.8 V Core Clock Frequency fCORE FWAIT = 1, VSCALE2 — — 40 MHz FWAIT = 0, VSCALE0 — — 20 MHz Note: 1. The minimum voltage required in bypass mode is calculated using RBYP from the DCDC specification table. Requirements for other loads can be calculated as VDVDD_min+ILOAD * RBYP_max.

4.1.3 DC-DC Converter

Table 4.3. DC-DC Converter Parameter Symbol Test Condition Min Typ Max Unit Input voltage range VDCDC_I Bypass mode, IDCDC_LOAD = 50 mA 1.8 — VVREGVDD_ MAX V Low noise (LN) mode, 1.8 V out- put, IDCDC_LOAD = 100 mA, or Low power (LP) mode, 1.8 V out- put, IDCDC_LOAD = 10 mA 2.4 — VVREGVDD_ MAX V Low noise (LN) mode, 1.8 V out- put, IDCDC_LOAD = 200 mA 2.6 — VVREGVDD_ MAX V Output voltage programma- ble range1 VDCDC_O 1.8 — VVREGVDD V Max load current ILOAD_MAX Low noise (LN) mode, Medium Drive2 — — 100 mA Low noise (LN) mode, Light Drive2 — — 50 mA Low power (LP) mode, LPCMPBIASEMxx3 = 0 — — 75 μA Low power (LP) mode, LPCMPBIASEMxx3 = 3 — — 10 mA Note: 1. Due to internal dropout, the DC-DC output will never be able to reach its input voltage, VVDD 2. Drive levels are defined by configuration of the PFETCNT and NFETCNT registers. Light Drive: PFETCNT=NFETCNT=3; Medi- um Drive: PFETCNT=NFETCNT=7; Heavy Drive: PFETCNT=NFETCNT=15. 3. In EMU_DCDCMISCCTRL register MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 19

4.1.4 Current Consumption

4.1.4.1 Current Consumption 3.3 V using DC-DC Converter Unless otherwise indicated, typical conditions are: VDD = 3.3 V, DC-DC enabled. T OP = 25 °C. Minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at TOP = 25 °C. Table 4.4. Current Consumption 3.3 V using DC-DC Converter Parameter Symbol Test Condition Min Typ Max Unit Current consumption in EM0 mode with all peripherals dis- abled, DCDC in Low Noise DCM mode2. IACTIVE_DCM 38.4 MHz crystal, CPU running while loop from flash4 — 88 — μA/MHz

38 MHz HFRCO, CPU running

— 70 — μA/MHz — 70 — μA/MHz — 85 — μA/MHz

26 MHz HFRCO, CPU running

— 77 — μA/MHz

1 MHz HFRCO, CPU running

— 636 — μA/MHz Current consumption in EM0 mode with all peripherals dis- abled, DCDC in Low Noise CCM mode1. IACTIVE_CCM 38.4 MHz crystal, CPU running while loop from flash4 — 98 — μA/MHz — 81 — μA/MHz — 82 — μA/MHz — 95 — μA/MHz — 95 — μA/MHz — 1155 — μA/MHz Current consumption in EM0 mode with all peripherals dis- abled and voltage scaling enabled, DCDC in Low Noise CCM mode1. IACTIVE_CCM_VS 19 MHz HFRCO, CPU running while loop from flash — 101 — μA/MHz — 1155 — μA/MHz Current consumption in EM1 mode with all peripherals dis- abled, DCDC in Low Noise DCM mode2. IEM1_DCM 38.4 MHz crystal4 — 59 — μA/MHz

38 MHz HFRCO — 41 — μA/MHz

26 MHz HFRCO — 48 — μA/MHz

1 MHz HFRCO — 610 — μA/MHz

Current consumption in EM1 mode with all peripherals dis- abled and voltage scaling enabled, DCDC in Low Noise DCM mode2. IEM1_DCM_VS 19 MHz HFRCO — 52 — μA/MHz

1 MHz HFRCO — 587 — μA/MHz

MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 20

Parameter Symbol Test Condition Min Typ Max Unit Current consumption in EM2 mode, with votage scaling enabled, DCDC in LP mode. IEM2_VS Full 256 kB RAM retention and RTCC running from LFXO — 2.62 — μA Current consumption in EM3 mode, with voltage scaling enabled. IEM3_VS Full 256 kB RAM retention and CRYOTIMER running from ULFR- CO — 2.33 — μA Current consumption in EM4H mode, with voltage scaling enabled. IEM4H_VS 128 byte RAM retention, RTCC running from LFXO — 1.21 — μA 128 byte RAM retention, CRYO- TIMER running from ULFRCO — 0.91 — μA 128 byte RAM retention, no RTCC — 0.91 — μA Current consumption in EM4S mode IEM4S No RAM retention, no RTCC — 0.58 — μA Note: 1. DCDC Low Noise CCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=6.4 MHz (RCOBAND=4), ANASW=DVDD. 2. DCDC Low Noise DCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=3.0 MHz (RCOBAND=0), ANASW=DVDD. 3. DCDC Low Power Mode = Medium Drive (PFETCNT=NFETCNT=7), LPOSCDIV=1, LPCMPBIASEM234H=0, LPCLIMILIM- SEL=1, ANASW=DVDD. 4. CMU_HFXOCTRL_LOWPOWER=0. 5. CMU_LFRCOCTRL_ENVREF = 1, CMU_LFRCOCTRL_VREFUPDATE = 1 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 21

4.1.4.2 Current Consumption Using Radio 3.3 V with DC-DC Unless otherwise indicated, typical conditions are: VDD = 3.3 V, DC-DC enabled. T OP = 25 °C. Minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at TOP = 25 °C. Table 4.5. Current Consumption Using Radio 3.3 V with DC-DC Parameter Symbol Test Condition Min Typ Max Unit Current consumption in re- ceive mode, active packet reception (MCU in EM1 @

38.4 MHz, peripheral clocks

disabled). LNA in bypass. IRX_ACTIVE 1 Mbit/s, 2GFSK, F = 2.4 GHz, Radio clock prescaled by 4 — 10.3 — mA 2 Mbit/s, 2GFSK, F = 2.4 GHz, Radio clock prescaled by 4 — 11.5 — mA 802.15.4 receiving frame, F = 2.4 GHz, Radio clock prescaled by 3 — 10.8 — mA Current consumption in re- ceive mode, listening for packet (MCU in EM1 @ 38.4 MHz, peripheral clocks disa- bled) LNA in bypass. IRX_LISTEN 1 Mbit/s, 2GFSK, F = 2.4 GHz, No radio clock prescaling — 11.6 — mA 2 Mbit/s, 2GFSK, F = 2.4 GHz, No radio clock prescaling — 12.6 — mA 802.15.4, F = 2.4 GHz, No radio clock prescaling — 12.3 — mA Current consumption in transmit mode (MCU in EM1 @ 38.4 MHz, peripheral clocks disabled) LNA in bypass. ITX F = 2.4 GHz, CW, 0 dBm output power, Radio clock prescaled by 1 (MGM12P02) — 10 — mA F = 2.4 GHz, CW, 0 dBm output power, Radio clock prescaled by 1 (MGM12P22) — 15.8 — F = 2.4 GHz, CW, 8 dBm output power (MGM12P02) — 27.1 — mA F = 2.4 GHz, CW, 8 dBm output power (MGM12P22) — 31.8 — mA F = 2.4 GHz, CW, 10.0 dBm out- put power (MGM12P02) — 35.4 — mA F = 2.4 GHz, CW, 10.0 dBm out- put power (MGM12P22) — 39.2 — mA F = 2.4 GHz, CW, 17.0 dBm out- put power, PAVDD connected di- rectly to VDD (MGM12P32) — 121 — mA MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 22

4.1.5 Wake Up Times

Table 4.6. Wake Up Times Parameter Symbol Test Condition Min Typ Max Unit Wake up time from EM1 tEM1_WU — 3 — AHB Clocks Wake up from EM2 tEM2_WU Code execution from flash — 10.1 — µs Code execution from RAM — 3.2 — µs Wake up from EM3 tEM3_WU Code execution from flash — 10.1 — µs Code execution from RAM — 3.2 — µs Wake up from EM4H1 tEM4H_WU Executing from flash — 80 — µs Wake up from EM4S1 tEM4S_WU Executing from flash — 291 — µs Time from release of reset source to first instruction ex- ecution tRESET Soft Pin Reset released — 43 — µs Any other reset released — 350 — µs Power mode scaling time tSCALE VSCALE0 to VSCALE2, HFCLK =

19 MHz2 3

— 31.8 — µs VSCALE2 to VSCALE0, HFCLK =

19 MHz4

— 4.3 — µs Note: 1. Time from wake up request until first instruction is executed. Wakeup results in device reset. 2. Scaling up from VSCALE0 to VSCALE2 requires approximately 30.3 µs + 28 HFCLKs. 3. VSCALE0 to VSCALE2 voltage change transitions occur at a rate of 10 mV/µs for approximately 20 µs. During this transition, peak currents will be dependent on the value of the DECOUPLE output capacitor, from 35 mA (with a 1 µF capacitor) to 70 mA (with a 2.7 µF capacitor). 4. Scaling down from VSCALE2 to VSCALE0 requires approximately 2.8 µs + 29 HFCLKs. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 23

4.1.6 Brown Out Detector (BOD)

Table 4.7. Brown Out Detector (BOD) Parameter Symbol Test Condition Min Typ Max Unit DVDD BOD threshold VDVDDBOD DVDD rising — — 1.62 V DVDD falling (EM0/EM1) 1.35 — — V DVDD falling (EM2/EM3) 1.3 — — V DVDD BOD hysteresis VDVDDBOD_HYST — 18 — mV DVDD BOD response time tDVDDBOD_DELAY Supply drops at 0.1V/μs rate — 2.4 — μs AVDD BOD threshold VAVDDBOD AVDD rising — — 1.8 V AVDD falling (EM0/EM1) 1.62 — — V AVDD falling (EM2/EM3) 1.53 — — V AVDD BOD hysteresis VAVDDBOD_HYST — 20 — mV AVDD BOD response time tAVDDBOD_DELAY Supply drops at 0.1V/μs rate — 2.4 — μs EM4 BOD threshold VEM4DBOD AVDD rising — — 1.7 V AVDD falling 1.45 — — V EM4 BOD hysteresis VEM4BOD_HYST — 25 — mV EM4 BOD response time tEM4BOD_DELAY Supply drops at 0.1V/μs rate — 300 — μs

4.1.7 Frequency Synthesizer

Table 4.8. Frequency Synthesizer Parameter Symbol Test Condition Min Typ Max Unit RF Synthesizer Frequency range fRANGE 2400 - 2483.5 MHz 2400 — 2483.5 MHz LO tuning frequency resolu- tion with 38.4 MHz crystal fRES 2400 - 2483.5 MHz — — 73 Hz Frequency deviation resolu- tion with 38.4 MHz crystal dfRES 2400 - 2483.5 MHz — — 73 Hz Maximum frequency devia- tion with 38.4 MHz crystal dfMAX 2400 - 2483.5 MHz — — 1677 kHz 4.1.8 2.4 GHz RF Transceiver Characteristics MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 24

4.1.8.1 RF Transmitter General Characteristics for 2.4 GHz Band Unless otherwise indicated, typical conditions are: T OP = 25 °C, VDD = 3.3 V, DVDD = RFVDD = PAVDD. RFVDD and PAVDD path is Table 4.9. RF Transmitter General Characteristics for 2.4 GHz Band Parameter Symbol Test Condition Min Typ Max Unit Maximum TX power1 POUTMAX 17 dBm-rated part numbers. PAVDD connected directly to VDD2 (MGM12P32) — 17 — dBm 10 dBm-rated part numbers (MGM12P02 & MGM12P22) — 10 — dBm Minimum active TX Power POUTMIN CW -30 — dBm Output power step size POUTSTEP -5 dBm< Output power < 0 dBm — 1 — dB 0 dBm < output power < POUTMAX — 0.5 — dB Output power variation vs supply at POUTMAX POUTVAR_V 1.8 V < VVREGVDD < 3.8 V, PAVDD connected directly to VDD, for output power > 10 dBm. — 5.7 — dB 1.8 V < VVREGVDD < 3.8 V using DC-DC converter — 3.4 — dB Output power variation vs temperature at POUTMAX POUTVAR_T From -40 to +85 °C, PAVDD con- nected to DC-DC output — 1.5 — dB From -40 to +85 °C, PAVDD con- nected to VDD — 1.5 — dB Output power variation vs RF frequency at POUTMAX POUTVAR_F Over RF tuning frequency range — 0.2 — dB RF tuning frequency range FRANGE 2400 — 2483.5 MHz Note: 1. Supported transmit power levels are determined by the ordering part number (OPN). Transmit power ratings for all devices cov- ered in this datasheet can be found in the Max TX Power column of the Ordering Information Table. 2. For Bluetooth, the Maximum TX power on Channel 2456 is limited to +15 dBm to comply with In-band Spurious emissions. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 25

4.1.8.2 RF Receiver General Characteristics for 2.4 GHz Band Unless otherwise indicated, typical conditions are: TOP = 25 °C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4 MHz. RF center frequency 2.45 GHz. Table 4.10. RF Receiver General Characteristics for 2.4 GHz Band Parameter Symbol Test Condition Min Typ Max Unit RF tuning frequency range FRANGE 2400 — 2483.5 MHz Receive mode maximum spurious emission SPURRX 30 MHz to 1 GHz — -57 — dBm

1 GHz to 12 GHz — -47 — dBm

Max spurious emissions dur- ing active receive mode, per FCC Part 15.109(a) SPURRX_FCC 216 MHz to 960 MHz, Conducted Measurement — -55.2 — dBm Above 960 MHz, Conducted Measurement — -47.2 — dBm 4.1.8.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate Unless otherwise indicated, typical conditions are: T = 25 °C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4MHz. RF center frequency 2.45 GHz. Table 4.11. RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 0.1% BER SENS Signal is reference signal1. Using DC-DC converter. (MGM12P02) — -94.4 — dBm With non-ideal signal. Using DC- DC converter. (MGM12P02) — -94.3 — dBm Signal is reference signal.1 Using DC-DC converter. (MGM12P22 & MGM12P32) — -100.3 — dBm With non-ideal signal. Using DC- DC converter. (MGM12P22 & MGM12P32) — -100.1 — dBm Note: 1. Reference signal is defined 2GFSK at -67 dBm, Modulation index = 0.5, BT = 0.5, Bit rate = 1 Mbps, desired data = PRBS9, Packet length = 37 bytes; interferer data = PRBS15; frequency accuracy better than 1 ppm. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 26

4.1.8.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 2 Mbps Data Rate Unless otherwise indicated, typical conditions are: T = 25 °C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4MHz. RF center frequency 2.45 GHz.1 Table 4.12. RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 2 Mbps Data Rate Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 0.1% BER SENS Signal is reference signal1. Using DC-DC converter. — -91 — dBm With non-ideal signal. Using DC- DC converter. (MGM12P02) — -90.8 — dBm Signal is reference signal.1 Using DC-DC converter. (MGM12P22 & MGM12P32) — -97 — dBm With non-ideal signal. Using DC- DC converter. (MGM12P22 & MGM12P32) — -96.7 — dBm Note: 1. Reference signal is defined 2GFSK at -67 dBm, Modulation index = 0.5, BT = 0.5, Bit rate = 2 Mbps, desired data = PRBS9, Packet length = 37 bytes; interferer data = PRBS15; frequency accuracy better than 1 ppm. Unless otherwise indicated, typical conditions are: TOP = 25 °C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4 MHz. RF center frequency 2.45 GHz. Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 1% PER SENS Signal is reference signal.1 Using DC-DC converter. — -102 — dBm Signal is reference signal. Using DC-DC converter. (MGM12P22 & MGM12P32) — -105.7 — dBm Note: bols/s, Packet length = 20 bytes. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 27

4.1.9 Current Consumption

4.1.9.1 Low-Frequency Crystal Oscillator (LFXO)

Table 4.14. Low-Frequency Crystal Oscillator (LFXO) Parameter Symbol Test Condition Min Typ Max Unit Crystal Frequency fLFXO — 32.768 — kHz Crystal Frequency Tolerance -100 +100 ppm

4.1.9.2 High-Frequency Crystal Oscillator (HFXO)

Table 4.15. High-Frequency Crystal Oscillator (HFXO) Parameter Symbol Test Condition Min Typ Max Unit Crystal Frequency fHFXO 38.4 MHz Frequency Tolerance for the crystal FTHFXO -40 — 40 ppm

4.1.9.3 Low-Frequency RC Oscillator (LFRCO)

Table 4.16. Low-Frequency RC Oscillator (LFRCO) Parameter Symbol Test Condition Min Typ Max Unit Oscillation frequency fLFRCO ENVREF1 = 1 31.3 32.768 33.6 kHz ENVREF1 = 0 31.3 32.768 33.4 kHz Startup time tLFRCO — 500 — µs Current consumption 2 ILFRCO ENVREF = 1 in CMU_LFRCOCTRL — 370 — nA ENVREF = 0 in CMU_LFRCOCTRL — 520 — nA Note: 1. In CMU_LFRCOCTRL register. 2. Block is supplied by AVDD if ANASW = 0, or DVDD if ANASW=1 in EMU_PWRCTRL register. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 28

4.1.9.4 High-Frequency RC Oscillator (HFRCO)

Table 4.17. High-Frequency RC Oscillator (HFRCO) Parameter Symbol Test Condition Min Typ Max Unit Frequency accuracy fHFRCO_ACC At production calibrated frequen- cies, across supply voltage and temperature -2.5 — 2.5 % Start-up time tHFRCO fHFRCO ≥ 19 MHz — 300 — ns 4 < fHFRCO < 19 MHz — 1 — µs fHFRCO ≤ 4 MHz — 2.5 — µs Current consumption on all supplies IHFRCO fHFRCO = 38 MHz — 244 265 µA fHFRCO = 32 MHz — 204 222 µA fHFRCO = 26 MHz — 173 188 µA fHFRCO = 19 MHz — 143 156 µA fHFRCO = 16 MHz — 123 136 µA fHFRCO = 13 MHz — 110 124 µA fHFRCO = 7 MHz — 85 94 µA fHFRCO = 4 MHz — 32 37 µA fHFRCO = 2 MHz — 28 34 µA fHFRCO = 1 MHz — 26 31 µA Coarse trim step size (% of period) SSHFRCO_COARS E — 0.8 — % Fine trim step size (% of pe- riod) SSHFRCO_FINE — 0.1 — % Period jitter PJHFRCO — 0.2 — % RMS MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 29

4.1.9.5 Auxiliary High-Frequency RC Oscillator (AUXHFRCO)

Table 4.18. Auxiliary High-Frequency RC Oscillator (AUXHFRCO) Parameter Symbol Test Condition Min Typ Max Unit Frequency accuracy fAUXHFRCO_ACC At production calibrated frequen- cies, across supply voltage and temperature -3 — 3 % Start-up time tAUXHFRCO fAUXHFRCO ≥ 19 MHz — 400 — ns 4 < fAUXHFRCO < 19 MHz — 1.4 — µs fAUXHFRCO ≤ 4 MHz — 2.5 — µs Current consumption on all supplies IAUXHFRCO fAUXHFRCO = 38 MHz — 193 213 µA fAUXHFRCO = 32 MHz — 157 175 µA fAUXHFRCO = 26 MHz — 135 151 µA fAUXHFRCO = 19 MHz — 108 122 µA fAUXHFRCO = 16 MHz — 100 113 µA fAUXHFRCO = 13 MHz — 77 88 µA fAUXHFRCO = 7 MHz — 53 63 µA fAUXHFRCO = 4 MHz — 29 36 µA fAUXHFRCO = 2 MHz — 28 34 µA fAUXHFRCO = 1 MHz — 27 31 µA Coarse trim step size (% of period) SSAUXHFR- CO_COARSE — 0.8 — % Fine trim step size (% of pe- riod) SSAUXHFR- CO_FINE — 0.1 — % Period jitter PJAUXHFRCO — 0.2 — % RMS

4.1.9.6 Ultra-low Frequency RC Oscillator (ULFRCO)

Table 4.19. Ultra-low Frequency RC Oscillator (ULFRCO) Parameter Symbol Test Condition Min Typ Max Unit Oscillation frequency fULFRCO 0.95 1 1.07 kHz MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 30

4.1.10 Flash Memory Characteristics1

Table 4.20. Flash Memory Characteristics1 Parameter Symbol Test Condition Min Typ Max Unit Flash erase cycles before failure ECFLASH 10000 — — cycles Flash data retention RETFLASH 10 — — years Word (32-bit) programming time tW_PROG Burst write, 128 words, average time per word 20 24.4 30 µs Single word 60 68.4 80 µs Page erase time2 tPERASE 20 26.4 35 ms Mass erase time3 tMERASE 20 26.5 35 ms Device erase time4 5 tDERASE — 82 100 ms Erase current6 IERASE Page Erase — — 1.6 mA Write current6 IWRITE — — 3.8 mA Supply voltage during flash erase and write VFLASH 1.62 — 3.6 V Note: 1. Flash data retention information is published in the Quarterly Quality and Reliability Report. 2. From setting the ERASEPAGE bit in MSC_WRITECMD to 1 until the BUSY bit in MSC_STATUS is cleared to 0. Internal setup and hold times for flash control signals are included. 3. Mass erase is issued by the CPU and erases all flash. 4. Device erase is issued over the AAP interface and erases all flash, SRAM, the Lock Bit (LB) page, and the User data page Lock Word (ULW). 5. From setting the DEVICEERASE bit in AAP_CMD to 1 until the ERASEBUSY bit in AAP_STATUS is cleared to 0. Internal setup and hold times for flash control signals are included. 6. Measured at 25 °C. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 31

4.1.11 General-Purpose I/O (GPIO)

Table 4.21. General-Purpose I/O (GPIO) Parameter Symbol Test Condition Min Typ Max Unit Input low voltage1 VIL GPIO pins — — IOVDD*0.3 V RESETn — — AVDD*0.3 V Input high voltage1 VIH GPIO pins IOVDD*0.7 — — V RESETn AVDD*0.7 — — V Output high voltage relative to IOVDD VOH Sourcing 3 mA, IOVDD ≥ 3 V, DRIVESTRENGTH2 = WEAK IOVDD*0.8 — — V Sourcing 1.2 mA, IOVDD ≥ 1.62 DRIVESTRENGTH2 = WEAK IOVDD*0.6 — — V Sourcing 20 mA, IOVDD ≥ 3 V, DRIVESTRENGTH2 = STRONG IOVDD*0.8 — — V Sourcing 8 mA, IOVDD ≥ 1.62 V, DRIVESTRENGTH2 = STRONG IOVDD*0.6 — — V Output low voltage relative to IOVDD VOL Sinking 3 mA, IOVDD ≥ 3 V, DRIVESTRENGTH2 = WEAK — — IOVDD*0.2 V Sinking 1.2 mA, IOVDD ≥ 1.62 V, DRIVESTRENGTH2 = WEAK — — IOVDD*0.4 V Sinking 20 mA, IOVDD ≥ 3 V, DRIVESTRENGTH2 = STRONG — — IOVDD*0.2 V Sinking 8 mA, IOVDD ≥ 1.62 V, DRIVESTRENGTH2 = STRONG — — IOVDD*0.4 V Input leakage current IIOLEAK All GPIO except LFXO pins, GPIO ≤ IOVDD — 0.1 30 nA LFXO Pins, GPIO ≤ IOVDD — 0.1 50 nA Input leakage current on 5VTOL pads above IOVDD I5VTOLLEAK IOVDD < GPIO ≤ IOVDD + 2 V — 3.3 15 µA I/O pin pull-up/pull-down re- sistor3 RPUD 30 40 65 kΩ Pulse width of pulses re- moved by the glitch suppres- sion filter tIOGLITCH 15 25 45 ns MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 32

Parameter Symbol Test Condition Min Typ Max Unit Output fall time, From 70% to 30% of VIO tIOOF CL = 50 pF, DRIVESTRENGTH2 = STRONG, SLEWRATE2 = 0x6 — 1.8 — ns CL = 50 pF, DRIVESTRENGTH2 = WEAK, SLEWRATE2 = 0x6 — 4.5 — ns Output rise time, From 30% to 70% of VIO tIOOR CL = 50 pF, DRIVESTRENGTH2 = STRONG, SLEWRATE = 0x62 — 2.2 — ns CL = 50 pF, DRIVESTRENGTH2 = WEAK, SLEWRATE2 = 0x6 — 7.4 — ns RESETn low time to ensure pin reset TRESET 100 — — ns Note: 1. GPIO input threshold are proportional to the IOVDD supply, except for RESETn which is proportional to AVDD. 2. In GPIO_Pn_CTRL register. 3. GPIO pull-ups are referenced to the IOVDD supply, except for RESETn, which connects to AVDD. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 33

4.1.12 Voltage Monitor (VMON)

Table 4.22. Voltage Monitor (VMON) Parameter Symbol Test Condition Min Typ Max Unit Supply current (including I_SENSE) IVMON In EM0 or EM1, 1 active channel — 6.3 10 µA In EM0 or EM1, All channels ac- tive — 12.5 17 µA In EM2, EM3 or EM4, 1 channel active and above threshold — 62 — nA In EM2, EM3 or EM4, 1 channel active and below threshold — 62 — nA In EM2, EM3 or EM4, All channels active and above threshold — 99 — nA In EM2, EM3 or EM4, All channels active and below threshold — 99 — nA Loading of monitored supply ISENSE In EM0 or EM1 — 2 — µA In EM2, EM3 or EM4 — 2 — nA Threshold range VVMON_RANGE 1.62 — 3.4 V Threshold step size NVMON_STESP Coarse — 200 — mV Fine — 20 — mV Response time tVMON_RES Supply drops at 1V/µs rate — 460 — ns Hysteresis VVMON_HYST — 26 — mV MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 34

4.1.13 Analog to Digital Converter (ADC)

Specified at 1 Msps, ADCCLK = 16 MHz, BIASPROG = 0, GPBIASACC = 0, unless otherwise indicated. Table 4.23. Analog to Digital Converter (ADC) Parameter Symbol Test Condition Min Typ Max Unit Resolution VRESOLUTION 6 — 12 Bits Input voltage range1 VADCIN Single ended — — VFS V Differential -VFS/2 — VFS/2 V Input range of external refer- ence voltage, single ended and differential VADCREFIN_P 1 — VAVDD V Power supply rejection2 PSRRADC At DC — 80 — dB Analog input common mode rejection ratio CMRRADC At DC — 80 — dB Current from all supplies, us- ing internal reference buffer. Continuous operation. WAR- MUPMODE3 = KEEPADC- WARM IADC_CONTINU- OUS_LP

1 Msps / 16 MHz ADCCLK, BIA-

SPROG = 0, GPBIASACC = 1 4 — 270 315 µA 250 ksps / 4 MHz ADCCLK, BIA- SPROG = 6, GPBIASACC = 1 4 — 125 — µA 62.5 ksps / 1 MHz ADCCLK, BIA- SPROG = 15, GPBIASACC = 1 4 — 80 — µA Current from all supplies, us- ing internal reference buffer. Duty-cycled operation. WAR- MUPMODE3 = NORMAL IADC_NORMAL_LP 35 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 1 4 — 45 — µA 5 ksps / 16 MHz ADCCLK BIA- SPROG = 0, GPBIASACC = 1 4 — 8 — µA Current from all supplies, us- ing internal reference buffer. Duty-cycled operation. AWARMUPMODE3 = KEEP- INSTANDBY or KEEPIN- SLOWACC IADC_STAND- BY_LP 125 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 1 4 — 105 — µA 35 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 1 4 — 70 — µA Current from all supplies, us- ing internal reference buffer. Continuous operation. WAR- MUPMODE3 = KEEPADC- WARM IADC_CONTINU- OUS_HP SPROG = 0, GPBIASACC = 0 4 — 325 — µA 250 ksps / 4 MHz ADCCLK, BIA- SPROG = 6, GPBIASACC = 0 4 — 175 — µA 62.5 ksps / 1 MHz ADCCLK, BIA- SPROG = 15, GPBIASACC = 0 4 — 125 — µA Current from all supplies, us- ing internal reference buffer. Duty-cycled operation. WAR- MUPMODE3 = NORMAL IADC_NORMAL_HP 35 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 0 4 — 85 — µA 5 ksps / 16 MHz ADCCLK BIA- SPROG = 0, GPBIASACC = 0 4 — 16 — µA Current from all supplies, us- ing internal reference buffer. Duty-cycled operation. AWARMUPMODE3 = KEEP- INSTANDBY or KEEPIN- SLOWACC IADC_STAND- BY_HP 125 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 0 4 — 160 — µA 35 ksps / 16 MHz ADCCLK, BIA- SPROG = 0, GPBIASACC = 0 4 — 125 — µA Current from HFPERCLK IADC_CLK HFPERCLK = 16 MHz — 160 — µA MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 35

Parameter Symbol Test Condition Min Typ Max Unit ADC clock frequency fADCCLK — — 16 MHz Throughput rate fADCRATE — — 1 Msps Conversion time5 tADCCONV 6 bit — 7 — cycles 8 bit — 9 — cycles 12 bit — 13 — cycles Startup time of reference generator and ADC core tADCSTART WARMUPMODE3 = NORMAL — — 5 µs WARMUPMODE3 = KEEPIN- STANDBY — — 2 µs WARMUPMODE3 = KEEPINSLO- WACC — — 1 µs SNDR at 1Msps and fIN = 10kHz SNDRADC Internal reference6, differential measurement 58 67 — dB External reference7, differential measurement — 68 — dB Spurious-free dynamic range (SFDR) SFDRADC 1 MSamples/s, 10 kHz full-scale sine wave — 75 — dB Differential non-linearity (DNL) DNLADC 12 bit resolution, No missing co- des -1 — 2 LSB Integral non-linearity (INL), End point method INLADC 12 bit resolution -6 — 6 LSB Offset error VADCOFFSETERR -3 0 3 LSB Gain error in ADC VADCGAIN Using internal reference — -0.2 3.5 % Using external reference — -1 — % Temperature sensor slope VTS_SLOPE — -1.84 — mV/°C Note: 1. The absolute voltage allowed at any ADC input is dictated by the power rail supplied to on-chip circuitry, and may be lower than the effective full scale voltage. All ADC inputs are limited to the ADC supply (AVDD or DVDD depending on EMU_PWRCTRL_ANASW). Any ADC input routed through the APORT will further be limited by the IOVDD supply to the pin. 2. PSRR is referenced to AVDD when ANASW=0 and to DVDD when ANASW=1 in EMU_PWRCTRL. 3. In ADCn_CTRL register. 4. In ADCn_BIASPROG register. 5. Derived from ADCCLK. 6. Internal reference option used corresponds to selection 2V5 in the SINGLECTRL_REF or SCANCTRL_REF register field. The differential input range with this configuration is ± 1.25 V. Typical value is characterized using full-scale sine wave input. Minimum value is production-tested using sine wave input at 1.5 dB lower than full scale. 7. External reference is 1.25 V applied externally to ADCnEXTREFP, with the selection CONF in the SINGLECTRL_REF or SCANCTRL_REF register field and VREFP in the SINGLECTRLX_VREFSEL or SCANCTRLX_VREFSEL field. The differential input range with this configuration is ± 1.25 V. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 36

4.1.14 Analog Comparator (ACMP)

Table 4.24. Analog Comparator (ACMP) Parameter Symbol Test Condition Min Typ Max Unit Input voltage range VACMPIN ACMPVDD = ACMPn_CTRL_PWRSEL 1 — — VACMPVDD V Supply voltage VACMPVDD BIASPROG2 ≤ 0x10 or FULL- BIAS2 = 0 1.8 — VVREGVDD_ MAX V 0x10 < BIASPROG2 ≤ 0x20 and FULLBIAS2 = 1 2.1 — VVREGVDD_ MAX V Active current not including voltage reference3 IACMP BIASPROG2 = 0x10, FULLBIAS2 = 0 — 306 — nA BIASPROG2 = 0x02, FULLBIAS2 = 1 — 6.5 — µA BIASPROG2 = 0x20, FULLBIAS2 = 1 — 75 92 µA Current consumption of inter- nal voltage reference3 IACMPREF VLP selected as input using 2.5 V Reference / 4 (0.625 V) — 50 — nA VLP selected as input using VDD — 20 — nA VBDIV selected as input using

1.25 V reference / 1

— 4.1 — µA VADIV selected as input using VDD/1 — 2.4 — µA Hysteresis (VCM = 1.25 V, BIASPROG2 = 0x10, FULL- BIAS2 = 1) VACMPHYST HYSTSEL4 = HYST0 -3 0 3 mV HYSTSEL4 = HYST1 5 18 27 mV HYSTSEL4 = HYST2 12 33 50 mV HYSTSEL4 = HYST3 17 46 67 mV HYSTSEL4 = HYST4 23 57 86 mV HYSTSEL4 = HYST5 26 68 104 mV HYSTSEL4 = HYST6 30 79 130 mV HYSTSEL4 = HYST7 34 90 150 mV HYSTSEL4 = HYST8 -3 0 3 mV HYSTSEL4 = HYST9 -27 -18 -5 mV HYSTSEL4 = HYST10 -50 -33 -12 mV HYSTSEL4 = HYST11 -67 -45 -17 mV HYSTSEL4 = HYST12 -86 -57 -23 mV HYSTSEL4 = HYST13 -104 -67 -26 mV HYSTSEL4 = HYST14 -130 -78 -30 mV HYSTSEL4 = HYST15 -155 -88 -34 mV MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 37

Parameter Symbol Test Condition Min Typ Max Unit Comparator delay5 tACMPDELAY BIASPROG2 = 0x10, FULLBIAS2 = 0 — 3.7 — µs BIASPROG2 = 0x02, FULLBIAS2 = 1 — 360 — ns BIASPROG2 = 0x20, FULLBIAS2 = 1 — 35 — ns Offset voltage VACMPOFFSET BIASPROG2 =0x10, FULLBIAS2 = 1 -35 — 35 mV Reference voltage VACMPREF Internal 1.25 V reference 1 1.25 1.47 V Internal 2.5 V reference 2 2.5 2.8 V Capacitive sense internal re- sistance RCSRES CSRESSEL6 = 0 — infinite — kΩ CSRESSEL6 = 1 — 15 — kΩ CSRESSEL6 = 2 — 27 — kΩ CSRESSEL6 = 3 — 39 — kΩ CSRESSEL6 = 4 — 51 — kΩ CSRESSEL6 = 5 — 100 — kΩ CSRESSEL6 = 6 — 162 — kΩ CSRESSEL6 = 7 — 235 — kΩ Note: 1. ACMPVDD is a supply chosen by the setting in ACMPn_CTRL_PWRSEL and may be IOVDD, AVDD or DVDD. 2. In ACMPn_CTRL register. 3. The total ACMP current is the sum of the contributions from the ACMP and its internal voltage reference. IACMPTOTAL = IACMP + IACMPREF. 4. In ACMPn_HYSTERESIS registers. 5. ± 100 mV differential drive. 6. In ACMPn_INPUTSEL register. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 38

4.1.15 Digital to Analog Converter (VDAC)

DRIVESTRENGTH = 2 unless otherwise specified. Primary VDAC output. Table 4.25. Digital to Analog Converter (VDAC) Parameter Symbol Test Condition Min Typ Max Unit Output voltage VDACOUT Single-Ended 0 — VVREF V Differential1 -VVREF — VVREF V Current consumption includ- ing references (2 channels)2 IDAC 500 ksps, 12-bit, DRIVES- TRENGTH = 2, REFSEL = 4 — 396 — µA 44.1 ksps, 12-bit, DRIVES- TRENGTH = 1, REFSEL = 4 — 72 — µA

200 Hz refresh rate, 12-bit Sam-

ple-Off mode in EM2, DRIVES- TRENGTH = 2, REFSEL = 4, SETTLETIME = 0x02, WARMUP- TIME = 0x0A — 1.2 — µA Current from HFPERCLK3 IDAC_CLK — 5.8 — µA/MHz Sample rate SRDAC — — 500 ksps DAC clock frequency fDAC — — 1 MHz Conversion time tDACCONV fDAC = 1MHz 2 — — µs Settling time tDACSETTLE 50% fs step settling to 5 LSB — 2.5 — µs Startup time tDACSTARTUP Enable to 90% fs output, settling to 10 LSB — — 12 µs Output impedance ROUT DRIVESTRENGTH = 2, 0.4 V ≤ VOUT ≤ VOPA - 0.4 V, -8 mA < IOUT < 8 mA, Full supply range — 2 — Ω DRIVESTRENGTH = 0 or 1, 0.4 V ≤ VOUT ≤ VOPA - 0.4 V, -400 µA < IOUT < 400 µA, Full supply range — 2 — Ω DRIVESTRENGTH = 2, 0.1 V ≤ VOUT ≤ VOPA - 0.1 V, -2 mA < IOUT < 2 mA, Full supply range — 2 — Ω DRIVESTRENGTH = 0 or 1, 0.1 V ≤ VOUT ≤ VOPA - 0.1 V, -100 µA < IOUT < 100 µA, Full supply range — 2 — Ω Power supply rejection ratio4 PSRR Vout = 50% fs. DC — 65.5 — dB MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 39

Parameter Symbol Test Condition Min Typ Max Unit Signal to noise and distortion ratio (1 kHz sine wave), Noise band limited to 250 kHz SNDRDAC 500 ksps, single-ended, internal 1.25V reference — 60.4 — dB 500 ksps, single-ended, internal 2.5V reference — 61.6 — dB 500 ksps, single-ended, 3.3V VDD reference — 64.0 — dB 500 ksps, differential, internal 1.25V reference — 63.3 — dB 500 ksps, differential, internal 2.5V reference — 64.4 — dB 500 ksps, differential, 3.3V VDD reference — 65.8 — dB Signal to noise and distortion ratio (1 kHz sine wave), Noise band limited to 22 kHz SNDRDAC_BAND 500 ksps, single-ended, internal 1.25V reference — 65.3 — dB 500 ksps, single-ended, internal 2.5V reference — 66.7 — dB 500 ksps, single-ended, 3.3V VDD reference — 70.0 — dB 500 ksps, differential, internal 1.25V reference — 67.8 — dB 500 ksps, differential, internal 2.5V reference — 69.0 — dB 500 ksps, differential, 3.3V VDD reference — 68.5 — dB Total harmonic distortion THD — 70.2 — dB Differential non-linearity5 DNLDAC -0.99 — 1 LSB Intergral non-linearity INLDAC -4 — 4 LSB Offset error6 VOFFSET T = 25 °C -8 — 8 mV Across operating temperature range -25 — 25 mV Gain error6 VGAIN T = 25 °C, Low-noise internal ref- erence (REFSEL = 1V25LN or 2V5LN) -2.5 — 2.5 % T = 25 °C, Internal reference (RE- FSEL = 1V25 or 2V5) -5 — 5 % T = 25 °C, External reference (REFSEL = VDD or EXT) -1.8 — 1.8 % Across operating temperature range, Low-noise internal refer- ence (REFSEL = 1V25LN or 2V5LN) -3.5 — 3.5 % Across operating temperature range, Internal reference (RE- FSEL = 1V25 or 2V5) -7.5 — 7.5 % Across operating temperature range, External reference (RE- FSEL = VDD or EXT) -2.0 — 2.0 % MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 40

Parameter Symbol Test Condition Min Typ Max Unit External load capactiance, OUTSCALE=0 CLOAD — — 75 pF Note: 1. In differential mode, the output is defined as the difference between two single-ended outputs. Absolute voltage on each output is limited to the single-ended range. 2. Supply current specifications are for VDAC circuitry operating with static output only and do not include current required to drive the load. 3. Current from HFPERCLK is dependent on HFPERCLK frequency. This current contributes to the total supply current used when the clock to the DAC peripheral is enabled in the CMU. 4. PSRR calculated as 20 * log10(ΔVDD / ΔVOUT), VDAC output at 90% of full scale 5. Entire range is monotonic and has no missing codes. 6. Gain is calculated by measuring the slope from 10% to 90% of full scale. Offset is calculated by comparing actual VDAC output at 10% of full scale to ideal VDAC output at 10% of full scale with the measured gain. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 41

4.1.16 Current Digital to Analog Converter (IDAC)

Table 4.26. Current Digital to Analog Converter (IDAC) Parameter Symbol Test Condition Min Typ Max Unit Number of ranges NIDAC_RANGES — 4 — ranges Output current IIDAC_OUT RANGESEL1 = RANGE0 0.05 — 1.6 µA RANGESEL1 = RANGE1 1.6 — 4.7 µA RANGESEL1 = RANGE2 0.5 — 16 µA RANGESEL1 = RANGE3 2 — 64 µA Linear steps within each range NIDAC_STEPS — 32 — steps Step size SSIDAC RANGESEL1 = RANGE0 — 50 — nA RANGESEL1 = RANGE1 — 100 — nA RANGESEL1 = RANGE2 — 500 — nA RANGESEL1 = RANGE3 — 2 — µA Total accuracy, STEPSEL1 = 0x10 ACCIDAC EM0 or EM1, AVDD=3.3 V, T = 25 -3 — 3 % EM0 or EM1, Across operating temperature range -18 — 22 % EM2 or EM3, Source mode, RAN- GESEL1 = RANGE0, AVDD=3.3 V, T = 25 °C — -2 — % EM2 or EM3, Source mode, RAN- GESEL1 = RANGE1, AVDD=3.3 V, T = 25 °C — -1.7 — % EM2 or EM3, Source mode, RAN- GESEL1 = RANGE2, AVDD=3.3 V, T = 25 °C — -0.8 — % EM2 or EM3, Source mode, RAN- GESEL1 = RANGE3, AVDD=3.3 V, T = 25 °C — -0.5 — % EM2 or EM3, Sink mode, RAN- GESEL1 = RANGE0, AVDD=3.3 V, T = 25 °C — -0.7 — % EM2 or EM3, Sink mode, RAN- GESEL1 = RANGE1, AVDD=3.3 V, T = 25 °C — -0.6 — % EM2 or EM3, Sink mode, RAN- GESEL1 = RANGE2, AVDD=3.3 V, T = 25 °C — -0.5 — % EM2 or EM3, Sink mode, RAN- GESEL1 = RANGE3, AVDD=3.3 V, T = 25 °C — -0.5 — % Start up time tIDAC_SU Output within 1% of steady state value — 5 — µs MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 42

Parameter Symbol Test Condition Min Typ Max Unit Settling time, (output settled within 1% of steady state val- ue), tIDAC_SETTLE Range setting is changed — 5 — µs Step value is changed — 1 — µs Current consumption2 IIDAC EM0 or EM1 Source mode, ex- cluding output current, Across op- erating temperature range — 11 18 µA EM0 or EM1 Sink mode, exclud- ing output current, Across operat- ing temperature range — 13 21 µA EM2 or EM3 Source mode, ex- cluding output current, T = 25 °C — 0.023 — µA EM2 or EM3 Sink mode, exclud- ing output current, T = 25 °C — 0.041 — µA EM2 or EM3 Source mode, ex- cluding output current, T ≥ 85 °C — 11 — µA EM2 or EM3 Sink mode, exclud- ing output current, T ≥ 85 °C — 13 — µA Output voltage compliance in source mode, source current change relative to current sourced at 0 V ICOMP_SRC RANGESEL1 = RANGE0, output voltage = min(VIOVDD, VAVDD2-100 mV) — 0.11 — % RANGESEL1 = RANGE1, output voltage = min(VIOVDD, VAVDD2-100 mV) — 0.06 — % RANGESEL1 = RANGE2, output voltage = min(VIOVDD, VAVDD2-150 mV) — 0.04 — % RANGESEL1 = RANGE3, output voltage = min(VIOVDD, VAVDD2-250 mV) — 0.03 — % Output voltage compliance in sink mode, sink current change relative to current sunk at IOVDD ICOMP_SINK RANGESEL1 = RANGE0, output voltage = 100 mV — 0.12 — % RANGESEL1 = RANGE1, output voltage = 100 mV — 0.05 — % RANGESEL1 = RANGE2, output voltage = 150 mV — 0.04 — % RANGESEL1 = RANGE3, output voltage = 250 mV — 0.03 — % Note: 1. In IDAC_CURPROG register. 2. The IDAC is supplied by either AVDD, DVDD, or IOVDD based on the setting of ANASW in the EMU_PWRCTRL register and PWRSEL in the IDAC_CTRL register. Setting PWRSEL to 1 selects IOVDD. With PWRSEL cleared to 0, ANASW selects be- tween AVDD (0) and DVDD (1). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 43

4.1.17 Capacitive Sense (CSEN)

Table 4.27. Capacitive Sense (CSEN) Parameter Symbol Test Condition Min Typ Max Unit Single conversion time (1x accumulation) tCNV 12-bit SAR Conversions — 20.2 — µs 16-bit SAR Conversions — 26.4 — µs Delta Modulation Conversion (sin- gle comparison) — 1.55 — µs Maximum external capacitive load CEXTMAX IREFPROG=7 (Gain = 1x), includ- ing routing parasitics — 68 — pF IREFPROG=0 (Gain = 10x), in- cluding routing parasitics — 680 — pF Maximum external series im- pedance REXTMAX — 1 — kΩ Supply current, EM2 bonded conversions, WARMUP- MODE=NORMAL, WAR- MUPCNT=0 ICSEN_BOND 12-bit SAR conversions, 20 ms conversion rate, IREFPROG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 — 326 — nA Delta Modulation conversions, 20 ms conversion rate, IRE- FPROG=7 (Gain = 1x), 10 chan- nels bonded (total capacitance of 330 pF)1 — 226 — nA 12-bit SAR conversions, 200 ms conversion rate, IREFPROG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 — 33 — nA Delta Modulation conversions, 200 ms conversion rate, IRE- FPROG=7 (Gain = 1x), 10 chan- nels bonded (total capacitance of 330 pF)1 — 25 — nA Supply current, EM2 scan conversions, WARMUP- MODE=NORMAL, WAR- MUPCNT=0 ICSEN_EM2 12-bit SAR conversions, 20 ms scan rate, IREFPROG=0 (Gain = 10x), 8 samples per scan1 — 690 — nA Delta Modulation conversions, 20 ms scan rate, 8 comparisons per sample (DMCR = 1, DMR = 2), IREFPROG=0 (Gain = 10x), 8 samples per scan1 — 515 — nA 12-bit SAR conversions, 200 ms scan rate, IREFPROG=0 (Gain = 10x), 8 samples per scan1 — 79 — nA Delta Modulation conversions, 200 ms scan rate, 8 comparisons per sample (DMCR = 1, DMR = 2), IREFPROG=0 (Gain = 10x), 8 samples per scan1 — 57 — nA MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 44

Parameter Symbol Test Condition Min Typ Max Unit Supply current, continuous conversions, WARMUP- MODE=KEEPCSENWARM ICSEN_ACTIVE SAR or Delta Modulation conver- sions of 33 pF capacitor, IRE- FPROG=0 (Gain = 10x), always on — 90.5 — µA HFPERCLK supply current ICSEN_HFPERCLK Current contribution from HFPERCLK when clock to CSEN block is enabled. — 2.25 — µA/MHz Note: 1. Current is specified with a total external capacitance of 33 pF per channel. Average current is dependent on how long the periph- eral is actively sampling channels within the scan period, and scales with the number of samples acquired. Supply current for a specific application can be estimated by multiplying the current per sample by the total number of samples per period (total_cur- rent = single_sample_current * (number_of_channels * accumulation)). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 45

4.1.18 Operational Amplifier (OPAMP)

Unless otherwise indicated, specified conditions are: Non-inverting input configuration, VDD = 3.3 V, DRIVESTRENGTH = 2, MAIN- OUTEN = 1, CLOAD = 75 pF with OUTSCALE = 0, or CLOAD = 37.5 pF with OUTSCALE = 1. Unit gain buffer and 3X-gain connection as specified in table footnotes1 2. Table 4.28. Operational Amplifier (OPAMP) Parameter Symbol Test Condition Min Typ Max Unit Supply voltage (from AVDD) VOPA HCMDIS = 0, Rail-to-rail input range 2 — 3.8 V HCMDIS = 1 1.62 — 3.8 V Input voltage VIN HCMDIS = 0, Rail-to-rail input range VVSS — VOPA V HCMDIS = 1 VVSS — VOPA-1.2 V Input impedance RIN 100 — — MΩ Output voltage VOUT VVSS — VOPA V Load capacitance3 CLOAD OUTSCALE = 0 — — 75 pF OUTSCALE = 1 — — 37.5 pF Output impedance ROUT DRIVESTRENGTH = 2 or 3, 0.4 V ≤ VOUT ≤ VOPA - 0.4 V, -8 mA < IOUT < 8 mA, Buffer connection, Full supply range — 0.25 — Ω DRIVESTRENGTH = 0 or 1, 0.4 V ≤ VOUT ≤ VOPA - 0.4 V, -400 µA < IOUT < 400 µA, Buffer connection, Full supply range — 0.6 — Ω DRIVESTRENGTH = 2 or 3, 0.1 V ≤ VOUT ≤ VOPA - 0.1 V, -2 mA < IOUT < 2 mA, Buffer connection, Full supply range — 0.4 — Ω DRIVESTRENGTH = 0 or 1, 0.1 V ≤ VOUT ≤ VOPA - 0.1 V, -100 µA < IOUT < 100 µA, Buffer connection, Full supply range — 1 — Ω Internal closed-loop gain GCL Buffer connection 0.99 1 1.01 - 3x Gain connection 2.93 2.99 3.05 - 16x Gain connection 15.07 15.7 16.33 - Active current4 IOPA DRIVESTRENGTH = 3, OUT- SCALE = 0 — 580 — µA DRIVESTRENGTH = 2, OUT- SCALE = 0 — 176 — µA DRIVESTRENGTH = 1, OUT- SCALE = 0 — 13 — µA DRIVESTRENGTH = 0, OUT- SCALE = 0 — 4.7 — µA MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 46

Parameter Symbol Test Condition Min Typ Max Unit Open-loop gain GOL DRIVESTRENGTH = 3 — 135 — dB DRIVESTRENGTH = 2 — 137 — dB DRIVESTRENGTH = 1 — 121 — dB DRIVESTRENGTH = 0 — 109 — dB Loop unit-gain frequency5 UGF DRIVESTRENGTH = 3, Buffer connection — 3.38 — MHz DRIVESTRENGTH = 2, Buffer connection — 0.9 — MHz DRIVESTRENGTH = 1, Buffer connection — 132 — kHz DRIVESTRENGTH = 0, Buffer connection — 34 — kHz DRIVESTRENGTH = 3, 3x Gain connection — 2.57 — MHz DRIVESTRENGTH = 2, 3x Gain connection — 0.71 — MHz DRIVESTRENGTH = 1, 3x Gain connection — 113 — kHz DRIVESTRENGTH = 0, 3x Gain connection — 28 — kHz Phase margin PM DRIVESTRENGTH = 3, Buffer connection — 67 — ° DRIVESTRENGTH = 2, Buffer connection — 69 — ° DRIVESTRENGTH = 1, Buffer connection — 63 — ° DRIVESTRENGTH = 0, Buffer connection — 68 — ° Output voltage noise NOUT DRIVESTRENGTH = 3, Buffer connection, 10 Hz - 10 MHz — 146 — µVrms DRIVESTRENGTH = 2, Buffer connection, 10 Hz - 10 MHz — 163 — µVrms DRIVESTRENGTH = 1, Buffer connection, 10 Hz - 1 MHz — 170 — µVrms DRIVESTRENGTH = 0, Buffer connection, 10 Hz - 1 MHz — 176 — µVrms DRIVESTRENGTH = 3, 3x Gain connection, 10 Hz - 10 MHz — 313 — µVrms DRIVESTRENGTH = 2, 3x Gain connection, 10 Hz - 10 MHz — 271 — µVrms DRIVESTRENGTH = 1, 3x Gain connection, 10 Hz - 1 MHz — 247 — µVrms DRIVESTRENGTH = 0, 3x Gain connection, 10 Hz - 1 MHz — 245 — µVrms MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 47

Parameter Symbol Test Condition Min Typ Max Unit Slew rate6 SR DRIVESTRENGTH = 3, INCBW=17 — 4.7 — V/µs DRIVESTRENGTH = 3, INCBW=0 — 1.5 — V/µs DRIVESTRENGTH = 2, INCBW=17 — 1.27 — V/µs DRIVESTRENGTH = 2, INCBW=0 — 0.42 — V/µs DRIVESTRENGTH = 1, INCBW=17 — 0.17 — V/µs DRIVESTRENGTH = 1, INCBW=0 — 0.058 — V/µs DRIVESTRENGTH = 0, INCBW=17 — 0.044 — V/µs DRIVESTRENGTH = 0, INCBW=0 — 0.015 — V/µs Startup time8 TSTART DRIVESTRENGTH = 2 — — 12 µs Input offset voltage VOSI DRIVESTRENGTH = 2 or 3, T = 25 °C -2 — 2 mV DRIVESTRENGTH = 1 or 0, T = 25 °C -2 — 2 mV DRIVESTRENGTH = 2 or 3, across operating temperature range -12 — 12 mV DRIVESTRENGTH = 1 or 0, across operating temperature range -30 — 30 mV DC power supply rejection ratio9 PSRRDC Input referred — 70 — dB DC common-mode rejection ratio9 CMRRDC Input referred — 70 — dB Total harmonic distortion THDOPA DRIVESTRENGTH = 2, 3x Gain connection, 1 kHz, VOUT = 0.1 V to VOPA - 0.1 V — 90 — dB DRIVESTRENGTH = 0, 3x Gain connection, 0.1 kHz, VOUT = 0.1 V to VOPA - 0.1 V — 90 — dB MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 48

Parameter Symbol Test Condition Min Typ Max Unit Note: 1. Specified configuration for Unit gain buffer configuration is: INCBW = 0, HCMDIS = 0, RESINSEL = DISABLE. VINPUT = 0.5 V, VOUTPUT = 0.5 V. 2. Specified configuration for 3X-Gain configuration is: INCBW = 1, HCMDIS = 1, RESINSEL = VSS, VINPUT = 0.5 V, VOUTPUT = 1.5 V. Nominal voltage gain is 3. 3. If the maximum CLOAD is exceeded, an isolation resistor is required for stability. See AN0038 for more information. 4. Current into the load resistor is excluded. When the OPAMP is connected with closed-loop gain > 1, there will be extra current to drive the resistor feedback network. The internal resistor feedback network has total resistance of 143.5 kOhm, which will cause another ~10 µA current when the OPAMP drives 1.5 V between output and ground. 5. In unit gain connection, UGF is the gain-bandwidth product of the OPAMP. In 3x Gain connection, UGF is the gain-bandwidth product of the OPAMP and 1/3 attenuation of the feedback network. 6. Step between 0.2V and VOPA-0.2V, 10%-90% rising/falling range. 7. When INCBW is set to 1 the OPAMP bandwidth is increased. This is allowed only when the non-inverting close-loop gain is ≥ 3, or the OPAMP may not be stable. 8. From enable to output settled. In sample-and-off mode, RC network after OPAMP will contribute extra delay. Settling error < 1mV. 9. When HCMDIS=1 and input common mode transitions the region from VOPA-1.4V to VOPA-1V, input offset will change. PSRR and CMRR specifications do not apply to this transition region.

4.1.19 Pulse Counter (PCNT)

Table 4.29. Pulse Counter (PCNT) Parameter Symbol Test Condition Min Typ Max Unit Input frequency FIN Asynchronous Single and Quad- rature Modes — — 20 MHz Sampled Modes with Debounce filter set to 0. — — 8 kHz

4.1.20 Analog Port (APORT)

Table 4.30. Analog Port (APORT) Parameter Symbol Test Condition Min Typ Max Unit Supply current1 2 IAPORT Operation in EM0/EM1 — 7 — µA Operation in EM2/EM3 — 67 — nA Note: 1. Supply current increase that occurs when an analog peripheral requests access to APORT. This current is not included in repor- ted peripheral currents. Additional peripherals requesting access to APORT do not incur further current. 2. Specified current is for continuous APORT operation. In applications where the APORT is not requested continuously (e.g. peri- odic ACMP requests from LESENSE in EM2), the average current requirements can be estimated by mutiplying the duty cycle of the requests by the specified continuous current number. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 49

4.1.21 I2C

4.1.21.1 I2C Standard-mode (Sm)1

Table 4.31. I2C Standard-mode (Sm)1 Parameter Symbol Test Condition Min Typ Max Unit SCL clock frequency2 fSCL 0 — 100 kHz SCL clock low time tLOW 4.7 — — µs SCL clock high time tHIGH 4 — — µs SDA set-up time tSU_DAT 250 — — ns SDA hold time3 tHD_DAT 100 — 3450 ns Repeated START condition set-up time tSU_STA 4.7 — — µs (Repeated) START condition hold time tHD_STA 4 — — µs STOP condition set-up time tSU_STO 4 — — µs Bus free time between a STOP and START condition tBUF 4.7 — — µs Note: 1. For CLHR set to 0 in the I2Cn_CTRL register. 2. For the minimum HFPERCLK frequency required in Standard-mode, refer to the I2C chapter in the reference manual. 3. The maximum SDA hold time (tHD_DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 50

4.1.21.2 I2C Fast-mode (Fm)1

Table 4.32. I2C Fast-mode (Fm)1 Parameter Symbol Test Condition Min Typ Max Unit SCL clock frequency2 fSCL 0 — 400 kHz SCL clock low time tLOW 1.3 — — µs SCL clock high time tHIGH 0.6 — — µs SDA set-up time tSU_DAT 100 — — ns SDA hold time3 tHD_DAT 100 — 900 ns Repeated START condition set-up time tSU_STA 0.6 — — µs (Repeated) START condition hold time tHD_STA 0.6 — — µs STOP condition set-up time tSU_STO 0.6 — — µs Bus free time between a STOP and START condition tBUF 1.3 — — µs Note: 1. For CLHR set to 1 in the I2Cn_CTRL register. 2. For the minimum HFPERCLK frequency required in Fast-mode, refer to the I2C chapter in the reference manual. 3. The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 51

4.1.21.3 I2C Fast-mode Plus (Fm+)1

Table 4.33. I2C Fast-mode Plus (Fm+)1 Parameter Symbol Test Condition Min Typ Max Unit SCL clock frequency2 fSCL 0 — 1000 kHz SCL clock low time tLOW 0.5 — — µs SCL clock high time tHIGH 0.26 — — µs SDA set-up time tSU_DAT 50 — — ns SDA hold time tHD_DAT 100 — — ns Repeated START condition set-up time tSU_STA 0.26 — — µs (Repeated) START condition hold time tHD_STA 0.26 — — µs STOP condition set-up time tSU_STO 0.26 — — µs Bus free time between a STOP and START condition tBUF 0.5 — — µs Note: 1. For CLHR set to 0 or 1 in the I2Cn_CTRL register. 2. For the minimum HFPERCLK frequency required in Fast-mode Plus, refer to the I2C chapter in the reference manual. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 52

4.1.22 USART SPI

Table 4.34. SPI Master Timing Parameter Symbol Test Condition Min Typ Max Unit SCLK period 1 2 3 tSCLK 2 * tHFPERCLK — — ns CS to MOSI 1 2 tCS_MO -14.5 — 13.5 ns SCLK to MOSI 1 2 tSCLK_MO -8.5 — 8 ns MISO setup time 1 2 tSU_MI IOVDD = 1.62 V 92 — — ns IOVDD = 3.0 V 42 — — ns MISO hold time 1 2 tH_MI -10 — — ns Note: 1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0). 2. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD). 3. tHFPERCLK is one period of the selected HFPERCLK. CS SCLK CLKPOL = 0 MOSI MISO tCS_MO tH_MItSU_MI tSCKL_MO tSCLK SCLK CLKPOL = 1 Figure 4.1. SPI Master Timing Diagram (SMSDELAY = 0) MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 53

CLKPOL = 0 MOSI MISO tH_MItSU_MI tSCLK_MO tSCLK SCLK CLKPOL = 1 tCS_MO Figure 4.2. SPI Master Timing Diagram (SMSDELAY = 1) MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 54

Table 4.35. SPI Slave Timing Parameter Symbol Test Condition Min Typ Max Unit SCLK period 1 2 3 tSCLK 6 * tHFPERCLK — — ns SCLK high time1 2 3 tSCLK_HI 2.5 * tHFPERCLK — — ns SCLK low time1 2 3 tSCLK_LO 2.5 * tHFPERCLK — — ns CS active to MISO 1 2 tCS_ACT_MI 4 — 70 ns CS disable to MISO 1 2 tCS_DIS_MI 4 — 50 ns MOSI setup time 1 2 tSU_MO 8 — — ns MOSI hold time 1 2 3 tH_MO 7 — — ns SCLK to MISO 1 2 3 tSCLK_MI 10 + 1.5 * tHFPERCLK — 65 + 2.5 * tHFPERCLK ns Note: 1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0). 2. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD). 3. tHFPERCLK is one period of the selected HFPERCLK. CS SCLK CLKPOL = 0 MOSI MISO tCS_ACT_MI tSCLK_HI tSCLK tSU_MO tH_MO tSCLK_MI tCS_DIS_MI tSCLK_LO SCLK CLKPOL = 1 Figure 4.3. SPI Slave Timing Diagram MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.5 | 55

  1. Typical Connection Diagrams

5.1 Network Co-Processor (NCP) Application with UART Host

The MGM12P can be controlled over the UART interface as a peripheral to an external host processor. Typical power supply, program- ming/debug, and host interface connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.1. Connection Diagram: UART NCP Configuration

5.2 Network Co-Processor (NCP) Application with SPI Host

The MGM12P can be controlled over the SPI interface as a peripheral to an external host processor. Typical power supply, program- ming/debug and host interface connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.2. Connection Diagram: SPI NCP Configuration MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Typical Connection Diagrams silabs.com | Building a more connected world. Rev. 1.5 | 56

5.3 SoC Application

The MGM12P can be used in a standalone SoC configuration with no external host processor. Typical power supply and programming/ debug connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.3. Connection Diagram: SoC Configuration MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Typical Connection Diagrams silabs.com | Building a more connected world. Rev. 1.5 | 57

  1. Layout Guidelines For optimal performance of the MGM12P (with integrated antenna), please follow the PCB layout guidelines and ground plane recom- mendations indicated in this section.

6.1 Module Placement and Application PCB Layout Guidelines

  • Place the module at the edge of the PCB, as shown in the figure below.
  • Do not place any metal (traces, components, battery, etc.) within the clearance area of the antenna (shown in the figure below).
  • Connect all ground pads directly to a solid ground plane.
  • Place the ground vias as close to the ground pads as possible.
  • Do not place plastic or any other dielectric material in touch with the antenna. Figure 6.1. Recommended Application PCB Layout for MGM12P with Integrated Antenna The layouts in the next figure will result in severely degraded RF-performance. Figure 6.2. Non-optimal Module Placements for MGM12P with Integrated Antenna MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Layout Guidelines silabs.com | Building a more connected world. Rev. 1.5 | 58

Figure 6.3. Impact of GND Plane Size vs. Range for MGM12P

6.2 Effect of Plastic and Metal Materials

Do not place plastic or any other dielectric material in closs proximity to the antenna. Any metallic objects in close proximity to the antenna will prevent the antenna from radiating freely. The minimum recommended dis- tance of metallic and/or conductive objects is 10 mm in any direction from the antenna except in the directions of the application PCB ground planes.

6.3 Locating the Module Close to Human Body

Placing the module in touch or very close to the human body will negatively impact antenna efficiency and reduce range. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Layout Guidelines silabs.com | Building a more connected world. Rev. 1.5 | 59

Figure 6.6. Typical 2D Radiation Pattern – Top View MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Layout Guidelines silabs.com | Building a more connected world. Rev. 1.5 | 61

  1. Hardware Design Guidelines The MGM12P is an easy-to-use module with regard to hardware application design but certain design guidelines must be followed to guarantee optimal performance. These guidelines are listed in the next sub-sections.

7.1 Power Supply Requirements

Coin cell batteries cannot withstand high peak currents (e.g. higher than 15 mA). If the peak current exceeds 15 mA it’s recommended to place 47 - 100 µF capacitor in parallel with the coin cell battery to improve the battery life time. Notice that the total current consump- tion of your application is a combination of the radio, peripherals and MCU current consumption so you must take all of these into ac- count. MGM12P should be powered by a unipolar supply voltage with nominal value of 3.3 V.

7.2 Reset Functions

The MGM12P can be reset by three different methods: by pulling the RESET line low, by the internal watchdog timer or software com- mand. The reset state in MGM12P does not provide any power saving functionality and thus is not recommended as a means to con- serve power. MGM12P has an internal system power-up reset function. The RESET pin includes an on-chip pull-up resistor and can therefore be left unconnected if no external reset switch or source is needed.

7.3 Debug and Firmware Updates

This section contains information on debug and firmware update methods. For additional information, refer to the following application note: AN958: Debugging and Programming Interfaces for Custom Designs.

7.3.1 Programming and Debug Connections

It is recommended to expose the debug pins in your own hardware design for firmware update and debug purposes. The following table lists the required pins for JTAG connection and SWD connections. The debug pins have pull-down and pull-up enabled by default, so leaving them enabled may increase current consumption if left con- nected to supply or ground. If enabling the JTAG pins the module must be power cycled to enable a SWD debug session. Table 7.1. JTAG Pads PAD NAME PAD NUMBER JTAG SIGNAL NAME SWD SIGNAL NAME COMMENTS PF3 24 TDI N/A This pin is disabled after reset. Once enabled the pin has a built-in pull-up. PF2 23 TDO N/A This pin is disabled after reset PF1 22 TMS SWDIO Pin is enabled after reset and has a built-in pull-up PF0 21 TCK SWCLK Pin is enabled after reset and has a built-in pull- down

7.3.2 Packet Trace Interface (PTI)

The MGM12P integrates a true PHY-level PTI with the MAC, allowing complete, non-intrusive capture of all packets to and from the EFR32 Wireless STK development tools. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Hardware Design Guidelines silabs.com | Building a more connected world. Rev. 1.5 | 62

  1. Pin Definitions

8.1 Pin Definitions

25 PF4

Figure 8.1. MGM12P Pinout MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 63

Table 8.1. MGM12P Device Pinout Pin Name Pin(s) Description Pin Name Pin(s) Description GND Ground PD13 2 GPIO PD14 3 GPIO PD15 4 GPIO PA0 5 GPIO PA1 6 GPIO PA2 7 GPIO PA3 8 GPIO PA4 9 GPIO PA5 10 GPIO (5V) PB11 11 GPIO PB13 13 GPIO PC6 14 GPIO (5V) PC7 15 GPIO (5V) PC8 16 GPIO (5V) PC9 17 GPIO (5V) PC10 18 GPIO (5V) PC11 19 GPIO (5V) PF0 21 GPIO (5V) PF1 22 GPIO (5V) PF2 23 GPIO (5V) PF3 24 GPIO (5V) PF4 25 GPIO (5V) PF5 26 GPIO (5V) PF6 27 GPIO (5V) PF7 28 GPIO (5V) VDD 29 Module Power Supply RESETn 30 Reset input, active low. To apply an ex- ternal reset source to this pin, it is re- quired to only drive this pin low during reset, and let the internal pull-up ensure that reset is released. Note: 1. GPIO with 5V tolerance are indicated by (5V). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 64

8.1.1 GPIO Overview

The GPIO pins are organized as 16-bit ports indicated by letters A through F, and the individual pins on each port are indicated by a number from 15 down to 0. Table 8.2. GPIO Pinout Port Pin Pin Pin Pin Pin Pin Pin 9 Pin 8 Pin 7 Pin 6 Pin 5 Pin 4 Pin 3 Pin 2 Pin 1 Pin 0 (5V) PA4 PA3 PA2 PA1 PA0 Port C - - - - PC11 (5V) PC10 (5V) PC9 (5V) PC8 (5V) PC7 (5V) PC6 (5V) - - - - - - Port D PD15 PD14 PD13 - - - - - - - - - - Port F - - - - - - - - PF7 (5V) PF6 (5V) PF5 (5V) PF4 (5V) PF3 (5V) PF2 (5V) PF1 (5V) PF0 (5V) Note: 1. GPIO with 5V tolerance are indicated by (5V). MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 65

8.2 Alternate Functionality Pinout

A wide selection of alternate functionality is available for multiplexing to various pins. The following table shows the name of the alter- nate functionality in the first column, followed by columns showing the possible LOCATION bitfield settings. Note: Some functionality, such as analog interfaces, do not have alternate settings or a LOCATION bitfield. In these cases, the pinout is shown in the column corresponding to LOCATION 0. Table 8.3. Alternate Functionality Overview Alternate LOCATION Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description ACMP0_O 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Analog comparator ACMP0, digital out- put. ACMP1_O 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Analog comparator ACMP1, digital out- put. ADC0_EXTN 0: PA0 Analog to digital converter ADC0 ex- ternal reference in- put negative pin. ADC0_EXTP 0: PA1 Analog to digital converter ADC0 ex- ternal reference in- put positive pin. CMU_CLK0 0: PA1 2: PC6 3: PC11 5: PD14 6: PF2 7: PF7 Clock Management Unit, clock output number 0. CMU_CLK1 0: PA0 2: PC7 3: PC10 5: PD15 6: PF3 7: PF6 Clock Management Unit, clock output number 1. CMU_CLKI0 0: PB13 1: PF7 2: PC6 4: PA5 Clock Management Unit, clock output number I0. DBG_SWCLKTCK 0: PF0 Debug-interface Serial Wire clock input and JTAG Test Clock. Note that this func- tion is enabled to the pin out of reset, and has a built-in pull down. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 66

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description DBG_SWDIOTMS 0: PF1 Debug-interface Serial Wire data in- put / output and JTAG Test Mode Select. Note that this func- tion is enabled to the pin out of reset, and has a built-in pull up. DBG_SWO 0: PF2 1: PB13 2: PD15 3: PC11 Debug-interface Serial Wire viewer Output. Note that this func- tion is not enabled after reset, and must be enabled by software to be used. DBG_TDI 0: PF3 Debug-interface JTAG Test Data In. Note that this func- tion becomes avail- able after the first valid JTAG com- mand is received, and has a built-in pull up when JTAG is active. DBG_TDO 0: PF2 Debug-interface JTAG Test Data Out. Note that this func- tion becomes avail- able after the first valid JTAG com- mand is received. ETM_TCLK 1: PA5 3: PC6 Embedded Trace Module ETM clock . ETM_TD0 3: PC7 Embedded Trace Module ETM data ETM_TD1 3: PC8 Embedded Trace Module ETM data ETM_TD2 3: PC9 Embedded Trace Module ETM data MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 67

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description ETM_TD3 3: PC10 Embedded Trace Module ETM data FRC_DCLK 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Frame Controller, Data Sniffer Clock. FRC_DFRAME 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Frame Controller, Data Sniffer Frame active FRC_DOUT 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Frame Controller, Data Sniffer Out- put. GPIO_EM4WU0 0: PF2 Pin can be used to wake the system up from EM4 GPIO_EM4WU1 0: PF7 Pin can be used to wake the system up from EM4 GPIO_EM4WU4 0: PD14 Pin can be used to wake the system up from EM4 GPIO_EM4WU8 0: PA3 Pin can be used to wake the system up from EM4 GPIO_EM4WU9 0: PB13 Pin can be used to wake the system up from EM4 GPIO_EM4WU12 0: PC10 Pin can be used to wake the system up from EM4 I2C0_SCL 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 I2C0 Serial Clock Line input / output. I2C0_SDA 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 I2C0 Serial Data in- put / output. I2C1_SCL 18: PC10 19: PC11 I2C1 Serial Clock Line input / output. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 68

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description I2C1_SDA 19: PC10 20: PC11 I2C1 Serial Data in- put / output. LES_CH5 0: PD13 LESENSE channel LES_CH6 0: PD14 LESENSE channel LES_CH7 0: PD15 LESENSE channel LES_CH8 0: PA0 LESENSE channel LES_CH9 0: PA1 LESENSE channel LES_CH10 0: PA2 LESENSE channel 10. LES_CH11 0: PA3 LESENSE channel 11. LES_CH12 0: PA4 LESENSE channel 12. LES_CH13 0: PA5 LESENSE channel 13. LETIM0_OUT0 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Low Energy Timer LETIM0, output channel 0. LETIM0_OUT1 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Low Energy Timer LETIM0, output channel 1. LEU0_RX 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 LEUART0 Receive input. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 69

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description LEU0_TX 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 LEUART0 Transmit output. Also used as receive input in half duplex commu- nication. MODEM_ANT0 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 MODEM antenna control output 0, used for antenna diversity. MODEM_ANT1 0: PA4 1: PA5 2: PB11 4: PB13 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 12: PC11 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 MODEM antenna control output 1, used for antenna diversity. MODEM_DCLK 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 MODEM data clock out. MODEM_DIN 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 MODEM data in. MODEM_DOUT 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 MODEM data out. OPA0_N 0: PA4 Operational Amplifi- er 0 external nega- tive input. OPA0_P 0: PA2 Operational Amplifi- er 0 external posi- tive input. OPA1_N 0: PD15 Operational Amplifi- er 1 external nega- tive input. OPA1_P 0: PD13 Operational Amplifi- er 1 external posi- tive input. OPA2_N 0: PB13 Operational Amplifi- er 2 external nega- tive input. OPA2_P 0: PB11 Operational Amplifi- er 2 external posi- tive input. PCNT0_S0IN 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Pulse Counter PCNT0 input num- ber 0. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 70

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description PCNT0_S1IN 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Pulse Counter PCNT0 input num- ber 1. PCNT1_S0IN 19: PF6 20: PF7 Pulse Counter PCNT1 input num- ber 0. PCNT1_S1IN 18: PF6 19: PF7 Pulse Counter PCNT1 input num- ber 1. PCNT2_S0IN 19: PC10 20: PC11 Pulse Counter PCNT2 input num- ber 0. PCNT2_S1IN 18: PC10 19: PC11 Pulse Counter PCNT2 input num- ber 1. PRS_CH0 0: PF0 1: PF1 2: PF2 3: PF3 4: PF4 5: PF5 6: PF6 7: PF7 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 Peripheral Reflex System PRS, chan- nel 0. PRS_CH1 0: PF1 1: PF2 2: PF3 3: PF4 4: PF5 5: PF6 6: PF7 7: PF0 Peripheral Reflex System PRS, chan- nel 1. PRS_CH2 0: PF2 1: PF3 2: PF4 3: PF5 4: PF6 5: PF7 6: PF0 7: PF1 Peripheral Reflex System PRS, chan- nel 2. PRS_CH3 0: PF3 1: PF4 2: PF5 3: PF6 4: PF7 5: PF0 6: PF1 7: PF2 12: PD13 13: PD14 14: PD15 Peripheral Reflex System PRS, chan- nel 3. PRS_CH4 4: PD13 5: PD14 6: PD15 Peripheral Reflex System PRS, chan- nel 4. PRS_CH5 3: PD13 4: PD14 5: PD15 Peripheral Reflex System PRS, chan- nel 5. PRS_CH6 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 15: PD13 16: PD14 17: PD15 Peripheral Reflex System PRS, chan- nel 6. PRS_CH7 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PA0 Peripheral Reflex System PRS, chan- nel 7. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 71

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description PRS_CH8 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PA0 10: PA1 Peripheral Reflex System PRS, chan- nel 8. PRS_CH9 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PA0 9: PA1 10: PA2 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 Peripheral Reflex System PRS, chan- nel 9. PRS_CH10 0: PC6 1: PC7 2: PC8 3: PC9 4: PC10 5: PC11 Peripheral Reflex System PRS, chan- nel 10. PRS_CH11 0: PC7 1: PC8 2: PC9 3: PC10 4: PC11 5: PC6 Peripheral Reflex System PRS, chan- nel 11. TIM0_CC0 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Timer 0 Capture Compare input / output channel 0. TIM0_CC1 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Timer 0 Capture Compare input / output channel 1. TIM0_CC2 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Timer 0 Capture Compare input / output channel 2. TIM0_CDTI0 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 Timer 0 Compli- mentary Dead Time Insertion channel 0. TIM0_CDTI1 0: PA4 1: PA5 2: PB11 4: PB13 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 12: PC11 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 Timer 0 Compli- mentary Dead Time Insertion channel 1. TIM0_CDTI2 0: PA5 1: PB11 3: PB13 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 Timer 0 Compli- mentary Dead Time Insertion channel 2. TIM1_CC0 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Timer 1 Capture Compare input / output channel 0. TIM1_CC1 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Timer 1 Capture Compare input / output channel 1. TIM1_CC2 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Timer 1 Capture Compare input / output channel 2. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 72

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description TIM1_CC3 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 Timer 1 Capture Compare input / output channel 3. US0_CLK 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 USART0 clock in- put / output. US0_CS 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 USART0 chip se- lect input / output. US0_CTS 0: PA4 1: PA5 2: PB11 4: PB13 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 12: PC11 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 USART0 Clear To Send hardware flow control input. US0_RTS 0: PA5 1: PB11 3: PB13 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 USART0 Request To Send hardware flow control output. US0_RX 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 USART0 Asynchro- nous Receive. USART0 Synchro- nous mode Master Input / Slave Out- put (MISO). US0_TX 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 USART0 Asynchro- nous Transmit. Al- so used as receive input in half duplex communication. USART0 Synchro- nous mode Master Output / Slave In- put (MOSI). US1_CLK 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 USART1 clock in- put / output. US1_CS 0: PA3 1: PA4 2: PA5 3: PB11 5: PB13 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 USART1 chip se- lect input / output. US1_CTS 0: PA4 1: PA5 2: PB11 4: PB13 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 12: PC11 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 USART1 Clear To Send hardware flow control input. US1_RTS 0: PA5 1: PB11 3: PB13 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 USART1 Request To Send hardware flow control output. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 73

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description US1_RX 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 USART1 Asynchro- nous Receive. USART1 Synchro- nous mode Master Input / Slave Out- put (MISO). US1_TX 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 USART1 Asynchro- nous Transmit. Al- so used as receive input in half duplex communication. USART1 Synchro- nous mode Master Output / Slave In- put (MOSI). US2_CLK 12: PF0 13: PF1 14: PF3 15: PF4 16: PF5 17: PF6 18: PF7 30: PA5 USART2 clock in- put / output. US2_CS 11: PF0 12: PF1 13: PF3 14: PF4 15: PF5 16: PF6 17: PF7 29: PA5 USART2 chip se- lect input / output. US2_CTS 10: PF0 11: PF1 12: PF3 13: PF4 14: PF5 15: PF6 16: PF7 28: PA5 USART2 Clear To Send hardware flow control input. US2_RTS 9: PF0 10: PF1 11: PF3 12: PF4 13: PF5 14: PF6 15: PF7 27: PA5 USART2 Request To Send hardware flow control output. US2_RX 13: PF0 14: PF1 15: PF3 16: PF4 17: PF5 18: PF6 19: PF7 31: PA5 USART2 Asynchro- nous Receive. USART2 Synchro- nous mode Master Input / Slave Out- put (MISO). US2_TX 0: PA5 14: PF0 15: PF1 16: PF3 17: PF4 18: PF5 19: PF6 20: PF7 USART2 Asynchro- nous Transmit. Al- so used as receive input in half duplex communication. USART2 Synchro- nous mode Master Output / Slave In- put (MOSI). US3_CLK 3: PD13 4: PD14 5: PD15 13: PB11 USART3 clock in- put / output. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 74

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description US3_CS 2: PD13 3: PD14 4: PD15 12: PB11 USART3 chip se- lect input / output. US3_CTS 1: PD13 2: PD14 3: PD15 11: PB11 USART3 Clear To Send hardware flow control input. US3_RTS 0: PD13 1: PD14 2: PD15 10: PB11 USART3 Request To Send hardware flow control output. US3_RX 4: PD13 5: PD14 6: PD15 14: PB11 USART3 Asynchro- nous Receive. USART3 Synchro- nous mode Master Input / Slave Out- put (MISO). US3_TX 5: PD13 6: PD14 7: PD15 15: PB11 USART3 Asynchro- nous Transmit. Al- so used as receive input in half duplex communication. USART3 Synchro- nous mode Master Output / Slave In- put (MOSI). VDAC0_EXT 0: PA1 Digital to analog converter VDAC0 external reference input pin. VDAC0_OUT0 / OPA0_OUT 0: PA3 Digital to Analog Converter DAC0 output channel number 0. VDAC0_OUT0AL T / OPA0_OUT- ALT 0: PA5 1: PD13 2: PD15 Digital to Analog Converter DAC0 al- ternative output for channel 0. VDAC0_OUT1 / OPA1_OUT 0: PD14 Digital to Analog Converter DAC0 output channel number 1. VDAC0_OUT1AL T / OPA1_OUT- ALT 1: PA2 2: PA4 Digital to Analog Converter DAC0 al- ternative output for channel 1. WTIM0_CC0 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 15: PB11 17: PB13 26: PC6 27: PC7 28: PC8 29: PC9 30: PC10 31: PC11 Wide timer 0 Cap- ture Compare in- put / output channel MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 75

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description WTIM0_CC1 0: PA2 1: PA3 2: PA4 3: PA5 13: PB11 15: PB13 24: PC6 25: PC7 26: PC8 27: PC9 28: PC10 29: PC11 Wide timer 0 Cap- ture Compare in- put / output channel WTIM0_CC2 0: PA4 1: PA5 11: PB11 13: PB13 22: PC6 23: PC7 24: PC8 25: PC9 26: PC10 27: PC11 Wide timer 0 Cap- ture Compare in- put / output channel WTIM0_CDTI0 7: PB11 9: PB13 18: PC6 19: PC7 20: PC8 21: PC9 22: PC10 23: PC11 29: PD13 30: PD14 31: PD15 Wide timer 0 Com- plimentary Dead Time Insertion channel 0. WTIM0_CDTI1 5: PB11 7: PB13 16: PC6 17: PC7 18: PC8 19: PC9 20: PC10 21: PC11 27: PD13 28: PD14 29: PD15 30: PF0 31: PF1 Wide timer 0 Com- plimentary Dead Time Insertion channel 1. WTIM0_CDTI2 3: PB11 5: PB13 14: PC6 15: PC7 16: PC8 17: PC9 18: PC10 19: PC11 25: PD13 26: PD14 27: PD15 28: PF0 29: PF1 30: PF2 31: PF3 Wide timer 0 Com- plimentary Dead Time Insertion channel 2. WTIM1_CC0 1: PB13 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Wide timer 1 Cap- ture Compare in- put / output channel WTIM1_CC1 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 Wide timer 1 Cap- ture Compare in- put / output channel WTIM1_CC2 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 Wide timer 1 Cap- ture Compare in- put / output channel WTIM1_CC3 4: PC6 5: PC7 6: PC8 7: PC9 8: PC10 9: PC11 15: PD13 16: PD14 17: PD15 18: PF0 19: PF1 20: PF2 21: PF3 22: PF4 23: PF5 24: PF6 25: PF7 Wide timer 1 Cap- ture Compare in- put / output channel MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 76

8.3 Analog Port (APORT) Client Maps

The Analog Port (APORT) is an infrastructure used to connect chip pins with on-chip analog clients such as analog comparators, ADCs, DACs, etc. The APORT consists of a set of shared buses, switches, and control logic needed to configurably implement the signal rout- ing. Figure 8.2 APORT Connection Diagram on page 77 Shows the APORT routing for this device family. A complete description of APORT functionality can be found in the Reference Manual. The APORT information in this section is reflective of the IC used in the modules. Not all ports are available on the modules. The module pins available correspond with the pin names in this section. PF0 PF1 PF2 PF3 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 PF4 PF5 PK0 PK1 PK2 PF6 PF7 PJ14 PJ15 PC0 PC1 PC2 PC3 PC4 PC5 PC11 PC10 PC9 PC8 PC7 PC6 PB13 PB12 PB11 VDAC0_OPA2ALT PB10 PB9 PB8 PB7 PB6 VDAC0_OUT0ALTVDAC0_OUT1ALT PA4OPA0_INN0 OPA0_OUT PA3 VDAC0_OUT1ALT PA2 PB15 PB14 PI3 PI2 PA9 PA8 PA7 PA6 PA5 PI1 PI0 VDAC0_OPA2ALT OPA0_INP0 PA1ADC0_EXTP PA0ADC0_EXTN OPA0ALT PD15OPA1_INN0 LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE PD14 OPA1_OUT PD13 VDAC0_OUT0ALTOPA1_INP0 VDAC0_OUT1ALT PD12 PD11 PD10 PD9 PD8 LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE LESENSE AXAYBXBY CXCYDXDY ADC_EXTN ADC_EXTP OPA0_NOUT1 OPA2_N OUT0 OPA1N OPA1_P OUT0ALT OUT0ALTOUT1ALT OUT1ALT ALT1OUT OUT2 OPA2_P OUT2ALTOUT2ALT ADC1XADC1Y ACMP0XACMP0Y ACMP1XACMP1Y IDAC0 1X1Y POS NEG ACMP1 1X2X3X4X 1Y2Y3Y4Y POS NEG ACMP0 1X2X3X4X 1Y2Y3Y4Y POS NEG ADC0 1X2X3X4X 1Y2Y3Y4Y EXTPEXTN POS NEGOPA0 1X2X3X4X 1Y2Y3Y4Y 1XOPA0_P OPA0_N OUT0OUT0ALTOUT1OUT2OUT3OUT4 OUT POS NEGOPA1 OUT 1X2X3X4X 1Y2Y3Y4Y 1XOPA1_P OPA1_N OUT1OUT1ALTOUT1OUT2OUT3OUT4 POS NEGOPA2 1X2X3X4X 1Y2Y3Y4Y 1XOPA2_P OPA2_N OUT2OUT2ALTOUT1OUT2OUT3OUT4 OUT OPA0_P ALT0OUT n X, n Y APORTn X, APORTn Y AX, BY, …BUSAX, BUSBY, ... ADC0X, ADC0YBUSADC0X, BUSADC0YACMP0X, ACMP1Y, …BUSACMP0X, BUSACMP1Y, ... CEXT 1X1Y3X3YCSEN CEXT_SENSE 2X2Y4X4Y NEXT1NEXT0 NEXT1NEXT0 NEXT0 NEXT1 NEXT0 NEXT2 NEXT2 NEXT1 NEXT1NEXT0 NEXT1NEXT0 Figure 8.2. APORT Connection Diagram Client maps for each analog circuit using the APORT are shown in the following tables. The maps are organized by bus, and show the peripheral's port connection, the shared bus, and the connection from specific bus channel numbers to GPIO pins. In general, enumerations for the pin selection field in an analog peripheral's register can be determined by finding the desired pin con- nection in the table and then combining the value in the Port column (APORT__), and the channel identifier (CH__). For example, if pin MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 77

PF7 is available on port APORT2X as CH23, the register field enumeration to connect to PF7 would be APORT2XCH23. The shared bus used by this connection is indicated in the Bus column. Table 8.4. ACMP0 Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 APORT0X BUSACMP0X PA9 PA8 APORT0Y BUSACMP0Y PA9 PA8 APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 78

Table 8.5. ACMP1 Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 APORT0X BUSACMP1X PJ15 PJ14 APORT0Y BUSACMP1Y PJ15 PJ14 APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 79

Table 8.6. ADC0 Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 APORT0X BUSADC0X PI3 PI2 PI1 PI0 APORT0Y BUSADC0Y PI3 PI2 PI1 PI0 APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 80

Table 8.7. CSEN Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 CEXT APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 CEXT_SENSE APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 Table 8.8. IDAC0 Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 APORT1X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT1Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 81

Table 8.9. VDAC0 / OPA Bus and Pin Mapping Port Bus CH31 CH30 CH29 CH28 CH27 CH26 CH25 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 OPA0_N APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 OPA0_P APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 82

OPA1_N APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 OPA1_P APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 OPA2_N APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 83

OPA2_OUT APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 OPA2_P APORT1X BUSAX PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT2X BUSBX PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT3X BUSCX PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 APORT4X BUSDX PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 VDAC0_OUT0 / OPA0_OUT APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 84

VDAC0_OUT1 / OPA1_OUT APORT1Y BUSAY PF15 PF13 PF11 PF9 PF7 PF5 PF3 PF1 PC11 PC9 PC7 PC5 PC3 PC1 APORT2Y BUSBY PF14 PF12 PF10 PF8 PF6 PF4 PF2 PF0 PC10 PC8 PC6 PC4 PC2 PC0 APORT3Y BUSCY PB15 PB13 PB11 PB9 PB7 PA7 PA5 PA3 PA1 PD15 PD13 PD11 PD9 APORT4Y BUSDY PB14 PB12 PB10 PB8 PB6 PA6 PA4 PA2 PA0 PD14 PD12 PD10 PD8 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Pin Definitions silabs.com | Building a more connected world. Rev. 1.5 | 85

  1. Package Specifications

9.1 MGM12P Package Outline

Figure 9.1. Top View and Side View with Antenna Option Figure 9.2. Top View and Side View with U.FL Option MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Package Specifications silabs.com | Building a more connected world. Rev. 1.5 | 86

Figure 9.3. Bottom View

9.2 MGM12P Recommended PCB Land Pattern

The figure below shows the recommended land pattern. The antenna clearance section is not required for the MGM12P module version with the U.FL connector. Figure 9.4. MGM12P Recommended PCB Land Pattern MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Package Specifications silabs.com | Building a more connected world. Rev. 1.5 | 87

9.3 MGM12P Package Marking

The figure below shows the Module markings printed on the RF-shield. Figure 9.5. MGM12P Package Marking Mark Description The package marking consists of:

  • MGM12Pxxxxxx - Part number designation
  • Model: MGM12Pxxxx – Model number designation
  • QR Code: YYWWMMABCDE
  • YY – The last 2 digits of the assembly year
  • WW – The 2 digit work week when the device was assembled
  • MMABCDE – Silicon Labs unit code
  • Trace Code: YYWWTTTTTT
  • YY – The last 2 digits of the assembly year
  • WW – The 2 digit work week when the device was assembled
  • TTTTTT – A trace or manufacturing code. The first letter is the device revision
  • Certification marks such as the CE logo, FCC and IC IDs, etc. will be engraved on the grayed out area or printed on the back side of the module, according to regulatory body requirements MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Package Specifications silabs.com | Building a more connected world. Rev. 1.5 | 88
  1. Soldering Recommendations It is recommended that final PCB assembly of this product follows the industry standard as identified by the Institute for Printed Circuits (IPC). This product is assembled in compliance with the J-STD-001 requirements and the guidelines of IPC-AJ-820. Surface mounting of this product by the end user is recommended to follow IPC-A-610 to meet or exceed class 2 requirements. CLASS 1 General Electronic Products Includes products suitable for applications where the major requirement is function of the completed assembly. CLASS 2 Dedicated Service Electronic Products Includes products where continued performance and extended life is required, and for which uninterrupted service is desired but not critical. Typically the end-use environment would not cause failures. CLASS 3 High Performance/Harsh Environment Electronic Products Includes products where continued high performance or performance-on-demand is critical, equipment downtime cannot be tolerated, end-use environment may be uncommonly harsh, and the equipment must function when required, such as life support or other critical systems. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Soldering Recommendations silabs.com | Building a more connected world. Rev. 1.5 | 89
  1. Tape and Reel Specifications

11.1 Tape and Reel Specification

This section contains information regarding the tape and reel packaging for the MGM12P Wireless Gecko Module.

11.2 Reel Material and Dimensions

  • Reel material: Polystyrene (PS)
  • Reel diameter: 13 inches (330 mm)
  • Number of modules per reel: 1000 pcs
  • Disk deformation, folding whitening and mold imperfections: Not allowed
  • Disk set: consists of two 13 inch (330 mm) rotary round disks and one central axis (100 mm)
  • Antistatic treatment: Required
  • Surface resistivity: 104 - 109 Ω/sq. Figure 11.1. Reel Dimension — Side View Symbol Dimensions [mm] W0 44.0 +0.5/-.0.0 W1 48.0 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Tape and Reel Specifications silabs.com | Building a more connected world. Rev. 1.5 | 90

11.3 Module Orientation and Tap

The user direction of feed, start and end of tape on reel and orientation of the Modules on the tape are shown in the figures below. Figure 11.2. Module Orientation and Feed Direction MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Tape and Reel Specifications silabs.com | Building a more connected world. Rev. 1.5 | 91

11.4 Carrier Tape and Cover Tape Information

Figure 11.3. Carrier Tape Information Figure 11.4. Cover Tape Information Symbol Dimensions [mm] Thickness (T) 0.055 +0.005/-0.003 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Tape and Reel Specifications silabs.com | Building a more connected world. Rev. 1.5 | 92

  1. Certifications

12.1 CE and UKCA - EU and UK

The MGM12P(MGM12P02 and MGM12P22) modules have been tested against the relevant harmonized/designated standards and are in conformity with the essential requirements and other relevant requirements of the EU's Radio Equipment Directive (RED) (2014/53/EU) and of the UK's Radio Equipment Regulations (RER) (S.I. 2017/1206). Please notice that every end-product integrating a MGM12P(MGM12P02 and MGM12P22) module will need to perform the radio EMC tests on the whole assembly, according to the ETSI 301 489-x relevant standards. Furthermore, it is ultimately the responsibility of the manufacturers to ensure the compliance of their end-products as a whole. The spe- cific product assembly is likely to have an impact to RF radiated characteristics, when compared to the bare module. Hence, manufac- turers should carefully consider RF radiated testing with the final product assembly, especially taking into account the gain of the exter- nal antenna if any, and the possible deviations in the PSD, EIRP and spurious emissions measurements, as defined in the ETSI EN 300 328 standard. The modules are entitled to carry the CE and UKCA Marks, and a formal Declaration of Conformity (DoC) is available at the product web page which is reachable starting from https://www.silabs.com/.

12.2 FCC

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: 1. This device may not cause harmful interference, and 2. This device must accept any interference received, including interference that may cause undesirable operation. Any changes or modifications not expressly approved by Silicon Labs could void the user’s authority to operate the equipment. FCC RF Radiation Exposure Statement: This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End users must follow the specif- ic operating instructions for satisfying RF exposure compliance. This transmitter meets both portable and mobile limits as demonstrated in the RF Exposure Analysis. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter product procedures. OEM Responsibilities to comply with FCC Regulations OEM integrator is responsible for testing their end-product for any additional compliance requirements required with this module instal- led (for example, digital device emissions, PC peripheral requirements, etc.).

  • With MGM12P22GA, MGM12P22GE, MGM12P02GA and MGM12P02GE the antenna(s) must be installed such that a minimum separation distance of 6.7mm is maintained between the radiator (antenna) and all persons at all times.
  • With MGM12P32GA and MGM12P32GE the antenna(s) must be installed such that a minimum separation distance of 39mm is maintained between the radiator (antenna) and all persons at all times.
  • The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter except in accord- ance with FCC multi-transmitter product procedures. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Certifications silabs.com | Building a more connected world. Rev. 1.5 | 93

IMPORTANT NOTE: In the event that the above conditions cannot be met (for certain configurations or co-location with another trans- mitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circum- stances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. End Product Labeling The variants of MGM12P Modules are labeled with their own FCC IDs. If the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. In that case, the final product must be labeled in a visible area with the following MODELS MGM12P02GE and MGM12P02GA: “Contains Transmitter Module FCC ID: QOQMGM12P0” or “Contains FCC ID: QOQMGM12P0 MODELS MGM12P22GE and MGM12P22GA: “Contains Transmitter Module FCC ID: QOQMGM12P2” or “Contains FCC ID: QOQMGM12P2 MODELS MGM12P32GE and MGM12P32GA: “Contains Transmitter Module FCC ID: QOQMGM12P3” or “Contains FCC ID: QOQMGM12P3 The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Certifications silabs.com | Building a more connected world. Rev. 1.5 | 94

12.3 ISEDC

This radio transmitter (IC: 5123A-MGM12P) has been approved by Industry Canada to operate with the embedded chip antenna and a standard 2.14 dBi dipole antenna. Other antenna types are strictly prohibited for use with this device. This device complies with Industry Canada’s license-exempt RSS standards. Operation is subject to the following two conditions: 1. This device may not cause interference; and 2. This device must accept any interference, including interference that may cause undesired operation of the device RF Exposure Statemment Exception from routine SAR evaluation limits are given in RSS-102 Issue 5. MGM12P22GA, MGM12P22GE, MGM12P02GA and MGM12P02GE modules meets the given requirements when the minimum sepa- ration distance to human body is 20 mm. MGM12P32GA and MGM12P32GA modules meets the given requirements when the minimum separation distance to human body is 35 mm. RF exposure or SAR evaluation is not required when the separation distance is same or more than stated above. If the separation dis- tance is less than stated above the OEM integrator is responsible for evaluating the SAR. OEM Responsibilities to comply with IC Regulations The MGM12P module has been certified for integration into products only by OEM integrators under the following conditions:

  • The antenna(s) must be installed such that a minimum separation distance as stated above is maintained between the radiator (an- tenna) and all persons at all times.
  • The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter. As long as the two conditions above are met, further transmitter testing will not be required. However, the OEM integrator is still respon- sible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). IMPORTANT NOTE: In the event that these conditions cannot be met (for certain configurations or co-location with another transmit- ter), then the ISEDC authorization is no longer considered valid and the IC ID cannot be used on the final product. In these circumstan- ces, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate ISEDC authorization. End Product Labeling The MGM12P modules are labeled with their own IC ID. If the IC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. In that case, the final end product must be labeled in a visible area with the following: MODELS MGM12P02GE and MGM12P02GA: “Contains Transmitter Module IC: 5123A-MGM12P0” or “Contains IC: 5123A-MGM12P0 MODELS MGM12P22GE and MGM12P22GA: “Contains Transmitter Module IC: 5123A-MGM12P2” or “Contains IC: 5123A-MGM12P2 MODELS MGM12P32GE and MGM12P32GA: “Contains Transmitter Module IC: 5123A-MGM12P3” or “Contains IC: 5123A-MGM12P3” The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Certifications silabs.com | Building a more connected world. Rev. 1.5 | 95

ISEDC (Français) Industrie Canada a approuvé l’utilisation de cet émetteur radio (IC: 5123A-MGM12P) en conjonction avec des antennes de type dipo- laire à 2.14dBi ou des antennes embarquées, intégrée au produit. L’utilisation de tout autre type d’antenne avec ce composant est proscrite. Ce composant est conforme aux normes RSS, exonérées de licence d'Industrie Canada. Son mode de fonctionnement est soumis aux deux conditions suivantes : 1. Ce composant ne doit pas générer d’interférences 2. Ce composant doit pouvoir est soumis à tout type de perturbation y compris celle pouvant nuire à son bon fonctionnement. Déclaration d'exposition RF L'exception tirée des limites courantes d'évaluation SAR est donnée dans le document RSS-102 Issue 5. Les modules MGM12P22GA, MGM12P22GE, MGM12P02GA et MGM12P02GE répondent aux exigences requises lorsque la distance minimale de séparation avec le corps humain est de 20 mm. Les modules MGM12P32GA et MGM12P32GA répondent aux exigences requises lorsque la distance minimale de séparation avec le corps humain est de 35 mm. La déclaration d’exposition RF ou l'évaluation SAR n'est pas nécessaire lorsque la distance de séparation est identique ou supérieure à celle indiquée ci-dessus. Si la distance de séparation est inférieure à celle mentionnées plus haut, il incombe à l'intégrateur OEM de procédé à une évaluation SAR. Responsabilités des OEM pour une mise en conformité avec le Règlement du Circuit Intégré Le module MGM12P a été approuvé pour l'intégration dans des produits finaux exclusivement réalisés par des OEM sous les condi- tions suivantes:

  • L'antenne (s) doit être installée de sorte qu'une distance de séparation minimale indiquée ci-dessus soit maintenue entre le radiateur (antenne) et toutes les personnes avoisinante, ce à tout moment.
  • Le module émetteur ne doit pas être localisé ou fonctionner avec une autre antenne ou un autre transmetteur que celle indiquée plus haut. Tant que les deux conditions ci-dessus sont respectées, il n’est pas nécessaire de tester ce transmetteur de façon plus poussée. Ce- pendant, il incombe à l’intégrateur OEM de s’assurer de la bonne conformité du produit fini avec les autres normes auxquelles il pour- rait être soumis de fait de l’utilisation de ce module (par exemple, les émissions des périphériques numériques, les exigences de pé- riphériques PC, etc.). REMARQUE IMPORTANTE: dans le cas où ces conditions ne peuvent être satisfaites (pour certaines configurations ou co-implanta- tion avec un autre émetteur), l'autorisation ISEDC n'est plus considérée comme valide et le numéro d’identification ID IC ne peut pas être apposé sur le produit final. Dans ces circonstances, l'intégrateur OEM sera responsable de la réévaluation du produit final (y comp- ris le transmetteur) et de l'obtention d'une autorisation ISEDC distincte. Étiquetage des produits finis Les modules MGM12P sont étiquetés avec leur propre ID IC. Si l'ID IC n'est pas visible lorsque le module est intégré au sein d'un autre produit, cet autre produit dans lequel le module est installé devra porter une étiquette faisant apparaitre les référence du module inté- gré. Dans un tel cas, sur le produit final doit se trouver une étiquette aisément lisible sur laquelle figurent les informations suivantes : MODÈLES MGM12P02GE et MGM12P02GA: "Contient le module transmetteur : 5123A-MGM12P0" ou "Contient le circuit: 5123A-MGM12P0 MODÈLES MGM12P22GE et MGM12P22GA: "Contient le module transmetteur: 5123A-MGM12P2" ou "Contient IC: 5123A-MGM12P2 MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Certifications silabs.com | Building a more connected world. Rev. 1.5 | 96

MODÈLES MGM12P32GE et MGM12P32GA: "Contient le module émetteur IC: 5123A-MGM12P3" ou "Contient IC: 5123A-MGM12P3" L'intégrateur OEM doit être conscient qu’il ne doit pas fournir, dans le manuel d’utilisation, d'informations relatives à la façon d'installer ou de d’enlever ce module RF ainsi que sur la procédure à suivre pour modifier les paramètres liés à la radio. MGM12P Wireless Gecko Multi-Protocol Module Data Sheet Certifications silabs.com | Building a more connected world. Rev. 1.5 | 97

  1. Revision History Revision 1.5 October, 2022
  • Added timing specifications for RESETn low time and clarified V IL and VIH logic levels for RESETn pins in Table 4.21 General-Pur- pose I/O (GPIO) on page 32.
  • Removed BIASPROG = 1, FULLBIAS = 0 specifications from Table 4.24 Analog Comparator (ACMP) on page 37.
  • Updated Hysteresis max values in Table 4.24 Analog Comparator (ACMP) on page 37.
  • Added Figure 4.2 SPI Master Timing Diagram (SMSDELAY = 1) on page 54.
  • Updated 9.3 MGM12P Package Marking.
  • Updated 12.1 CE and UKCA - EU and UK.
  • Removed all references to RFSENSE.
  • Removed references to BOOT_TX and BOOT_RX. Revision 1.4 February, 2020
  • In the front page block diagram, updated the lowest energy mode for LETIMER.
  • Updated 3.6.4 Low Energy Timer (LETIMER) lowest energy mode.
  • Added a Note about the operating voltage in 3.8.3 True Random Number Generator (TRNG).
  • Corrected the Input RF level from +10dBm to -2dBm in Table 4.1. Absolute Maximum Ratings.
  • Updated the module dimensions and tolerances in Figure 9.1 Top View and Side View with Antenna Option on page 86 and Figure 9.2 Top View and Side View with U.FL Option on page 86.
  • Renamed the figures in 9.1 MGM12P Package Outline.
  • Renamed section 9.1 from MGM12P Dimensions to 9.1 MGM12P Package Outline.
  • Removed MGM12P Module Footprint section and added Figure 9.3 Bottom View on page 87 to 9.1 MGM12P Package Outline. Revision 1.3 May, 2019
  • Updated Section 2. Ordering Information
  • Updated Table 4.30 Analog Port (APORT) on page 49 Analog Port (APORT) Operation in EM2/EM3 (Typ: 67 nA)
  • Updated Section 9.3 MGM12P Package Marking
  • Updated 1 Mbps Bluetooth Sensitivity values in Table 4.11 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate on page 26
  • Added Bluetooth sensitivity values with non-ideal signals to Table 4.11 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate on page 26 and Table 4.12 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 2 Mbps Data Rate on page 27
  • Added Chapter 10. Soldering Recommendations Revision 1.2 January, 2019
  • Updated Section 2. Ordering Information.
  • Updated Section 9.1 MGM12P Package Outline
  • Updated Section 9.3 MGM12P Package Marking.
  • Updated Section 12.1 CE and UKCA - EU and UK Revision 1.1 April, 2018
  • Updated Section 2. Ordering Information.
  • Updated Section Table 3.1 Antenna Efficiency and Peak Gain (MGM12P) on page 7.
  • Updated Section 4.1.8 2.4 GHz RF Transceiver Characteristics MGM12P Wireless Gecko Multi-Protocol Module Data Sheet

Revision History

silabs.com | Building a more connected world. Rev. 1.5 | 98

Revision 1.0

  • Minor Updates Revision 0.2
  • Initial Publication MGM12P Wireless Gecko Multi-Protocol Module Data Sheet

silabs.com | Building a more connected world. Rev. 1.5 | 99

Silicon Laboratories Inc.

400 West Cesar Chavez

Austin, TX 78701 USA www.silabs.com IoT Portfolio www.silabs.com/IoT SW/HW www.silabs.com/simplicity Quality www.silabs.com/quality Support & Community www.silabs.com/community Simplicity Studio One-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux! Disclaimer Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software imple - menters using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and “Typical” parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Without prior notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the performance of the product. Silicon Labs shall have no liability for the consequences of use of the infor - mation supplied in this document. This document does not imply or expressly grant any license to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any FDA Class III devices, applications for which FDA premarket approval is required or Life Support Systems without the specific written consent of Silicon Labs. A “Life Support System” is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. Silicon Labs disclaims all express and implied warranties and shall not be responsible or liable for any injuries or damages related to use of a Silicon Labs product in such unauthorized applications. Note: This content may contain offensive terminology that is now obsolete. Silicon Labs is replacing these terms with inclusive language wherever possible. For more information, visit www.silabs.com/about-us/inclusive-lexicon-project Trademark Information Silicon Laboratories Inc. ®, Silicon Laboratories ®, Silicon Labs ®, SiLabs ® and the Silicon Labs logo ®, Bluegiga ®, Bluegiga Logo ®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, “the world’s most energy friendly microcontrollers”, Redpine Signals ®, WiSeConnect , n-Link, ThreadArch ®, EZLink®, EZRadio®, EZRadioPRO ®, Gecko®, Gecko OS, Gecko OS Studio, Precision32 ®, Simplicity Studio ®, Telegesis, the Telegesis Logo ®, USBXpress ® , Zentri, the Zentri logo and Zentri DMS, Z-Wave ®, and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. Wi-Fi is a registered trademark of the Wi-Fi Alliance. All other products or brand names mentioned herein are trademarks of their respective holders.