MC75174BPG

75174 SYC | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 12

Technical content

Features

• Meets EIA−485 Standard for Party Line Operation
• Meets EIA−422−A and CCITT Recommendations V .11 and X.27
• Operating Ambient Temperature: −40 °C to +85°C
• High Impedance Outputs
• Common Mode Output V oltage Range: −7.0 to 12 V
• Positive and Negative Current Limiting
• Transmission Rates in Excess of 10 MBPS
• Thermal Shutdown at 150 °C Junction Temperature, ( ±/hairline 20°C)
• Single 5.0 V Supply
• Pin Compatible with TI SN75172/4 and NS /C0109A96172/4
• Interchangeable with MC3487 and AM26LS31 for EIA−422−A

Applications

• Pb−Free Packages are Available* MAXIMUM RATING Rating Symbol Value Unit Power Supply Voltage VCC −0.5, +7.0 Vdc Input Voltage (Data, Enable) Vin +7.0 Vdc Input Current (Data, Enable) Iin −24 mA Applied Output Voltage, when in 3−State Condition (V CC = 5.0 V) Vza −10, +14 Vdc Applied Output Voltage, when VCC = 0 V Vzb ±14 Vdc Output Current IO Self−Limiting − Storage Temperature Tstg −65, +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Devices should not be operated at these limits. The “Recommended Operating Conditions” table provides for actual device operation. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PDIP−16 P SUFFIX CASE 648 MARKING DIAGRAMS QUAD EIA−485 LINE DRIVERS SOIC−20 WB DW SUFFIX CASE 751D MC75174BP AWLYYWWG MC17517xBDW AWLYYWWG x = 2 or 4 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package 75174

MC75172B, MC75174B RECOMMENDED OPERATING CONDITIONS Characteristic Symbol Min Typ Max Unit Power Supply Voltage VCC +4.75 +5.0 +5.25 Vdc Input Voltage (All Inputs) Vin 0 − VCC Vdc Output Voltage in 3−State Condition, or when VCC = 0 V Vcm −7.0 − +12 Vdc Output Current (Normal data transmission) IO −65 − +65 mA Operating Ambient Temperature (see text) EIA−485 EIA−422 TA −40 − +85 °C 2. All limits are not necessarily functional concurrently. ELECTRICAL CHARACTERISTICS (−40°C /C0112 TA /C0112 85°C, 4.75 V /C0112 VCC /C0112 5.25 V, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Output Voltage Single−Ended Voltage IO = 0 High @ IO = −33 mA Low @ IO = +33 mA Differential Voltage Open Circuit (IO = 0) RL = 54 /C0087 (Figure 1) VO VOH VOL ⎥ VOD1⎜ ⎥ VOD2⎜ 1.5 1.5 4.0 1.6 3.4 2.3 6.0 6.0 5.0 Vdc Change in Differential*, RL = 54 /C0087 (Figure 1) Differential Voltage, RL = 100 /C0087 (Figure 1) Change in Differential*, RL = 100 /C0087 (Figure 1) Differential Voltage, −7.0 V /C0112 Vcm /C0112 12 V (Figure 2) Change in Differential*, −7.0 V /C0112 Vcm /C011212 V (Figure 2) Offset Voltage, RL = 54 /C0087 (Figure 1) Change in Offset*, RL = 54 /C0087 (Figure 1) ⎥ /C0068VOD2⎜ ⎥ VOD2A⎜ ⎥ /C0068VOD2A⎜ ⎥ VOD3⎜ ⎥ /C0068VOD3⎜ VOS ⎥ /C0068VOS ⎜ 1.5 5.0 2.2 5.0 5.0 2.9 5.0 200 200 5.0 200 200 mVdc Vdc mVdc Vdc mVdc Vdc mVdc Output Current (Each Output) Power Off Leakage, VCC = 0, −7.0 V /C0112 VO /C0112 12 V Leakage in 3−State Mode, −7.0 V /C0112 VO /C0112 12 V IO(off) IOZ −50 −50 +50 +50 /C0109A Short Circuit Current to Ground Short Circuit Current, −7.0 V /C0112 VO /C0112 12 V IOSR IOS −150 −250 +150 +250 mA Inputs Low Level Voltage (Pins 4 & 12, MC75174B only) Low Level Voltage (All Other Pins) High Level Voltage (All Inputs) VIL(A) VIL(B) VIH 2.0 0.7 0.8 V CC Vdc Current @ Vin = 2.7 V (All Inputs) Current @ Vin = 0.5 V (All Inputs) IIH IIL −100 0.2 −15 /C0109A Clamp Voltage (All Inputs, Iin = −18 mA) VIK −1.5 − − Vdc Thermal Shutdown Junction Temperature Tjts − +150 − °C Power Supply Current (Outputs Open, VCC = 5.25 V) Outputs Enable Outputs Disabled ICC mA

MC75172B, MC75174B TIMING CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Characteristics Symbol Min Typ Max Unit Propagation Delay − Input to Single−ended Output (Figure 3) Output Low−to−High Output High−to−Low tPLH tPHL ns Propagation Delay − Input to Differential Output (Figure 4) Input Low−to−High Input High−to−Low tPLH(D) tPHL(D) ns Differential Output Transition Time (Figure 4) tdr, t df − 19 25 ns Skew Timing ⎜tPLHD − tPHLD⎜ for Each Driver Max − Min tPLHD Within a Package Max − Min tPHLD Within a Package tSK1 tSK2 tSK3 0.2 1.5 1.5 ns Enable Timing Single−ended Outputs (Figure 5) Enable to Active High Output Enable to Active Low Output Active High to Disable (using Enable) Active Low to Disable (using Enable) Enable to Active High Output (MC75172B only) Enable to Active Low Output (MC75172B only) Active High to Disable (using Enable, MC75172B only) Active Low to Disable (using Enable, MC75172B only) tPZH(E) tPZL(E) tPHZ(E) tPLZ(E) tPZH(E) tPZL(E) tPHZ(E) tPLZ(E) ns Differential Outputs (Figure 6) Enable to Active Output Enable to Active Output (MC75172B only) Enable to 3−State Output Enable to 3−State Output (MC75172B only) tPZD(E) tPZD(E) tPDZ(E) tPDZ(E) ns PIN CONNECTIONS MC75172B MC75174B En V CC GND En P Package V CC En NC 10 11 En GND 14 3Z 1Y 2 1Z NC NC NC En 34 En NC NC NC1Z 21Y 3Z14 GND V CC NC 10 11

1.5 VVin

2.tSK1 = ⎥ tPLHD − tPHLD⎥ for each driver. 3.tSK2 computed by subtracting the shortest tPLHD from the longest tPLHD of the 4 drivers within a package. 4.tSK3 computed by subtracting the shortest tPHLD from the longest tPHLD of the 4 drivers within a package. Figure 1. VDD Measurement Figure 2. Common Mode Test Figure 3. Propagation Delay, Single−Ended Outputs Figure 4. Propagation Delay, Differential Outputs

3.0 VVCC

2.Vin is inverted for Enable measurements. Figure 5. Enable Timing, Single−Ended Outputs Figure 6. Enable Timing, Differential Outputs

MC75172B, MC75174B APPLICATIONS INFORMATION

Description

The MC75172B and MC75174B are differential line drivers designed to comply with EIA−485 Standard (April 1983) for use in balanced digital multipoint systems containing multiple drivers. The drivers also comply with EIA−422−A and CCITT Recommendations V .11 and X.27. The drivers meet the EIA−485 requirement for protection from damage in the event that two or more drivers attempt to transmit data simultaneously on the same cable. Data rates in excess of 10 MBPS are possible, depending on the cable length and cable characteristics. A single power supply, 5.0 V , ±5%, is required at a nominal current of 60 mA, plus load currents. Outputs Each output (when active) will be a low or a high voltage, which depends on the input state and the load current (see Table 1, 2 and Figures 7 to 10). The graphs apply to each driver, regardless of how many other drivers within the package are supplying load current. Table 1. MC75172B Truth Table Table 2. MC75174B Truth Table The two outputs of a driver are always complementary. upon removal of the fault condition. become active once again as the IC cools down. (Pins 4 and 12) are true according to Tables 1 and 2. characteristics are shown in Figure 15. EIA−422−A is the reason for the narrower temperature range.

should be as short as possible. Figure 18. Typical EIA−485 System NOTES: 1.Terminating resistors RT must be located at the physical ends of the cable. 2.Stubs should be as short as possible. 3.Circuit ground of all drivers and receivers must be connected via a dedicated wire within the cable. Do not rely on chassis ground or power line ground. RT = 120 /C0087 at each end of the cable.

MC75172B, MC75174B COMPARING SYSTEM REQUIREMENTS Characteristic Symbol EIA−485 EIA−422−A V.11 and X.27 GENERATOR (Driver) Output Impedance (Note 1) Zout Not Specified /C0116100 /C0087 50 10 100 /C0087 Open Circuit Voltage Differential Single−Ended VOCD VOCS 1.5 to 6.0 V /C01166.0 V /C01126.0 V /C01126.0 V /C01126.0 V, w/3.9 k/C0087, Load /C01126.0 V, w/3.9 k/C0087, Load Loaded Differential Voltage VOD 1.5 to 5.0 V, w/54 /C0087 load /C01132.0 V or /C0113 0.5 VOCD, w/100 /C0087 load /C01132.0 V or /C01130.5 VOCD, w/100 /C0087 load Differential Voltage Balance /C0068VOD /C0116200 mV /C0112400 mV /C0116400 mV Output Common Mode Range VCM −7.0 to +12 V Not Specified Not Specified Offset Voltage VOS −1.0 /C0116 VOS /C0116 3.0 V /C01123.0 V /C01123.0 V Offset Voltage Balance /C0068VOS /C0116200 mV /C0112400 mV /C0116400 mV Short Circuit Current IOS /C0112250 mA for −7.0 to 12 V /C0112150 mA to ground /C0112150 mA to ground Leakage Current (VCC = 0) IOLK Not Specified /C0112100 /C0109A to −0.25 V thru 6.0 V /C0112100 /C0109A to ± 0.25 V Output Rise/Fall Time (Note 2) tr, tf /C01120.3 TB, w/54 /C0087/1150 pF load /C01120.1 TB or /C0112 20 ns, w/100 /C0087 load /C01120.1 TB or /C0112 20 ns, w/100 /C0087 load RECEIVER Input Sensitivity Vth ± 200 mV ± 200 mV ± 300 mV Input Bias Voltage Vbias /C01123.0 V /C01123.0 V /C01123.0 V Dynamic Input Impedance Rin Spec number of U.L. /C01134 k/C0087 /C01134 k/C0087 NOTES: 1. Compliance with V.11 and X.27 (Blue book) output impedance requires external resistors in series with the outputs of the MC75172B and MC75174B. 2. TB = Bit time. Additional Information Copies of the EIA Recommendations (EIA−485 and EIA−422−A) can be obtained from the Electronics Industries from the United States Department of Commerce, Springfield, VA (703−487−4600).

ORDERING INFORMATION

Device Operating Temperature Range Package Shipping† MC75172BDW TA = −40° to +85°C SOIC−20WB

38 Units / RailMC75172BDWG SOIC−20WB

(Pb−Free) MC75172BDWR2 SOIC−20WB 1000 / Tape & ReelMC75172BDWR2G SOIC−20WB (Pb−Free) MC75174BDW SOIC−20WB

38 Units / RailMC75174BDWG SOIC−20WB

(Pb−Free) MC75174BDWR2 SOIC−20WB 1000 / Tape & ReelMC75174BDWR2G SOIC−20WB (Pb−Free) MC75174BP PDIP−16

25 Units / RailMC75174BPG PDIP−16

(Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

MC75172B, MC75174B PACKAGE DIMENSIONS SOIC−20 WB DW SUFFIX PLASTIC PACKAGE CASE 751D−05 ISSUE G B20X H10X C L 18X A1 A SEATING PLANE /C0113 h X 45/C0095 E D M0.25 MB M0.25 SA SBT e T B A DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 /C0113 0 7 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. /C0095/C0095 PDIP−16 P SUFFIX PLASTIC PACKAGE CASE 648−08 ISSUE T NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. −A− B F C S H G D J L M 16 PL SEATING 916 K PLANE−T− MAM0.25 (0.010) T DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01 /C0095/C0095/C0095/C0095