74LS194 SYC | Alldatasheet

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Technical content

Features

■ Parallel inputs and outputs ■ Four operating modes: Synchronous parallel load Right shift Left shift Do nothing ■ Positive edge-triggered clocking ■ Direct overriding clear Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Order Number Package Number Package Description DM74LS194AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS194AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide www.sycelectronica.com.ar

H = HIGH Level (steady state) L = LOW Level (steady state) X = Don't Care (any input, including transitions) ↑ = Transition from LOW-to-HIGH level a, b, c, d = The level of steady state input at inputs A, B, C or D, respectively. Q A0, QB0, QC0 , QD0 = The level of QA, QB, QC , or QD , respectively, before the indicated steady state input conditions were established. Q An, QBn, QCn , QDn = The level of QA, QB, QC , respectively, before the most-recent ↑ transition of the clock. Logic Diagram Inputs Outputs Clear Mode Clock Serial Parallel Q A Q B Q C Q D S1 S0 Left Right A B C D L X X X X X XXXX L L L L H X X L X X XXXXQ A0 Q B0 Q C0 Q D0 HH H ↑ XX a b c d a b c d HL H ↑ X H XXXX H Q An Q Bn Q Cn HL H ↑ X L XXXX L Q An Q Bn Q Cn HH L ↑ H X XXXXQ Bn Q Cn Q Dn H HH L ↑ L X XXXXQ Bn Q Cn Q Dn L H L L X X X XXXXQ A0 Q B0 Q C0 Q D0 www.sycelectronica.com.ar

Absolute Maximum Ratings(Note 1) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Note 2: C L = 15 pF , TA = 25°C and VCC = 5V. Note 3: C L = 50 pF , RL = 2 kΩ , TA = 25°C and VCC = 5V. Note 4: TA = 25°C and VCC = 5V.

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted) Note 5: All typicals are at VCC = 5V, TA = 25°C. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 7: With all outputs open, inputs A through D grounded, and 4.5V applied to S0, S1, CLEAR, and the serial inputs, ICC is tested with momentary ground, then 4.5V applied to CLOCK. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VIH HIGH Level Input Voltage 2 V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current 8 mA fCLK Clock Frequency (Note 2) 0 25 MHzClock Frequency (Note 3) 0 20 tW Pulse Width Clock 20 ns(Note 4) Clear 20 tSU Setup Time Mode 30 ns(Note 4) Data 20 tH Hold Time (Note 4) 0 ns tREL Clear Release Time (Note 4) 25 ns TA Free Air Operating Temperature 0 70 °C Symbol Parameter Conditions Min Typ Max Units (Note 5) VI Input Clamp Voltage V CC = Min, II = −18 mA −1.5 V VOH HIGH Level V CC = Min, IOH = Max 2.7 3.4 V Output Voltage V IL = Max, VIH = Min VOL LOW Level V CC = Min, IOL = Max 0.35 0.5 Output Voltage V IL = Max, VIH = Min V IOL = 4 mA, VCC = Min 0.4 II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA IIH HIGH Level Input Current V CC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current V CC = Max, VI = 0.4V −0.4 mA IOS Short Circuit Output Current V CC = Max (Note 6) −20 −100 mA ICC Supply Current V CC = Max (Note 7) 15 23 mA www.sycelectronica.com.ar

at VCC = 5V and TA = 25°C Note 8: All typicals are at VCC = 5V, TA = 25°C. Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 10: With all outputs open, inputs A through D grounded, and 4.5V applied to S0, S1, CLEAR, and the serial inputs, ICC is tested with momentary ground, then 4.5V applied to CLOCK. Timing Diagram Typical Clear, Load, Right-Shift, Left-Shift, Inhibit, and Clear Sequences Symbol Parameter From (Input) C L = 50 pF, RL = 2 kΩ Units To (Output) Min Max fMAX Maximum Clock Frequency 20 MHz tPLH Propagation Delay Time Clock to Any Q 26 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Clock to Any Q 35 ns HIGH-to-LOW Level Output tPHL Propagation Delay Time Clear to Any Q 38 ns HIGH-to-LOW Output www.sycelectronica.com.ar

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A www.sycelectronica.com.ar

DM74LS194A 4-Bit Bidirectional Universal Shift Register Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E www.sycelectronica.com.ar